Clean-up of s3c24x0 drivers excluding nand driver

This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
  non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
kevin.morfitt@fearnside-systems.co.uk 2009-10-10 13:33:11 +09:00 committed by Tom Rix
parent 8250d0bae8
commit eb0ae7f549
15 changed files with 374 additions and 339 deletions

View File

@ -73,8 +73,9 @@ static inline void delay(unsigned long loops)
int board_init(void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* to reduce PLL lock time, adjust the LOCKTIME register */
clk_power->LOCKTIME = 0xFFFFFF;
@ -174,7 +175,7 @@ static inline void NF_Init(void)
void
nand_init(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
NF_Init();
#ifdef DEBUG
@ -190,21 +191,21 @@ nand_init(void)
static u8 Get_PLD_ID(void)
{
VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
VCMA9_PLD * const pld = VCMA9_get_base_PLD();
return(pld->ID);
}
static u8 Get_PLD_BOARD(void)
{
VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
VCMA9_PLD * const pld = VCMA9_get_base_PLD();
return(pld->BOARD);
}
static u8 Get_PLD_SDRAM(void)
{
VCMA9_PLD * const pld = VCMA9_GetBase_PLD();
VCMA9_PLD * const pld = VCMA9_get_base_PLD();
return(pld->SDRAM);
}

View File

@ -39,14 +39,14 @@ typedef enum {
static inline void NF_Conf(u16 conf)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFCONF = conf;
}
static inline void NF_Cmd(u8 cmd)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFCMD = cmd;
}
@ -59,14 +59,14 @@ static inline void NF_CmdW(u8 cmd)
static inline void NF_Addr(u8 addr)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFADDR = addr;
}
static inline void NF_SetCE(NFCE_STATE s)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
switch (s) {
case NFCE_LOW:
@ -81,35 +81,35 @@ static inline void NF_SetCE(NFCE_STATE s)
static inline void NF_WaitRB(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
while (!(nand->NFSTAT & (1<<0)));
}
static inline void NF_Write(u8 data)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFDATA = data;
}
static inline u8 NF_Read(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
return(nand->NFDATA);
}
static inline void NF_Init_ECC(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
nand->NFCONF |= (1<<12);
}
static inline u32 NF_Read_ECC(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
return(nand->NFECC);
}
@ -128,7 +128,7 @@ typedef struct {
} /*__attribute__((__packed__))*/ VCMA9_PLD;
#define VCMA9_PLD_BASE 0x2C000100
static inline VCMA9_PLD * VCMA9_GetBase_PLD(void)
static inline VCMA9_PLD *VCMA9_get_base_PLD(void)
{
return (VCMA9_PLD * const)VCMA9_PLD_BASE;
}

View File

@ -46,8 +46,9 @@ extern int do_mdm_init; /* defined in common/main.c */
int board_init (void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* memory and cpu-speed are setup before relocation */
/* change the clock to be 50 MHz 1:1:1 */

View File

@ -68,8 +68,9 @@ static inline void delay (unsigned long loops)
int board_init (void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* to reduce PLL lock time, adjust the LOCKTIME register */
clk_power->LOCKTIME = 0xFFFFFF;

View File

@ -75,8 +75,9 @@ static inline void delay (unsigned long loops)
int board_init (void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* to reduce PLL lock time, adjust the LOCKTIME register */
clk_power->LOCKTIME = 0xFFFFFF;
@ -170,7 +171,7 @@ static inline void NF_Init(void)
void nand_init(void)
{
S3C2410_NAND * const nand = S3C2410_GetBase_NAND();
struct s3c2410_nand * const nand = s3c2410_get_base_nand();
NF_Init();
#ifdef DEBUG

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@ -644,9 +644,9 @@ static int adc_read (unsigned int channel)
{
int j = 1000; /* timeout value for wait loop in us */
int result;
S3C2400_ADC *padc;
struct s3c2400_adc *padc;
padc = S3C2400_GetBase_ADC();
padc = s3c2400_get_base_adc();
channel &= 0x7;
adc_init ();
@ -686,9 +686,9 @@ static int adc_read (unsigned int channel)
static void adc_init (void)
{
S3C2400_ADC *padc;
struct s3c2400_adc *padc;
padc = S3C2400_GetBase_ADC();
padc = s3c2400_get_base_adc();
padc->ADCCON &= ~(0xff << 6); /* clear prescaler bits */
padc->ADCCON |= ((65 << 6) | ADC_PRSCEN); /* set prescaler */
@ -707,7 +707,7 @@ static void adc_init (void)
static void led_set (unsigned int state)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
led_init ();
@ -740,7 +740,7 @@ static void led_blink (void)
static void led_init (void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* configure GPA12 as output and set to High -> LED off */
gpio->PACON &= ~(1 << 12);

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@ -42,7 +42,7 @@ static void trab_rs485_disable_rx(void);
static void rs485_setbrg (void)
{
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
int i;
unsigned int reg = 0;
@ -67,7 +67,7 @@ static void rs485_setbrg (void)
static void rs485_cfgio (void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
gpio->PFCON &= ~(0x3 << 2);
gpio->PFCON |= (0x2 << 2); /* configure GPF1 as RXD1 */
@ -101,7 +101,7 @@ int rs485_init (void)
*/
int rs485_getc (void)
{
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
/* wait for character to arrive */
while (!(uart->UTRSTAT & 0x1));
@ -114,7 +114,7 @@ int rs485_getc (void)
*/
void rs485_putc (const char c)
{
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
/* wait for room in the tx FIFO */
while (!(uart->UTRSTAT & 0x2));
@ -131,7 +131,7 @@ void rs485_putc (const char c)
*/
int rs485_tstc (void)
{
S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR);
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
return uart->UTRSTAT & 0x1;
}
@ -168,7 +168,7 @@ static void set_rs485re(unsigned char rs485re_state)
static void set_rs485de(unsigned char rs485de_state)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* This is on PORT A bit 11 */
if(rs485de_state)

View File

@ -69,8 +69,9 @@ int board_init ()
#if defined(CONFIG_VFD)
extern int vfd_init_clocks(void);
#endif
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* memory and cpu-speed are setup before relocation */
#ifdef CONFIG_TRAB_50MHZ
@ -338,22 +339,22 @@ static int key_pressed(void)
static inline void SET_CS_TOUCH(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
gpio->PDDAT &= 0x5FF;
}
static inline void CLR_CS_TOUCH(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
gpio->PDDAT |= 0x200;
}
static void spi_init(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
struct s3c24x0_spi * const spi = s3c24x0_get_base_spi();
int i;
/* Configure I/O ports. */
@ -377,7 +378,7 @@ static void spi_init(void)
static void wait_transmit_done(void)
{
S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
struct s3c24x0_spi * const spi = s3c24x0_get_base_spi();
while (!(spi->ch[0].SPSTA & 0x01)); /* wait until transfer is done */
}
@ -385,7 +386,7 @@ static void wait_transmit_done(void)
static void tsc2000_write(unsigned int page, unsigned int reg,
unsigned int data)
{
S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
struct s3c24x0_spi * const spi = s3c24x0_get_base_spi();
unsigned int command;
SET_CS_TOUCH();

View File

@ -406,9 +406,9 @@ static int adc_read (unsigned int channel)
{
int j = 1000; /* timeout value for wait loop in us */
int result;
S3C2400_ADC *padc;
struct s3c2400_adc *padc;
padc = S3C2400_GetBase_ADC();
padc = s3c2400_get_base_adc();
channel &= 0x7;
padc->ADCCON &= ~ADC_STDBM; /* select normal mode */
@ -446,9 +446,9 @@ static int adc_read (unsigned int channel)
static void adc_init (void)
{
S3C2400_ADC *padc;
struct s3c2400_adc *padc;
padc = S3C2400_GetBase_ADC();
padc = s3c2400_get_base_adc();
padc->ADCCON &= ~(0xff << 6); /* clear prescaler bits */
padc->ADCCON |= ((65 << 6) | ADC_PRSCEN); /* set prescaler */
@ -490,7 +490,7 @@ int do_power_switch (void)
{
int result;
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* configure GPE7 as input */
gpio->PECON &= ~(0x3 << (2 * 7));
@ -557,7 +557,7 @@ int do_vfd_id (void)
int i;
long int pcup_old, pccon_old;
int vfd_board_id;
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* try to red vfd board id from the value defined by pull-ups */
@ -589,8 +589,8 @@ int do_buzzer (char **argv)
{
int counter;
S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_timers * const timers = s3c24x0_get_base_timers();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* set prescaler for timer 2, 3 and 4 */
timers->TCFG0 &= ~0xFF00;
@ -637,7 +637,7 @@ int do_buzzer (char **argv)
int do_led (char **argv)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* configure PC14 and PC15 as output */
gpio->PCCON &= ~(0xF << 28);
@ -692,7 +692,7 @@ int do_led (char **argv)
int do_full_bridge (char **argv)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* configure PD5 and PD6 as output */
gpio->PDCON &= ~((0x3 << 5*2) | (0x3 << 6*2));
@ -801,7 +801,7 @@ int do_motor_contact (void)
int do_motor (char **argv)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* Configure I/O port */
gpio->PGCON &= ~(0x3 << 0);
@ -827,8 +827,8 @@ static void print_identifier (void)
int do_pwm (char **argv)
{
int counter;
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
struct s3c24x0_timers * const timers = s3c24x0_get_base_timers();
if (strcmp (argv[2], "on") == 0) {
/* configure pin GPD8 as TOUT3 */

View File

@ -27,6 +27,7 @@
#include <common.h>
#include <s3c2400.h>
#include <asm/io.h>
#include <div64.h>
#include "tsc2000.h"
@ -44,8 +45,8 @@
void tsc2000_spi_init(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
struct s3c24x0_spi * const spi = s3c24x0_get_base_spi();
int i;
/* Configure I/O ports. */
@ -71,7 +72,7 @@ void tsc2000_spi_init(void)
void spi_wait_transmit_done(void)
{
S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
struct s3c24x0_spi * const spi = s3c24x0_get_base_spi();
while (!(spi->ch[0].SPSTA & 0x01)); /* wait until transfer is done */
}
@ -79,7 +80,7 @@ void spi_wait_transmit_done(void)
void tsc2000_write(unsigned short reg, unsigned short data)
{
S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
struct s3c24x0_spi * const spi = s3c24x0_get_base_spi();
unsigned int command;
SET_CS_TOUCH();
@ -100,7 +101,7 @@ void tsc2000_write(unsigned short reg, unsigned short data)
unsigned short tsc2000_read (unsigned short reg)
{
unsigned short command, data;
S3C24X0_SPI * const spi = S3C24X0_GetBase_SPI();
struct s3c24x0_spi * const spi = s3c24x0_get_base_spi();
SET_CS_TOUCH();
command = 0x8000 | reg;
@ -123,7 +124,7 @@ unsigned short tsc2000_read (unsigned short reg)
void tsc2000_set_mux (unsigned int channel)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
CLR_MUX1_ENABLE; CLR_MUX2_ENABLE;
CLR_MUX3_ENABLE; CLR_MUX4_ENABLE;
@ -200,7 +201,7 @@ void tsc2000_set_mux (unsigned int channel)
void tsc2000_set_range (unsigned int range)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
switch (range) {
case 1:
@ -306,7 +307,7 @@ s32 tsc2000_contact_temp (void)
void tsc2000_reg_init (void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
tsc2000_write(TSC2000_REG_ADC, 0x2036);
tsc2000_write(TSC2000_REG_REF, 0x0011);

View File

@ -128,7 +128,7 @@ void adc_wait_conversion_done(void);
static inline void SET_CS_TOUCH(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
gpio->PDDAT &= 0x5FF;
}
@ -136,7 +136,7 @@ static inline void SET_CS_TOUCH(void)
static inline void CLR_CS_TOUCH(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
gpio->PDDAT |= 0x200;
}

View File

@ -358,9 +358,9 @@ int vfd_init_clocks (void)
{
int i;
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
struct s3c24x0_timers * const timers = s3c24x0_get_base_timers();
struct s3c24x0_lcd * const lcd = s3c24x0_get_base_lcd();
/* try to determine display type from the value
* defined by pull-ups
@ -429,8 +429,8 @@ int vfd_init_clocks (void)
*/
int drv_vfd_init(void)
{
S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_lcd * const lcd = s3c24x0_get_base_lcd();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
char *tmp;
ulong palette;
static int vfd_init_done = 0;
@ -529,7 +529,7 @@ int drv_vfd_init(void)
*/
void disable_vfd (void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
VFD_DISABLE;
gpio->PDCON &= ~0xC;

View File

@ -32,6 +32,8 @@
#elif defined(CONFIG_S3C2410)
#include <s3c2410.h>
#endif
#include <asm/io.h>
#include <i2c.h>
#ifdef CONFIG_HARD_I2C
@ -42,142 +44,139 @@
#define I2C_OK 0
#define I2C_NOK 1
#define I2C_NACK 2
#define I2C_NOK_LA 3 /* Lost arbitration */
#define I2C_NOK_TOUT 4 /* time out */
#define I2C_NOK_LA 3 /* Lost arbitration */
#define I2C_NOK_TOUT 4 /* time out */
#define I2CSTAT_BSY 0x20 /* Busy bit */
#define I2CSTAT_NACK 0x01 /* Nack bit */
#define I2CCON_IRPND 0x10 /* Interrupt pending bit */
#define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
#define I2C_MODE_MR 0x80 /* Master Receive Mode */
#define I2C_START_STOP 0x20 /* START / STOP */
#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
#define I2C_TIMEOUT 1 /* 1 second */
#define I2CSTAT_BSY 0x20 /* Busy bit */
#define I2CSTAT_NACK 0x01 /* Nack bit */
#define I2CCON_IRPND 0x10 /* Interrupt pending bit */
#define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
#define I2C_MODE_MR 0x80 /* Master Receive Mode */
#define I2C_START_STOP 0x20 /* START / STOP */
#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
#define I2C_TIMEOUT 1 /* 1 second */
static int GetI2CSDA(void)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
#ifdef CONFIG_S3C2410
return (gpio->GPEDAT & 0x8000) >> 15;
return (readl(&gpio->GPEDAT) & 0x8000) >> 15;
#endif
#ifdef CONFIG_S3C2400
return (gpio->PGDAT & 0x0020) >> 5;
return (readl(&gpio->PGDAT) & 0x0020) >> 5;
#endif
}
#if 0
static void SetI2CSDA(int x)
{
rGPEDAT = (rGPEDAT & ~0x8000) | (x&1) << 15;
rGPEDAT = (rGPEDAT & ~0x8000) | (x & 1) << 15;
}
#endif
static void SetI2CSCL(int x)
{
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
#ifdef CONFIG_S3C2410
gpio->GPEDAT = (gpio->GPEDAT & ~0x4000) | (x&1) << 14;
writel((readl(&gpio->GPEDAT) & ~0x4000) | (x & 1) << 14, &gpio->GPEDAT);
#endif
#ifdef CONFIG_S3C2400
gpio->PGDAT = (gpio->PGDAT & ~0x0040) | (x&1) << 6;
writel((readl(&gpio->PGDAT) & ~0x0040) | (x & 1) << 6, &gpio->PGDAT);
#endif
}
static int WaitForXfer (void)
static int WaitForXfer(void)
{
S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
int i, status;
struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
int i;
i = I2C_TIMEOUT * 10000;
status = i2c->IICCON;
while ((i > 0) && !(status & I2CCON_IRPND)) {
udelay (100);
status = i2c->IICCON;
while (!(readl(&i2c->IICCON) & I2CCON_IRPND) && (i > 0)) {
udelay(100);
i--;
}
return (status & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
return (readl(&i2c->IICCON) & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
}
static int IsACK (void)
static int IsACK(void)
{
S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
return (!(i2c->IICSTAT & I2CSTAT_NACK));
return !(readl(&i2c->IICSTAT) & I2CSTAT_NACK);
}
static void ReadWriteByte (void)
static void ReadWriteByte(void)
{
S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
i2c->IICCON &= ~I2CCON_IRPND;
writel(readl(&i2c->IICCON) & ~I2CCON_IRPND, &i2c->IICCON);
}
void i2c_init (int speed, int slaveadd)
void i2c_init(int speed, int slaveadd)
{
S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
S3C24X0_GPIO *const gpio = S3C24X0_GetBase_GPIO ();
struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
ulong freq, pres = 16, div;
int i, status;
int i;
/* wait for some time to give previous transfer a chance to finish */
i = I2C_TIMEOUT * 1000;
status = i2c->IICSTAT;
while ((i > 0) && (status & I2CSTAT_BSY)) {
udelay (1000);
status = i2c->IICSTAT;
while ((readl(&i2c->IICSTAT) && I2CSTAT_BSY) && (i > 0)) {
udelay(1000);
i--;
}
if ((status & I2CSTAT_BSY) || GetI2CSDA () == 0) {
if ((readl(&i2c->IICSTAT) & I2CSTAT_BSY) || GetI2CSDA() == 0) {
#ifdef CONFIG_S3C2410
ulong old_gpecon = gpio->GPECON;
ulong old_gpecon = readl(&gpio->GPECON);
#endif
#ifdef CONFIG_S3C2400
ulong old_gpecon = gpio->PGCON;
ulong old_gpecon = readl(&gpio->PGCON);
#endif
/* bus still busy probably by (most) previously interrupted transfer */
/* bus still busy probably by (most) previously interrupted
transfer */
#ifdef CONFIG_S3C2410
/* set I2CSDA and I2CSCL (GPE15, GPE14) to GPIO */
gpio->GPECON = (gpio->GPECON & ~0xF0000000) | 0x10000000;
writel((readl(&gpio->GPECON) & ~0xF0000000) | 0x10000000,
&gpio->GPECON);
#endif
#ifdef CONFIG_S3C2400
/* set I2CSDA and I2CSCL (PG5, PG6) to GPIO */
gpio->PGCON = (gpio->PGCON & ~0x00003c00) | 0x00001000;
writel((readl(&gpio->PGCON) & ~0x00003c00) | 0x00001000,
&gpio->PGCON);
#endif
/* toggle I2CSCL until bus idle */
SetI2CSCL (0);
udelay (1000);
SetI2CSCL(0);
udelay(1000);
i = 10;
while ((i > 0) && (GetI2CSDA () != 1)) {
SetI2CSCL (1);
udelay (1000);
SetI2CSCL (0);
udelay (1000);
while ((i > 0) && (GetI2CSDA() != 1)) {
SetI2CSCL(1);
udelay(1000);
SetI2CSCL(0);
udelay(1000);
i--;
}
SetI2CSCL (1);
udelay (1000);
SetI2CSCL(1);
udelay(1000);
/* restore pin functions */
#ifdef CONFIG_S3C2410
gpio->GPECON = old_gpecon;
writel(old_gpecon, &gpio->GPECON);
#endif
#ifdef CONFIG_S3C2400
gpio->PGCON = old_gpecon;
writel(old_gpecon, &gpio->PGCON);
#endif
}
/* calculate prescaler and divisor values */
freq = get_PCLK ();
freq = get_PCLK();
if ((freq / pres / (16 + 1)) > speed)
/* set prescaler to 512 */
pres = 512;
@ -188,13 +187,13 @@ void i2c_init (int speed, int slaveadd)
/* set prescaler, divisor according to freq, also set
* ACKGEN, IRQ */
i2c->IICCON = (div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0);
writel((div & 0x0F) | 0xA0 | ((pres == 512) ? 0x40 : 0), &i2c->IICCON);
/* init to SLAVE REVEIVE and set slaveaddr */
i2c->IICSTAT = 0;
i2c->IICADD = slaveadd;
writel(0, &i2c->IICSTAT);
writel(slaveadd, &i2c->IICADD);
/* program Master Transmit (and implicit STOP) */
i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->IICSTAT);
}
@ -206,107 +205,109 @@ void i2c_init (int speed, int slaveadd)
* 0 we skip the address write cycle.
*/
static
int i2c_transfer (unsigned char cmd_type,
unsigned char chip,
unsigned char addr[],
unsigned char addr_len,
unsigned char data[], unsigned short data_len)
int i2c_transfer(unsigned char cmd_type,
unsigned char chip,
unsigned char addr[],
unsigned char addr_len,
unsigned char data[], unsigned short data_len)
{
S3C24X0_I2C *const i2c = S3C24X0_GetBase_I2C ();
int i, status, result;
struct s3c24x0_i2c *i2c = s3c24x0_get_base_i2c();
int i, result;
if (data == 0 || data_len == 0) {
/*Don't support data transfer of no length or to address 0 */
printf ("i2c_transfer: bad call\n");
printf("i2c_transfer: bad call\n");
return I2C_NOK;
}
/* Check I2C bus idle */
i = I2C_TIMEOUT * 1000;
status = i2c->IICSTAT;
while ((i > 0) && (status & I2CSTAT_BSY)) {
udelay (1000);
status = i2c->IICSTAT;
while ((readl(&i2c->IICSTAT) & I2CSTAT_BSY) && (i > 0)) {
udelay(1000);
i--;
}
if (status & I2CSTAT_BSY)
if (readl(&i2c->IICSTAT) & I2CSTAT_BSY)
return I2C_NOK_TOUT;
i2c->IICCON |= 0x80;
writel(readl(&i2c->IICCON) | 0x80, &i2c->IICCON);
result = I2C_OK;
switch (cmd_type) {
case I2C_WRITE:
if (addr && addr_len) {
i2c->IICDS = chip;
writel(chip, &i2c->IICDS);
/* send START */
i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
&i2c->IICSTAT);
i = 0;
while ((i < addr_len) && (result == I2C_OK)) {
result = WaitForXfer ();
i2c->IICDS = addr[i];
ReadWriteByte ();
result = WaitForXfer();
writel(addr[i], &i2c->IICDS);
ReadWriteByte();
i++;
}
i = 0;
while ((i < data_len) && (result == I2C_OK)) {
result = WaitForXfer ();
i2c->IICDS = data[i];
ReadWriteByte ();
result = WaitForXfer();
writel(data[i], &i2c->IICDS);
ReadWriteByte();
i++;
}
} else {
i2c->IICDS = chip;
writel(chip, &i2c->IICDS);
/* send START */
i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP;
writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
&i2c->IICSTAT);
i = 0;
while ((i < data_len) && (result = I2C_OK)) {
result = WaitForXfer ();
i2c->IICDS = data[i];
ReadWriteByte ();
result = WaitForXfer();
writel(data[i], &i2c->IICDS);
ReadWriteByte();
i++;
}
}
if (result == I2C_OK)
result = WaitForXfer ();
result = WaitForXfer();
/* send STOP */
i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
ReadWriteByte ();
writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
ReadWriteByte();
break;
case I2C_READ:
if (addr && addr_len) {
i2c->IICSTAT = I2C_MODE_MT | I2C_TXRX_ENA;
i2c->IICDS = chip;
writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->IICSTAT);
writel(chip, &i2c->IICDS);
/* send START */
i2c->IICSTAT |= I2C_START_STOP;
result = WaitForXfer ();
if (IsACK ()) {
writel(readl(&i2c->IICSTAT) | I2C_START_STOP,
&i2c->IICSTAT);
result = WaitForXfer();
if (IsACK()) {
i = 0;
while ((i < addr_len) && (result == I2C_OK)) {
i2c->IICDS = addr[i];
ReadWriteByte ();
result = WaitForXfer ();
writel(addr[i], &i2c->IICDS);
ReadWriteByte();
result = WaitForXfer();
i++;
}
i2c->IICDS = chip;
writel(chip, &i2c->IICDS);
/* resend START */
i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA |
I2C_START_STOP;
ReadWriteByte ();
result = WaitForXfer ();
writel(I2C_MODE_MR | I2C_TXRX_ENA |
I2C_START_STOP, &i2c->IICSTAT);
ReadWriteByte();
result = WaitForXfer();
i = 0;
while ((i < data_len) && (result == I2C_OK)) {
/* disable ACK for final READ */
if (i == data_len - 1)
i2c->IICCON &= ~0x80;
ReadWriteByte ();
result = WaitForXfer ();
data[i] = i2c->IICDS;
writel(readl(&i2c->IICCON)
& ~0x80, &i2c->IICCON);
ReadWriteByte();
result = WaitForXfer();
data[i] = readl(&i2c->IICDS);
i++;
}
} else {
@ -314,21 +315,23 @@ int i2c_transfer (unsigned char cmd_type,
}
} else {
i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
i2c->IICDS = chip;
writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
writel(chip, &i2c->IICDS);
/* send START */
i2c->IICSTAT |= I2C_START_STOP;
result = WaitForXfer ();
writel(readl(&i2c->IICSTAT) | I2C_START_STOP,
&i2c->IICSTAT);
result = WaitForXfer();
if (IsACK ()) {
if (IsACK()) {
i = 0;
while ((i < data_len) && (result == I2C_OK)) {
/* disable ACK for final READ */
if (i == data_len - 1)
i2c->IICCON &= ~0x80;
ReadWriteByte ();
result = WaitForXfer ();
data[i] = i2c->IICDS;
writel(readl(&i2c->IICCON) &
~0x80, &i2c->IICCON);
ReadWriteByte();
result = WaitForXfer();
data[i] = readl(&i2c->IICDS);
i++;
}
} else {
@ -337,12 +340,12 @@ int i2c_transfer (unsigned char cmd_type,
}
/* send STOP */
i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA;
ReadWriteByte ();
writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->IICSTAT);
ReadWriteByte();
break;
default:
printf ("i2c_transfer: bad call\n");
printf("i2c_transfer: bad call\n");
result = I2C_NOK;
break;
}
@ -350,7 +353,7 @@ int i2c_transfer (unsigned char cmd_type,
return (result);
}
int i2c_probe (uchar chip)
int i2c_probe(uchar chip)
{
uchar buf[1];
@ -361,16 +364,16 @@ int i2c_probe (uchar chip)
* address was <ACK>ed (i.e. there was a chip at that address which
* drove the data line low).
*/
return (i2c_transfer (I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK);
return i2c_transfer(I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK;
}
int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
uchar xaddr[4];
int ret;
if (alen > 4) {
printf ("I2C read: addr len %d not supported\n", alen);
printf("I2C read: addr len %d not supported\n", alen);
return 1;
}
@ -394,23 +397,24 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
* hidden in the chip address.
*/
if (alen > 0)
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
chip |= ((addr >> (alen * 8)) &
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
if ((ret =
i2c_transfer (I2C_READ, chip << 1, &xaddr[4 - alen], alen,
buffer, len)) != 0) {
printf ("I2c read: failed %d\n", ret);
i2c_transfer(I2C_READ, chip << 1, &xaddr[4 - alen], alen,
buffer, len)) != 0) {
printf("I2c read: failed %d\n", ret);
return 1;
}
return 0;
}
int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
uchar xaddr[4];
if (alen > 4) {
printf ("I2C write: addr len %d not supported\n", alen);
printf("I2C write: addr len %d not supported\n", alen);
return 1;
}
@ -433,10 +437,11 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
* hidden in the chip address.
*/
if (alen > 0)
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
chip |= ((addr >> (alen * 8)) &
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
return (i2c_transfer
(I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
len) != 0);
}
#endif /* CONFIG_HARD_I2C */
#endif /* CONFIG_HARD_I2C */

View File

@ -37,6 +37,7 @@
#endif
#include <rtc.h>
#include <asm/io.h>
/*#define DEBUG*/
@ -48,112 +49,113 @@ typedef enum {
static inline void SetRTC_Access(RTC_ACCESS a)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
switch (a) {
case RTC_ENABLE:
rtc->RTCCON |= 0x01; break;
struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
case RTC_DISABLE:
rtc->RTCCON &= ~0x01; break;
switch (a) {
case RTC_ENABLE:
writeb(readb(&rtc->RTCCON) | 0x01, &rtc->RTCCON);
break;
case RTC_DISABLE:
writeb(readb(&rtc->RTCCON) & ~0x01, &rtc->RTCCON);
break;
}
}
/* ------------------------------------------------------------------------- */
int rtc_get (struct rtc_time *tmp)
int rtc_get(struct rtc_time *tmp)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
uchar sec, min, hour, mday, wday, mon, year;
uchar a_sec,a_min, a_hour, a_date, a_mon, a_year, a_armed;
uchar a_sec, a_min, a_hour, a_date, a_mon, a_year, a_armed;
/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);
/* read RTC registers */
do {
sec = rtc->BCDSEC;
min = rtc->BCDMIN;
hour = rtc->BCDHOUR;
mday = rtc->BCDDATE;
wday = rtc->BCDDAY;
mon = rtc->BCDMON;
year = rtc->BCDYEAR;
} while (sec != rtc->BCDSEC);
sec = readb(&rtc->BCDSEC);
min = readb(&rtc->BCDMIN);
hour = readb(&rtc->BCDHOUR);
mday = readb(&rtc->BCDDATE);
wday = readb(&rtc->BCDDAY);
mon = readb(&rtc->BCDMON);
year = readb(&rtc->BCDYEAR);
} while (sec != readb(&rtc->BCDSEC));
/* read ALARM registers */
a_sec = rtc->ALMSEC;
a_min = rtc->ALMMIN;
a_hour = rtc->ALMHOUR;
a_date = rtc->ALMDATE;
a_mon = rtc->ALMMON;
a_year = rtc->ALMYEAR;
a_armed = rtc->RTCALM;
a_sec = readb(&rtc->ALMSEC);
a_min = readb(&rtc->ALMMIN);
a_hour = readb(&rtc->ALMHOUR);
a_date = readb(&rtc->ALMDATE);
a_mon = readb(&rtc->ALMMON);
a_year = readb(&rtc->ALMYEAR);
a_armed = readb(&rtc->RTCALM);
/* disable access to RTC registers */
SetRTC_Access(RTC_DISABLE);
#ifdef RTC_DEBUG
printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
"hr: %02x min: %02x sec: %02x\n",
year, mon, mday, wday,
hour, min, sec);
printf ( "Alarms: %02x: year: %02x month: %02x date: %02x hour: %02x min: %02x sec: %02x\n",
a_armed,
a_year, a_mon, a_date,
a_hour, a_min, a_sec);
printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
"hr: %02x min: %02x sec: %02x\n",
year, mon, mday, wday, hour, min, sec);
printf("Alarms: %02x: year: %02x month: %02x date: %02x hour: "
"%02x min: %02x sec: %02x\n",
a_armed, a_year, a_mon, a_date, a_hour, a_min, a_sec);
#endif
tmp->tm_sec = bcd2bin(sec & 0x7F);
tmp->tm_min = bcd2bin(min & 0x7F);
tmp->tm_sec = bcd2bin(sec & 0x7F);
tmp->tm_min = bcd2bin(min & 0x7F);
tmp->tm_hour = bcd2bin(hour & 0x3F);
tmp->tm_mday = bcd2bin(mday & 0x3F);
tmp->tm_mon = bcd2bin(mon & 0x1F);
tmp->tm_year = bcd2bin(year);
tmp->tm_wday = bcd2bin(wday & 0x07);
if(tmp->tm_year<70)
tmp->tm_year+=2000;
if (tmp->tm_year < 70)
tmp->tm_year += 2000;
else
tmp->tm_year+=1900;
tmp->tm_yday = 0;
tmp->tm_isdst= 0;
tmp->tm_year += 1900;
tmp->tm_yday = 0;
tmp->tm_isdst = 0;
#ifdef RTC_DEBUG
printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
return 0;
}
int rtc_set (struct rtc_time *tmp)
int rtc_set(struct rtc_time *tmp)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
uchar sec, min, hour, mday, wday, mon, year;
#ifdef RTC_DEBUG
printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
year = bin2bcd(tmp->tm_year % 100);
mon = bin2bcd(tmp->tm_mon);
wday = bin2bcd(tmp->tm_wday);
mday = bin2bcd(tmp->tm_mday);
hour = bin2bcd(tmp->tm_hour);
min = bin2bcd(tmp->tm_min);
sec = bin2bcd(tmp->tm_sec);
year = bin2bcd(tmp->tm_year % 100);
mon = bin2bcd(tmp->tm_mon);
wday = bin2bcd(tmp->tm_wday);
mday = bin2bcd(tmp->tm_mday);
hour = bin2bcd(tmp->tm_hour);
min = bin2bcd(tmp->tm_min);
sec = bin2bcd(tmp->tm_sec);
/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);
/* write RTC registers */
rtc->BCDSEC = sec;
rtc->BCDMIN = min;
rtc->BCDHOUR = hour;
rtc->BCDDATE = mday;
rtc->BCDDAY = wday;
rtc->BCDMON = mon;
rtc->BCDYEAR = year;
writeb(sec, &rtc->BCDSEC);
writeb(min, &rtc->BCDMIN);
writeb(hour, &rtc->BCDHOUR);
writeb(mday, &rtc->BCDDATE);
writeb(wday, &rtc->BCDDAY);
writeb(mon, &rtc->BCDMON);
writeb(year, &rtc->BCDYEAR);
/* disable access to RTC registers */
SetRTC_Access(RTC_DISABLE);
@ -161,12 +163,12 @@ int rtc_set (struct rtc_time *tmp)
return 0;
}
void rtc_reset (void)
void rtc_reset(void)
{
S3C24X0_RTC * const rtc = S3C24X0_GetBase_RTC();
struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
rtc->RTCCON = (rtc->RTCCON & ~0x06) | 0x08;
rtc->RTCCON &= ~(0x08|0x01);
writeb((readb(&rtc->RTCCON) & ~0x06) | 0x08, &rtc->RTCCON);
writeb(readb(&rtc->RTCCON) & ~(0x08 | 0x01), &rtc->RTCCON);
}
#endif

View File

@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
#elif defined(CONFIG_SERIAL3)
# if defined(CONFIG_TRAB)
# #error "TRAB supports only CONFIG_SERIAL1"
# error "TRAB supports only CONFIG_SERIAL1"
# endif
#define UART_NR S3C24X0_UART2
@ -46,51 +46,71 @@ DECLARE_GLOBAL_DATA_PTR;
#error "Bad: you didn't configure serial ..."
#endif
#include <asm/io.h>