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Code cleanup for GCC-3.3.x compilers

This commit is contained in:
wdenk 2004-10-17 21:12:06 +00:00
parent 8b74bf31fe
commit e86e5a0748
22 changed files with 969 additions and 998 deletions
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7
README
View File

@ -25,9 +25,10 @@ Summary:
========
This directory contains the source code for U-Boot, a boot loader for
Embedded boards based on PowerPC and ARM processors, which can be
installed in a boot ROM and used to initialize and test the hardware
or to download and run application code.
Embedded boards based on PowerPC, ARM, MIPS and several other
processors, which can be installed in a boot ROM and used to
initialize and test the hardware or to download and run application
code.
The development of U-Boot is closely related to Linux: some parts of
the source code originate in the Linux source tree, we have some

2
board/ep7312/flash.c
View File

@ -109,7 +109,7 @@ void flash_print_info (flash_info_t * info)
}
printf ("\n");
Done:
Done: ;
}
/*-----------------------------------------------------------------------

3
board/evb4510/flash.c
View File

@ -362,8 +362,7 @@ unsigned long flash_init (void)
}
#endif
else {
printf (__FUNCTION__
"(): Unable to detect PHYS_FLASH_1: 0x%08x\n",
printf ("flash_init(): Unable to detect PHYS_FLASH_1: 0x%08x\n",
PHYS_FLASH_1);
}

566
board/impa7/flash.c
View File

@ -28,338 +28,330 @@
#define MAIN_SECT_SIZE 0x20000
#define PARAM_SECT_SIZE 0x4000
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
/*-----------------------------------------------------------------------
*/
ulong flash_init(void)
ulong flash_init (void)
{
int i, j;
ulong size = 0;
int i, j;
ulong size = 0;
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
{
ulong flashbase = 0;
flash_info[i].flash_id =
(INTEL_MANUFACT & FLASH_VENDMASK) |
(INTEL_ID_28F320B3T & FLASH_TYPEMASK);
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else if (i == 1)
flashbase = PHYS_FLASH_2;
else
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 7)
{
flash_info[i].start[j] = flashbase + j * PARAM_SECT_SIZE;
}
else
{
flash_info[i].start[j] = flashbase + (j - 7)*MAIN_SECT_SIZE;
}
}
size += flash_info[i].size;
}
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
ulong flashbase = 0;
/* Protect monitor and environment sectors
*/
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
&flash_info[0]);
return size;
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t *info)
{
int i;
switch (info->flash_id & FLASH_VENDMASK)
{
case (INTEL_MANUFACT & FLASH_VENDMASK):
printf("Intel: ");
break;
default:
printf("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK)
{
case (INTEL_ID_28F320B3T & FLASH_TYPEMASK):
printf("28F320F3B (16Mbit)\n");
break;
default:
printf("Unknown Chip Type\n");
goto Done;
break;
}
printf(" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf(" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++)
{
if ((i % 5) == 0)
{
printf ("\n ");
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
Done:
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
int flag, prot, sect;
int rc = ERR_OK;
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
if ((info->flash_id & FLASH_VENDMASK) !=
(INTEL_MANUFACT & FLASH_VENDMASK)) {
return ERR_UNKNOWN_FLASH_VENDOR;
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot)
return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
flag = disable_interrupts();
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last && !ctrlc(); sect++) {
printf("Erasing sector %2d ... ", sect);
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
if (info->protect[sect] == 0) { /* not protected */
vu_long *addr = (vu_long *)(info->start[sect]);
*addr = 0x00200020; /* erase setup */
*addr = 0x00D000D0; /* erase confirm */
while ((*addr & 0x00800080) != 0x00800080) {
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) {
*addr = 0x00B000B0; /* suspend erase */
*addr = 0x00FF00FF; /* reset to read mode */
rc = ERR_TIMOUT;
goto outahere;
flash_info[i].flash_id =
(INTEL_MANUFACT & FLASH_VENDMASK) |
(INTEL_ID_28F320B3T & FLASH_TYPEMASK);
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else if (i == 1)
flashbase = PHYS_FLASH_2;
else
panic ("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++) {
if (j <= 7) {
flash_info[i].start[j] =
flashbase + j * PARAM_SECT_SIZE;
} else {
flash_info[i].start[j] =
flashbase + (j - 7) * MAIN_SECT_SIZE;
}
}
}
*addr = 0x00FF00FF; /* reset to read mode */
size += flash_info[i].size;
}
printf("ok.\n");
}
if (ctrlc())
printf("User Interrupt!\n");
outahere:
/* Protect monitor and environment sectors
*/
flash_protect (FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
/* allow flash to settle - wait 10 ms */
udelay_masked(10000);
flash_protect (FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
if (flag)
enable_interrupts();
return size;
}
return rc;
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t * info)
{
int i;
switch (info->flash_id & FLASH_VENDMASK) {
case (INTEL_MANUFACT & FLASH_VENDMASK):
printf ("Intel: ");
break;
default:
printf ("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case (INTEL_ID_28F320B3T & FLASH_TYPEMASK):
printf ("28F320F3B (16Mbit)\n");
break;
default:
printf ("Unknown Chip Type\n");
goto Done;
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++) {
if ((i % 5) == 0) {
printf ("\n ");
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
Done:;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
int flag, prot, sect;
int rc = ERR_OK;
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
if ((info->flash_id & FLASH_VENDMASK) !=
(INTEL_MANUFACT & FLASH_VENDMASK)) {
return ERR_UNKNOWN_FLASH_VENDOR;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot)
return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
flag = disable_interrupts ();
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
printf ("Erasing sector %2d ... ", sect);
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
if (info->protect[sect] == 0) { /* not protected */
vu_long *addr = (vu_long *) (info->start[sect]);
*addr = 0x00200020; /* erase setup */
*addr = 0x00D000D0; /* erase confirm */
while ((*addr & 0x00800080) != 0x00800080) {
if (get_timer_masked () >
CFG_FLASH_ERASE_TOUT) {
*addr = 0x00B000B0; /* suspend erase */
*addr = 0x00FF00FF; /* reset to read mode */
rc = ERR_TIMOUT;
goto outahere;
}
}
*addr = 0x00FF00FF; /* reset to read mode */
}
printf ("ok.\n");
}
if (ctrlc ())
printf ("User Interrupt!\n");
outahere:
/* allow flash to settle - wait 10 ms */
udelay_masked (10000);
if (flag)
enable_interrupts ();
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash
*/
static int write_word (flash_info_t *info, ulong dest, ulong data)
static int write_word (flash_info_t * info, ulong dest, ulong data)
{
vu_long *addr = (vu_long *)dest;
ulong barf;
int rc = ERR_OK;
int flag;
vu_long *addr = (vu_long *) dest;
ulong barf;
int rc = ERR_OK;
int flag;
/* Check if Flash is (sufficiently) erased
*/
if ((*addr & data) != data)
return ERR_NOT_ERASED;
/* Check if Flash is (sufficiently) erased
*/
if ((*addr & data) != data)
return ERR_NOT_ERASED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
flag = disable_interrupts();
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
flag = disable_interrupts ();
/* clear status register command */
*addr = 0x00500050;
/* clear status register command */
*addr = 0x00500050;
/* program set-up command */
*addr = 0x00400040;
/* program set-up command */
*addr = 0x00400040;
/* latch address/data */
*addr = data;
/* latch address/data */
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
/* read status register command */
*addr = 0x00700070;
/* read status register command */
*addr = 0x00700070;
/* wait while polling the status register */
while((*addr & 0x00800080) != 0x00800080)
{
if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) {
rc = ERR_TIMOUT;
/* suspend program command */
*addr = 0x00B000B0;
goto outahere;
/* wait while polling the status register */
while ((*addr & 0x00800080) != 0x00800080) {
if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
rc = ERR_TIMOUT;
/* suspend program command */
*addr = 0x00B000B0;
goto outahere;
}
if (*addr & 0x003A003A) { /* check for error */
barf = *addr;
if (barf & 0x003A0000) {
barf >>= 16;
} else {
barf &= 0x0000003A;
}
printf ("\nFlash write error %02lx at address %08lx\n", barf, (unsigned long) dest);
if (barf & 0x0002) {
printf ("Block locked, not erased.\n");
rc = ERR_NOT_ERASED;
goto outahere;
}
if (barf & 0x0010) {
printf ("Programming error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
if (barf & 0x0008) {
printf ("Vpp Low error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
rc = ERR_PROG_ERROR;
goto outahere;
}
}
if( *addr & 0x003A003A) { /* check for error */
barf = *addr;
if( barf & 0x003A0000) {
barf >>=16;
} else {
barf &= 0x0000003A;
}
printf("\nFlash write error %02lx at address %08lx\n",
barf, (unsigned long)dest);
if(barf & 0x0002) {
printf("Block locked, not erased.\n");
rc = ERR_NOT_ERASED;
goto outahere;
}
if(barf & 0x0010) {
printf("Programming error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
if(barf & 0x0008) {
printf("Vpp Low error.\n");
rc = ERR_PROG_ERROR;
goto outahere;
}
rc = ERR_PROG_ERROR;
goto outahere;
}
}
outahere:
/* read array command */
*addr = 0x00FF00FF;
outahere:
/* read array command */
*addr = 0x00FF00FF;
if (flag)
enable_interrupts ();
if (flag)
enable_interrupts();
return rc;
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash.
*/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
ulong cp, wp, data;
int l;
int i, rc;
ulong cp, wp, data;
int l;
int i, rc;
wp = (addr & ~3); /* get lower word aligned address */
wp = (addr & ~3); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 24);
}
for (; i < 4 && cnt > 0; ++i) {
data = (data >> 8) | (*src++ << 24);
--cnt;
++cp;
}
for (; cnt == 0 && i < 4; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 24);
}
if ((rc = write_word (info, wp, data)) != 0) {
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while (cnt >= 4) {
data = *((vu_long *) src);
if ((rc = write_word (info, wp, data)) != 0) {
return (rc);
}
src += 4;
wp += 4;
cnt -= 4;
}
if (cnt == 0) {
return ERR_OK;
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 24);
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 24);
--cnt;
}
for (; i<4 && cnt>0; ++i) {
data = (data >> 8) | (*src++ << 24);
--cnt;
++cp;
}
for (; cnt==0 && i<4; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 24);
for (; i < 4; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 24);
}
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
wp += 4;
}
/*
* handle word aligned part
*/
while (cnt >= 4) {
data = *((vu_long*)src);
if ((rc = write_word(info, wp, data)) != 0) {
return (rc);
}
src += 4;
wp += 4;
cnt -= 4;
}
if (cnt == 0) {
return ERR_OK;
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 24);
--cnt;
}
for (; i<4; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 24);
}
return write_word(info, wp, data);
return write_word (info, wp, data);
}

1
board/lart/flash.c
View File

@ -159,6 +159,7 @@ void flash_print_info (flash_info_t *info)
printf ("\n");
Done:
;
}
/*-----------------------------------------------------------------------

617
board/mpl/vcma9/flash.c
View File

@ -24,13 +24,13 @@
#include <common.h>
ulong myflush(void);
ulong myflush (void);
#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#define CMD_READ_ARRAY 0x000000F0
@ -47,7 +47,7 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#define BIT_ERASE_DONE 0x00000080
#define BIT_RDY_MASK 0x00000080
#define BIT_PROGRAM_ERROR 0x00000020
#define BIT_TIMEOUT 0x80000000 /* our flag */
#define BIT_TIMEOUT 0x80000000 /* our flag */
#define READY 1
#define ERR 2
@ -56,390 +56,377 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
/*-----------------------------------------------------------------------
*/
ulong flash_init(void)
ulong flash_init (void)
{
int i, j;
ulong size = 0;
int i, j;
ulong size = 0;
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
{
ulong flashbase = 0;
flash_info[i].flash_id =
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
ulong flashbase = 0;
flash_info[i].flash_id =
#if defined(CONFIG_AMD_LV400)
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV400B & FLASH_TYPEMASK);
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV400B & FLASH_TYPEMASK);
#elif defined(CONFIG_AMD_LV800)
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV800B & FLASH_TYPEMASK);
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV800B & FLASH_TYPEMASK);
#else
#error "Unknown flash configured"
#endif
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 3)
{
/* 1st one is 16 KB */
if (j == 0)
{
flash_info[i].start[j] = flashbase + 0;
}
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic ("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++) {
if (j <= 3) {
/* 1st one is 16 KB */
if (j == 0) {
flash_info[i].start[j] =
flashbase + 0;
}
/* 2nd and 3rd are both 8 KB */
if ((j == 1) || (j == 2))
{
flash_info[i].start[j] = flashbase + 0x4000 + (j-1)*0x2000;
}
/* 2nd and 3rd are both 8 KB */
if ((j == 1) || (j == 2)) {
flash_info[i].start[j] =
flashbase + 0x4000 + (j -
1) *
0x2000;
}
/* 4th 32 KB */
if (j == 3)
{
flash_info[i].start[j] = flashbase + 0x8000;
/* 4th 32 KB */
if (j == 3) {
flash_info[i].start[j] =
flashbase + 0x8000;
}
} else {
flash_info[i].start[j] =
flashbase + (j - 3) * MAIN_SECT_SIZE;
}
}
}
else
{
flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE;
}
size += flash_info[i].size;
}
size += flash_info[i].size;
}
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect (FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
&flash_info[0]);
flash_protect (FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
return size;
return size;
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t *info)
void flash_print_info (flash_info_t * info)
{
int i;
int i;
switch (info->flash_id & FLASH_VENDMASK)
{
case (AMD_MANUFACT & FLASH_VENDMASK):
puts("AMD: ");
break;
default:
puts("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK)
{
case (AMD_ID_LV400B & FLASH_TYPEMASK):
puts("1x Amd29LV400BB (4Mbit)\n");
break;
case (AMD_ID_LV800B & FLASH_TYPEMASK):
puts("1x Amd29LV800BB (8Mbit)\n");
break;
default:
puts("Unknown Chip Type\n");
goto Done;
break;
}
printf(" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
puts(" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++)
{
if ((i % 5) == 0)
{
puts("\n ");
switch (info->flash_id & FLASH_VENDMASK) {
case (AMD_MANUFACT & FLASH_VENDMASK):
puts ("AMD: ");
break;
default:
puts ("Unknown Vendor ");
break;
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
puts("\n");
Done:
switch (info->flash_id & FLASH_TYPEMASK) {
case (AMD_ID_LV400B & FLASH_TYPEMASK):
puts ("1x Amd29LV400BB (4Mbit)\n");
break;
case (AMD_ID_LV800B & FLASH_TYPEMASK):
puts ("1x Amd29LV800BB (8Mbit)\n");
break;
default:
puts ("Unknown Chip Type\n");
goto Done;
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
puts (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++) {
if ((i % 5) == 0) {
puts ("\n ");
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
puts ("\n");
Done: ;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t *info, int s_first, int s_last)
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
ushort result;
int iflag, cflag, prot, sect;
int rc = ERR_OK;
int chip;
ushort result;
int iflag, cflag, prot, sect;
int rc = ERR_OK;
int chip;
/* first look for protection bits */
/* first look for protection bits */
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
if ((info->flash_id & FLASH_VENDMASK) !=
(AMD_MANUFACT & FLASH_VENDMASK)) {
return ERR_UNKNOWN_FLASH_VENDOR;
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
if (info->protect[sect]) {
prot++;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
}
if (prot)
return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status();
icache_disable();
iflag = disable_interrupts();
if ((info->flash_id & FLASH_VENDMASK) !=
(AMD_MANUFACT & FLASH_VENDMASK)) {
return ERR_UNKNOWN_FLASH_VENDOR;
}
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
{
printf("Erasing sector %2d ... ", sect);
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
if (info->protect[sect] == 0)
{ /* not protected */
vu_short *addr = (vu_short *)(info->start[sect]);
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
*addr = CMD_ERASE_CONFIRM;
/* wait until flash is ready */
chip = 0;
do
{
result = *addr;
/* check timeout */
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
{
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
chip = TMO;
break;
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
if (!chip && (result & 0xFFFF) & BIT_ERASE_DONE)
chip = READY;
if (!chip && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
chip = ERR;
} while (!chip);
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
if (chip == ERR)
{
rc = ERR_PROG_ERROR;
goto outahere;
}
if (chip == TMO)
{
rc = ERR_TIMOUT;
goto outahere;
}
puts("ok.\n");
}
else /* it was protected */
{
puts("protected!\n");
if (prot)
return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status ();
icache_disable ();
iflag = disable_interrupts ();
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
printf ("Erasing sector %2d ... ", sect);
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
if (info->protect[sect] == 0) { /* not protected */
vu_short *addr = (vu_short *) (info->start[sect]);
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
*addr = CMD_ERASE_CONFIRM;
/* wait until flash is ready */
chip = 0;
do {
result = *addr;
/* check timeout */
if (get_timer_masked () >
CFG_FLASH_ERASE_TOUT) {
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
chip = TMO;
break;
}
if (!chip
&& (result & 0xFFFF) & BIT_ERASE_DONE)
chip = READY;
if (!chip
&& (result & 0xFFFF) & BIT_PROGRAM_ERROR)
chip = ERR;
} while (!chip);
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
if (chip == ERR) {
rc = ERR_PROG_ERROR;
goto outahere;
}
if (chip == TMO) {
rc = ERR_TIMOUT;
goto outahere;
}
puts ("ok.\n");
} else { /* it was protected */
puts ("protected!\n");
}
}
}
if (ctrlc())
puts("User Interrupt!\n");
if (ctrlc ())
puts ("User Interrupt!\n");
outahere:
/* allow flash to settle - wait 10 ms */
udelay_masked(10000);
outahere:
/* allow flash to settle - wait 10 ms */
udelay_masked (10000);
if (iflag)
enable_interrupts();
if (iflag)
enable_interrupts ();
if (cflag)
icache_enable();
if (cflag)
icache_enable ();
return rc;
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash
*/
volatile static int write_hword (flash_info_t *info, ulong dest, ushort data)
volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
{
vu_short *addr = (vu_short *)dest;
ushort result;
int rc = ERR_OK;
int cflag, iflag;
int chip;
vu_short *addr = (vu_short *) dest;
ushort result;
int rc = ERR_OK;
int cflag, iflag;
int chip;
/*
* Check if Flash is (sufficiently) erased
*/
result = *addr;
if ((result & data) != data)
return ERR_NOT_ERASED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status();
icache_disable();
iflag = disable_interrupts();
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_PROGRAM;
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
/* wait until flash is ready */
chip = 0;
do
{
/*
* Check if Flash is (sufficiently) erased
*/
result = *addr;
if ((result & data) != data)
return ERR_NOT_ERASED;
/* check timeout */
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
{
chip = ERR | TMO;
break;
}
if (!chip && ((result & 0x80) == (data & 0x80)))
chip = READY;
if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR))
{
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status ();
icache_disable ();
iflag = disable_interrupts ();
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_PROGRAM;
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
/* wait until flash is ready */
chip = 0;
do {
result = *addr;
if ((result & 0x80) == (data & 0x80))
/* check timeout */
if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
chip = ERR | TMO;
break;
}
if (!chip && ((result & 0x80) == (data & 0x80)))
chip = READY;
else
chip = ERR;
}
} while (!chip);
if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
result = *addr;
*addr = CMD_READ_ARRAY;
if ((result & 0x80) == (data & 0x80))
chip = READY;
else
chip = ERR;
}
if (chip == ERR || *addr != data)
rc = ERR_PROG_ERROR;
} while (!chip);
if (iflag)
enable_interrupts();
*addr = CMD_READ_ARRAY;
if (cflag)
icache_enable();
if (chip == ERR || *addr != data)
rc = ERR_PROG_ERROR;
return rc;
if (iflag)
enable_interrupts ();
if (cflag)
icache_enable ();
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash.
*/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
ulong cp, wp;
int l;
int i, rc;
ushort data;
ulong cp, wp;
int l;
int i, rc;
ushort data;
wp = (addr & ~1); /* get lower word aligned address */
wp = (addr & ~1); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 8);
}
for (; i < 2 && cnt > 0; ++i) {
data = (data >> 8) | (*src++ << 8);
--cnt;
++cp;
}
for (; cnt == 0 && i < 2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 8);
}
if ((rc = write_hword (info, wp, data)) != 0) {
return (rc);
}
wp += 2;
}
/*
* handle word aligned part
*/
while (cnt >= 2) {
data = *((vu_short *) src);
if ((rc = write_hword (info, wp, data)) != 0) {
return (rc);
}
src += 2;
wp += 2;
cnt -= 2;
}
if (cnt == 0) {
return ERR_OK;
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 8);
--cnt;
}
for (; i<2 && cnt>0; ++i) {
data = (data >> 8) | (*src++ << 8);
--cnt;
++cp;
}
for (; cnt==0 && i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
for (; i < 2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 8);
}
if ((rc = write_hword(info, wp, data)) != 0) {
return (rc);
}
wp += 2;
}
/*
* handle word aligned part
*/
while (cnt >= 2) {
data = *((vu_short*)src);
if ((rc = write_hword(info, wp, data)) != 0) {
return (rc);
}
src += 2;
wp += 2;
cnt -= 2;
}
if (cnt == 0) {
return ERR_OK;
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 8);
--cnt;
}
for (; i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
}
return write_hword(info, wp, data);
return write_hword (info, wp, data);
}

1
board/shannon/flash.c
View File

@ -178,6 +178,7 @@ void flash_print_info (flash_info_t *info)
printf ("\n");
Done:
;
}
/*-----------------------------------------------------------------------

2
board/smdk2400/flash.c
View File

@ -149,7 +149,7 @@ void flash_print_info (flash_info_t * info)
}
printf ("\n");
Done:
Done: ;
}
/*-----------------------------------------------------------------------

619
board/smdk2410/flash.c
View File

@ -24,13 +24,13 @@
#include <common.h>
ulong myflush(void);
ulong myflush (void);
#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#define CMD_READ_ARRAY 0x000000F0
@ -47,7 +47,7 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#define BIT_ERASE_DONE 0x00000080
#define BIT_RDY_MASK 0x00000080
#define BIT_PROGRAM_ERROR 0x00000020
#define BIT_TIMEOUT 0x80000000 /* our flag */
#define BIT_TIMEOUT 0x80000000 /* our flag */
#define READY 1
#define ERR 2
@ -56,391 +56,378 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
/*-----------------------------------------------------------------------
*/
ulong flash_init(void)
ulong flash_init (void)
{
int i, j;
ulong size = 0;
int i, j;
ulong size = 0;
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++)
{
ulong flashbase = 0;
flash_info[i].flash_id =
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
ulong flashbase = 0;
flash_info[i].flash_id =
#if defined(CONFIG_AMD_LV400)
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV400B & FLASH_TYPEMASK);
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV400B & FLASH_TYPEMASK);
#elif defined(CONFIG_AMD_LV800)
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV800B & FLASH_TYPEMASK);
(AMD_MANUFACT & FLASH_VENDMASK) |
(AMD_ID_LV800B & FLASH_TYPEMASK);
#else
#error "Unknown flash configured"
#endif
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++)
{
if (j <= 3)
{
/* 1st one is 16 KB */
if (j == 0)
{
flash_info[i].start[j] = flashbase + 0;
}
flash_info[i].size = FLASH_BANK_SIZE;
flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
if (i == 0)
flashbase = PHYS_FLASH_1;
else
panic ("configured too many flash banks!\n");
for (j = 0; j < flash_info[i].sector_count; j++) {
if (j <= 3) {
/* 1st one is 16 KB */
if (j == 0) {
flash_info[i].start[j] =
flashbase + 0;
}
/* 2nd and 3rd are both 8 KB */
if ((j == 1) || (j == 2))
{
flash_info[i].start[j] = flashbase + 0x4000 + (j-1)*0x2000;
}
/* 2nd and 3rd are both 8 KB */
if ((j == 1) || (j == 2)) {
flash_info[i].start[j] =
flashbase + 0x4000 + (j -
1) *
0x2000;
}
/* 4th 32 KB */
if (j == 3)
{
flash_info[i].start[j] = flashbase + 0x8000;
/* 4th 32 KB */
if (j == 3) {
flash_info[i].start[j] =
flashbase + 0x8000;
}
} else {
flash_info[i].start[j] =
flashbase + (j - 3) * MAIN_SECT_SIZE;
}
}
}
else
{
flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE;
}
size += flash_info[i].size;
}
size += flash_info[i].size;
}
flash_protect(FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect (FLAG_PROTECT_SET,
CFG_FLASH_BASE,
CFG_FLASH_BASE + monitor_flash_len - 1,
&flash_info[0]);
flash_protect(FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
&flash_info[0]);
flash_protect (FLAG_PROTECT_SET,
CFG_ENV_ADDR,
CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
return size;
return size;
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t *info)
void flash_print_info (flash_info_t * info)
{
int i;
int i;
switch (info->flash_id & FLASH_VENDMASK)
{
case (AMD_MANUFACT & FLASH_VENDMASK):
printf("AMD: ");
break;
default:
printf("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK)
{
case (AMD_ID_LV400B & FLASH_TYPEMASK):
printf("1x Amd29LV400BB (4Mbit)\n");
break;
case (AMD_ID_LV800B & FLASH_TYPEMASK):
printf("1x Amd29LV800BB (8Mbit)\n");
break;
default:
printf("Unknown Chip Type\n");
goto Done;
break;
}
printf(" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf(" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++)
{
if ((i % 5) == 0)
{
printf ("\n ");
switch (info->flash_id & FLASH_VENDMASK) {
case (AMD_MANUFACT & FLASH_VENDMASK):
printf ("AMD: ");
break;
default:
printf ("Unknown Vendor ");
break;
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
Done:
switch (info->flash_id & FLASH_TYPEMASK) {
case (AMD_ID_LV400B & FLASH_TYPEMASK):
printf ("1x Amd29LV400BB (4Mbit)\n");
break;
case (AMD_ID_LV800B & FLASH_TYPEMASK):
printf ("1x Amd29LV800BB (8Mbit)\n");
break;
default:
printf ("Unknown Chip Type\n");
goto Done;
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; i++) {
if ((i % 5) == 0) {
printf ("\n ");
}
printf (" %08lX%s", info->start[i],
info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
Done:;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t *info, int s_first, int s_last)
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
ushort result;
int iflag, cflag, prot, sect;
int rc = ERR_OK;
int chip;
ushort result;
int iflag, cflag, prot, sect;
int rc = ERR_OK;
int chip;
/* first look for protection bits */
/* first look for protection bits */
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if (info->flash_id == FLASH_UNKNOWN)
return ERR_UNKNOWN_FLASH_TYPE;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
if ((info->flash_id & FLASH_VENDMASK) !=
(AMD_MANUFACT & FLASH_VENDMASK)) {
return ERR_UNKNOWN_FLASH_VENDOR;
}
prot = 0;
for (sect=s_first; sect<=s_last; ++sect) {
if (info->protect[sect]) {
prot++;
if ((s_first < 0) || (s_first > s_last)) {
return ERR_INVAL;
}
}
if (prot)
return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status();
icache_disable();
iflag = disable_interrupts();
if ((info->flash_id & FLASH_VENDMASK) !=
(AMD_MANUFACT & FLASH_VENDMASK)) {
return ERR_UNKNOWN_FLASH_VENDOR;
}
/* Start erase on unprotected sectors */
for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
{
printf("Erasing sector %2d ... ", sect);
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
if (info->protect[sect] == 0)
{ /* not protected */
vu_short *addr = (vu_short *)(info->start[sect]);
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
*addr = CMD_ERASE_CONFIRM;
/* wait until flash is ready */
chip = 0;
do
{
result = *addr;
/* check timeout */
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
{
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
chip = TMO;
break;
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
if (!chip && (result & 0xFFFF) & BIT_ERASE_DONE)
chip = READY;
if (!chip && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
chip = ERR;
} while (!chip);
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
if (chip == ERR)
{
rc = ERR_PROG_ERROR;
goto outahere;
}
if (chip == TMO)
{
rc = ERR_TIMOUT;
goto outahere;
}
printf("ok.\n");
}
else /* it was protected */
{
printf("protected!\n");
if (prot)
return ERR_PROTECTED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status ();
icache_disable ();
iflag = disable_interrupts ();
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
printf ("Erasing sector %2d ... ", sect);
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
if (info->protect[sect] == 0) { /* not protected */
vu_short *addr = (vu_short *) (info->start[sect]);
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
*addr = CMD_ERASE_CONFIRM;
/* wait until flash is ready */
chip = 0;
do {
result = *addr;
/* check timeout */
if (get_timer_masked () >
CFG_FLASH_ERASE_TOUT) {
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
chip = TMO;
break;
}
if (!chip
&& (result & 0xFFFF) & BIT_ERASE_DONE)
chip = READY;
if (!chip
&& (result & 0xFFFF) & BIT_PROGRAM_ERROR)
chip = ERR;
} while (!chip);
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
if (chip == ERR) {
rc = ERR_PROG_ERROR;
goto outahere;
}
if (chip == TMO) {
rc = ERR_TIMOUT;
goto outahere;
}
printf ("ok.\n");
} else { /* it was protected */
printf ("protected!\n");
}
}
}
if (ctrlc())
printf("User Interrupt!\n");
if (ctrlc ())
printf ("User Interrupt!\n");
outahere:
/* allow flash to settle - wait 10 ms */
udelay_masked(10000);
outahere:
/* allow flash to settle - wait 10 ms */
udelay_masked (10000);
if (iflag)
enable_interrupts();
if (iflag)
enable_interrupts ();
if (cflag)
icache_enable();
if (cflag)
icache_enable ();
return rc;
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash
*/
volatile static int write_hword (flash_info_t *info, ulong dest, ushort data)
volatile static int write_hword (flash_info_t * info, ulong dest, ushort data)
{
vu_short *addr = (vu_short *)dest;
ushort result;
int rc = ERR_OK;
int cflag, iflag;
int chip;
vu_short *addr = (vu_short *) dest;
ushort result;
int rc = ERR_OK;
int cflag, iflag;
int chip;
/*
* Check if Flash is (sufficiently) erased
*/
result = *addr;
if ((result & data) != data)
return ERR_NOT_ERASED;
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status();
icache_disable();
iflag = disable_interrupts();
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
*addr = CMD_PROGRAM;
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked();
/* wait until flash is ready */
chip = 0;
do
{
/*
* Check if Flash is (sufficiently) erased
*/
result = *addr;
if ((result & data) != data)
return ERR_NOT_ERASED;
/* check timeout */
if (get_timer_masked() > CFG_FLASH_ERASE_TOUT)
{
chip = ERR | TMO;
break;
}
if (!chip && ((result & 0x80) == (data & 0x80)))
chip = READY;
if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR))
{
/*
* Disable interrupts which might cause a timeout
* here. Remember that our exception vectors are
* at address 0 in the flash, and we don't want a
* (ticker) exception to happen while the flash
* chip is in programming mode.
*/
cflag = icache_status ();
icache_disable ();
iflag = disable_interrupts ();
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
*addr = CMD_PROGRAM;
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
/* wait until flash is ready */
chip = 0;
do {
result = *addr;
if ((result & 0x80) == (data & 0x80))
/* check timeout */
if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
chip = ERR | TMO;
break;
}
if (!chip && ((result & 0x80) == (data & 0x80)))
chip = READY;
else
chip = ERR;
}
} while (!chip);
if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
result = *addr;
*addr = CMD_READ_ARRAY;
if ((result & 0x80) == (data & 0x80))
chip = READY;
else
chip = ERR;
}
if (chip == ERR || *addr != data)
rc = ERR_PROG_ERROR;
} while (!chip);
if (iflag)
enable_interrupts();
*addr = CMD_READ_ARRAY;
if (cflag)
icache_enable();
if (chip == ERR || *addr != data)
rc = ERR_PROG_ERROR;
return rc;
if (iflag)
enable_interrupts ();
if (cflag)
icache_enable ();
return rc;
}
/*-----------------------------------------------------------------------
* Copy memory to flash.
*/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
ulong cp, wp;
int l;
int i, rc;
ushort data;
ulong cp, wp;
int l;
int i, rc;
ushort data;
wp = (addr & ~1); /* get lower word aligned address */
wp = (addr & ~1); /* get lower word aligned address */
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 8);
}
for (; i < 2 && cnt > 0; ++i) {
data = (data >> 8) | (*src++ << 8);
--cnt;
++cp;
}
for (; cnt == 0 && i < 2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 8);
}
if ((rc = write_hword (info, wp, data)) != 0) {
return (rc);
}
wp += 2;
}
/*
* handle word aligned part
*/
while (cnt >= 2) {
data = *((vu_short *) src);
if ((rc = write_hword (info, wp, data)) != 0) {
return (rc);
}
src += 2;
wp += 2;
cnt -= 2;
}
if (cnt == 0) {
return ERR_OK;
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<l; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 8);
--cnt;
}
for (; i<2 && cnt>0; ++i) {
data = (data >> 8) | (*src++ << 8);
--cnt;
++cp;
}
for (; cnt==0 && i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
for (; i < 2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *) cp << 8);
}
if ((rc = write_hword(info, wp, data)) != 0) {
return (rc);
}
wp += 2;
}
/*
* handle word aligned part
*/
while (cnt >= 2) {
data = *((vu_short*)src);
if ((rc = write_hword(info, wp, data)) != 0) {
return (rc);
}
src += 2;
wp += 2;
cnt -= 2;
}
if (cnt == 0) {
return ERR_OK;
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) {
data = (data >> 8) | (*src++ << 8);
--cnt;
}
for (; i<2; ++i, ++cp) {
data = (data >> 8) | (*(uchar *)cp << 8);
}
return write_hword(info, wp, data);
return write_hword (info, wp, data);
}

1
board/trab/cmd_trab.c
View File

@ -718,6 +718,7 @@ static void led_set (unsigned int state)
gpio->PADAT &= ~(1 << 12);
break;
default:
break;
}
}

2
board/trab/flash.c
View File

@ -166,7 +166,7 @@ void flash_print_info (flash_info_t * info)
}
printf ("\n");
Done:
Done: ;
}
/*-----------------------------------------------------------------------

2
board/trab/memory.c
View File

@ -479,7 +479,7 @@ int memory_post_test (int flags)
return ret;
}
#endif 0
#endif /* 0 */
/* #endif */ /* CONFIG_POST & CFG_POST_MEMORY */
/* #endif */ /* CONFIG_POST */

2
board/trab/trab_fkt.c
View File

@ -35,7 +35,7 @@
* command do_touch is invoked and the touch is not pressed within an specific
* interval.
*/
#undef CONFIG_TOUCH_WAIT_PRESSED 1
#undef CONFIG_TOUCH_WAIT_PRESSED
/* max time to wait for touch is pressed */
#ifndef CONFIG_TOUCH_WAIT_PRESSED

1
board/versatile/flash.c
View File

@ -239,7 +239,6 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
info->flash_id += FLASH_28F256K3;
info->sector_count = 256;
info->size = 0x02000000;
printf ("\Intel StrataFlash 28F256K3C device initialized\n");
break;
default:

2
board/xsengine/Makefile
View File

@ -40,7 +40,7 @@ distclean: clean
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M --disassemble-all $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-include .depend

4
common/usb.c
View File

@ -925,7 +925,9 @@ int usb_hub_configure(struct usb_device *dev)
}
descriptor = (struct usb_hub_descriptor *)buffer;
if (descriptor->bLength > USB_BUFSIZ) {
/* silence compiler warning if USB_BUFSIZ is > 256 [= sizeof(char)] */
i = descriptor->bLength;
if (i > USB_BUFSIZ) {
USB_HUB_PRINTF("usb_hub_configure: failed to get hub descriptor - too long: %d\N",
descriptor->bLength);
return -1;

1
cpu/arm720t/serial_netarm.c
View File

@ -169,6 +169,7 @@ int serial_getc (void)
break;
default:
/* panic, be never here */
break;
}
serial_reg_ch1->status_a |= NETARM_SER_STATA_RX_CLOSED;

2
cpu/s3c44b0/cpu.c
View File

@ -272,7 +272,7 @@ int i2c_probe(uchar chip)
not implemented
*/
printf(__FUNCTION__ " chip %d\n", (int) chip);
printf("i2c_probe chip %d\n", (int) chip);
return -1;
}

6
cpu/s3c44b0/serial.c
View File

@ -112,7 +112,7 @@ void serial_setbrg (void)
divisor = 121;
#else
# error CONFIG_S3C44B0_CLOCK_SPEED undefined
#endif break;
#endif /* break; */
case 57600:
#if CONFIG_S3C44B0_CLOCK_SPEED==66
@ -121,7 +121,7 @@ void serial_setbrg (void)
divisor = 80;
#else
# error CONFIG_S3C44B0_CLOCK_SPEED undefined
#endif break;
#endif /* break; */
case 115200:
#if CONFIG_S3C44B0_CLOCK_SPEED==66
@ -130,7 +130,7 @@ void serial_setbrg (void)
divisor = 40;
#else
# error CONFIG_S3C44B0_CLOCK_SPEED undefined
#endif break;
#endif /* break; */
}
serial_flush_output();

2
drivers/s3c4510b_eth.c
View File

@ -170,7 +170,7 @@ s32 eth_send(volatile void *packet, s32 length)
ETH *eth = &m_eth;
if ( eth->m_curTX_FD->m_frameDataPtr.bf.owner) {
printf(__FUNCTION__"(): TX Frame. CPU not owner.\n");
printf("eth_send(): TX Frame. CPU not owner.\n");
return -1;
}

122
include/cmd_confdefs.h
View File

@ -30,68 +30,68 @@
/*
* Configurable monitor commands
*/
#define CFG_CMD_BDI 0x00000001U /* bdinfo */
#define CFG_CMD_LOADS 0x00000002U /* loads */
#define CFG_CMD_LOADB 0x00000004U /* loadb */
#define CFG_CMD_IMI 0x00000008U /* iminfo */
#define CFG_CMD_CACHE 0x00000010U /* icache, dcache */
#define CFG_CMD_FLASH 0x00000020U /* flinfo, erase, protect */
#define CFG_CMD_MEMORY 0x00000040U /* md, mm, nm, mw, cp, cmp, */
#define CFG_CMD_BDI 0x00000001ULL /* bdinfo */
#define CFG_CMD_LOADS 0x00000002ULL /* loads */
#define CFG_CMD_LOADB 0x00000004ULL /* loadb */
#define CFG_CMD_IMI 0x00000008ULL /* iminfo */
#define CFG_CMD_CACHE 0x00000010ULL /* icache, dcache */
#define CFG_CMD_FLASH 0x00000020ULL /* flinfo, erase, protect */
#define CFG_CMD_MEMORY 0x00000040ULL /* md, mm, nm, mw, cp, cmp, */
/* crc, base, loop, mtest */
#define CFG_CMD_NET 0x00000080U /* bootp, tftpboot, rarpboot */
#define CFG_CMD_ENV 0x00000100U /* saveenv */
#define CFG_CMD_KGDB 0x00000200U /* kgdb */
#define CFG_CMD_PCMCIA 0x00000400U /* PCMCIA support */
#define CFG_CMD_IDE 0x00000800U /* IDE harddisk support */
#define CFG_CMD_PCI 0x00001000U /* pciinfo */
#define CFG_CMD_IRQ 0x00002000U /* irqinfo */
#define CFG_CMD_BOOTD 0x00004000U /* bootd */
#define CFG_CMD_CONSOLE 0x00008000U /* coninfo */
#define CFG_CMD_EEPROM 0x00010000U /* EEPROM read/write support */
#define CFG_CMD_ASKENV 0x00020000U /* ask for env variable */
#define CFG_CMD_RUN 0x00040000U /* run command in env variable */
#define CFG_CMD_ECHO 0x00080000U /* echo arguments */
#define CFG_CMD_I2C 0x00100000U /* I2C serial bus support */
#define CFG_CMD_REGINFO 0x00200000U /* Register dump */
#define CFG_CMD_IMMAP 0x00400000U /* IMMR dump support */
#define CFG_CMD_DATE 0x00800000U /* support for RTC, date/time...*/
#define CFG_CMD_DHCP 0x01000000U /* DHCP Support */
#define CFG_CMD_BEDBUG 0x02000000U /* Include BedBug Debugger */
#define CFG_CMD_FDC 0x04000000U /* Floppy Disk Support */
#define CFG_CMD_SCSI 0x08000000U /* SCSI Support */
#define CFG_CMD_AUTOSCRIPT 0x10000000U /* Autoscript Support */
#define CFG_CMD_MII 0x20000000U /* MII support */
#define CFG_CMD_SETGETDCR 0x40000000U /* DCR support on 4xx */
#define CFG_CMD_BSP 0x80000000U /* Board Specific functions */
#define CFG_CMD_NET 0x00000080ULL /* bootp, tftpboot, rarpboot */
#define CFG_CMD_ENV 0x00000100ULL /* saveenv */
#define CFG_CMD_KGDB 0x00000200ULL /* kgdb */
#define CFG_CMD_PCMCIA 0x00000400ULL /* PCMCIA support */
#define CFG_CMD_IDE 0x00000800ULL /* IDE harddisk support */
#define CFG_CMD_PCI 0x00001000ULL /* pciinfo */
#define CFG_CMD_IRQ 0x00002000ULL /* irqinfo */
#define CFG_CMD_BOOTD 0x00004000ULL /* bootd */
#define CFG_CMD_CONSOLE 0x00008000ULL /* coninfo */
#define CFG_CMD_EEPROM 0x00010000ULL /* EEPROM read/write support */
#define CFG_CMD_ASKENV 0x00020000ULL /* ask for env variable */
#define CFG_CMD_RUN 0x00040000ULL /* run command in env variable */
#define CFG_CMD_ECHO 0x00080000ULL /* echo arguments */
#define CFG_CMD_I2C 0x00100000ULL /* I2C serial bus support */
#define CFG_CMD_REGINFO 0x00200000ULL /* Register dump */
#define CFG_CMD_IMMAP 0x00400000ULL /* IMMR dump support */
#define CFG_CMD_DATE 0x00800000ULL /* support for RTC, date/time...*/
#define CFG_CMD_DHCP 0x01000000ULL /* DHCP Support */
#define CFG_CMD_BEDBUG 0x02000000ULL /* Include BedBug Debugger */
#define CFG_CMD_FDC 0x04000000ULL /* Floppy Disk Support */
#define CFG_CMD_SCSI 0x08000000ULL /* SCSI Support */
#define CFG_CMD_AUTOSCRIPT 0x10000000ULL /* Autoscript Support */
#define CFG_CMD_MII 0x20000000ULL /* MII support */
#define CFG_CMD_SETGETDCR 0x40000000ULL /* DCR support on 4xx */
#define CFG_CMD_BSP 0x80000000ULL /* Board Specific functions */
#define CFG_CMD_ELF 0x0000000100000000U /* ELF (VxWorks) load/boot cmd */
#define CFG_CMD_MISC 0x0000000200000000U /* Misc functions like sleep etc*/
#define CFG_CMD_USB 0x0000000400000000U /* USB Support */
#define CFG_CMD_DOC 0x0000000800000000U /* Disk-On-Chip Support */
#define CFG_CMD_JFFS2 0x0000001000000000U /* JFFS2 Support */
#define CFG_CMD_DTT 0x0000002000000000U /* Digital Therm and Thermostat */
#define CFG_CMD_SDRAM 0x0000004000000000U /* SDRAM DIMM SPD info printout */
#define CFG_CMD_DIAG 0x0000008000000000U /* Diagnostics */
#define CFG_CMD_FPGA 0x0000010000000000U /* FPGA configuration Support */
#define CFG_CMD_HWFLOW 0x0000020000000000U /* RTS/CTS hw flow control */
#define CFG_CMD_SAVES 0x0000040000000000U /* save S record dump */
#define CFG_CMD_SPI 0x0000100000000000U /* SPI utility */
#define CFG_CMD_FDOS 0x0000200000000000U /* Floppy DOS support */
#define CFG_CMD_VFD 0x0000400000000000U /* VFD support (TRAB) */
#define CFG_CMD_NAND 0x0000800000000000U /* NAND support */
#define CFG_CMD_BMP 0x0001000000000000U /* BMP support */
#define CFG_CMD_PORTIO 0x0002000000000000U /* Port I/O */
#define CFG_CMD_PING 0x0004000000000000U /* ping support */
#define CFG_CMD_MMC 0x0008000000000000U /* MMC support */
#define CFG_CMD_FAT 0x0010000000000000U /* FAT support */
#define CFG_CMD_IMLS 0x0020000000000000U /* List all found images */
#define CFG_CMD_ITEST 0x0040000000000000U /* Integer (and string) test */
#define CFG_CMD_NFS 0x0080000000000000U /* NFS support */
#define CFG_CMD_REISER 0x0100000000000000U /* Reiserfs support */
#define CFG_CMD_CDP 0x0200000000000000U /* Cisco Discovery Protocol */
#define CFG_CMD_XIMG 0x0400000000000000U /* Load part of Multi Image */
#define CFG_CMD_ELF 0x0000000100000000ULL /* ELF (VxWorks) load/boot cmd */
#define CFG_CMD_MISC 0x0000000200000000ULL /* Misc functions like sleep etc*/
#define CFG_CMD_USB 0x0000000400000000ULL /* USB Support */
#define CFG_CMD_DOC 0x0000000800000000ULL /* Disk-On-Chip Support */
#define CFG_CMD_JFFS2 0x0000001000000000ULL /* JFFS2 Support */
#define CFG_CMD_DTT 0x0000002000000000ULL /* Digital Therm and Thermostat */
#define CFG_CMD_SDRAM 0x0000004000000000ULL /* SDRAM DIMM SPD info printout */
#define CFG_CMD_DIAG 0x0000008000000000ULL /* Diagnostics */
#define CFG_CMD_FPGA 0x0000010000000000ULL /* FPGA configuration Support */
#define CFG_CMD_HWFLOW 0x0000020000000000ULL /* RTS/CTS hw flow control */
#define CFG_CMD_SAVES 0x0000040000000000ULL /* save S record dump */
#define CFG_CMD_SPI 0x0000100000000000ULL /* SPI utility */
#define CFG_CMD_FDOS 0x0000200000000000ULL /* Floppy DOS support */
#define CFG_CMD_VFD 0x0000400000000000ULL /* VFD support (TRAB) */
#define CFG_CMD_NAND 0x0000800000000000ULL /* NAND support */
#define CFG_CMD_BMP 0x0001000000000000ULL /* BMP support */
#define CFG_CMD_PORTIO 0x0002000000000000ULL /* Port I/O */
#define CFG_CMD_PING 0x0004000000000000ULL /* ping support */
#define CFG_CMD_MMC 0x0008000000000000ULL /* MMC support */
#define CFG_CMD_FAT 0x0010000000000000ULL /* FAT support */
#define CFG_CMD_IMLS 0x0020000000000000ULL /* List all found images */
#define CFG_CMD_ITEST 0x0040000000000000ULL /* Integer (and string) test */
#define CFG_CMD_NFS 0x0080000000000000ULL /* NFS support */
#define CFG_CMD_REISER 0x0100000000000000ULL /* Reiserfs support */
#define CFG_CMD_CDP 0x0200000000000000ULL /* Cisco Discovery Protocol */
#define CFG_CMD_XIMG 0x0400000000000000ULL /* Load part of Multi Image */
#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFFU /* ALL commands */
#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFFULL /* ALL commands */
/* Commands that are considered "non-standard" for some reason
* (memory hogs, requires special hardware, not fully tested, etc.)
@ -101,6 +101,7 @@
CFG_CMD_BMP | \
CFG_CMD_BSP | \
CFG_CMD_CACHE | \
CFG_CMD_CDP | \
CFG_CMD_DATE | \
CFG_CMD_DHCP | \
CFG_CMD_DIAG | \
@ -133,8 +134,7 @@
CFG_CMD_SDRAM | \
CFG_CMD_SPI | \
CFG_CMD_USB | \
CFG_CMD_VFD | \
CFG_CMD_CDP )
CFG_CMD_VFD )
/* Default configuration
*/

2
include/configs/xaeniax.h
View File

@ -69,7 +69,7 @@
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DIAG | CFG_CMD_SDRAM & ~CONFIG_CMD_DTT)
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_DIAG | CFG_CMD_SDRAM) & ~CFG_CMD_DTT)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>