fsl_sata: Add the workaround for errata SATA-A001

After power on, the SATA host controller of P1022 Rev1 is configured
in legacy mode instead of the expected enterprise mode.

Software needs to clear bit[28] of HControl register to change to
enterprise mode after bringing the host offline.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Dave Liu 2010-04-12 14:23:25 +08:00 committed by Kumar Gala
parent 99bac479dd
commit e4773debb7
1 changed files with 22 additions and 0 deletions

View File

@ -21,6 +21,7 @@
#include <common.h>
#include <command.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <malloc.h>
#include <libata.h>
#include <fis.h>
@ -191,6 +192,27 @@ int init_sata(int dev)
/* Wait the controller offline */
ata_wait_register(&reg->hstatus, HSTATUS_ONOFF, 0, 1000);
#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
/*
* For P1022/1013 Rev1.0 silicon, after power on SATA host
* controller is configured in legacy mode instead of the
* expected enterprise mode. software needs to clear bit[28]
* of HControl register to change to enterprise mode from
* legacy mode.
*/
{
u32 svr = get_svr();
if (IS_SVR_REV(svr, 1, 0) &&
((SVR_SOC_VER(svr) == SVR_P1022) ||
(SVR_SOC_VER(svr) == SVR_P1022_E) ||
(SVR_SOC_VER(svr) == SVR_P1013) ||
(SVR_SOC_VER(svr) == SVR_P1013_E))) {
out_le32(&reg->hstatus, 0x20000000);
out_le32(&reg->hcontrol, 0x00000100);
}
}
#endif
/* Set the command header base address to CHBA register to tell DMA */
out_le32(&reg->chba, (u32)cmd_hdr & ~0x3);