* Patch by Philippe Robin, 28 Sept 2004:

Fix Flash support for Versatile.

* Patch by Roger Blofeld, 16 Sep 2004:
  Fix timeout for DHCP command retry
This commit is contained in:
wdenk 2004-10-11 22:51:13 +00:00
parent 2ee665339b
commit d407bf52b5
4 changed files with 71 additions and 12 deletions

View File

@ -2,6 +2,12 @@
Changes since U-Boot 1.1.1: Changes since U-Boot 1.1.1:
====================================================================== ======================================================================
* Patch by Philippe Robin, 28 Sept 2004:
Fix Flash support for Versatile.
* Patch by Roger Blofeld, 16 Sep 2004:
Fix timeout for DHCP command retry
* Patch by Pantelis Antoniou, 14 Sep 2004: * Patch by Pantelis Antoniou, 14 Sep 2004:
Fix early serial hang when CONFIG_SERIAL_MULTI is defined. Fix early serial hang when CONFIG_SERIAL_MULTI is defined.

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@ -35,8 +35,8 @@
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/* Board support for 1 or 2 flash devices */ /* Board support for 1 or 2 flash devices */
#undef FLASH_PORT_WIDTH32 #define FLASH_PORT_WIDTH32
#define FLASH_PORT_WIDTH16 #undef FLASH_PORT_WIDTH16
#ifdef FLASH_PORT_WIDTH16 #ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH ushort #define FLASH_PORT_WIDTH ushort
@ -62,9 +62,8 @@ typedef struct OrgDef {
/* Flash Organizations */ /* Flash Organizations */
OrgDef OrgIntel_28F256L18T[] = { OrgDef OrgIntel_28F256K3[] = {
{4, 32 * 1024}, /* 4 * 32kBytes sectors */ {256, 128 * 1024}, /* 256 * 128kBytes sectors */
{255, 128 * 1024}, /* 255 * 128kBytes sectors */
}; };
@ -84,6 +83,20 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
*/ */
static void flash_vpp(int on)
{
unsigned int tmp;
tmp = *(unsigned int *)(VERSATILE_FLASHCTRL);
if (on)
tmp |= VERSATILE_FLASHPROG_FLVPPEN;
else
tmp &= ~VERSATILE_FLASHPROG_FLVPPEN;
*(unsigned int *)(VERSATILE_FLASHCTRL) = tmp;
}
unsigned long flash_init (void) unsigned long flash_init (void)
{ {
int i; int i;
@ -91,8 +104,10 @@ unsigned long flash_init (void)
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
switch (i) { switch (i) {
case 0: case 0:
flash_vpp(1);
flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
flash_vpp(0);
break; break;
default: default:
panic ("configured too many flash banks!\n"); panic ("configured too many flash banks!\n");
@ -117,7 +132,7 @@ static void flash_get_offsets (ulong base, flash_info_t * info)
int i; int i;
OrgDef *pOrgDef; OrgDef *pOrgDef;
pOrgDef = OrgIntel_28F256L18T; pOrgDef = OrgIntel_28F256K3;
if (info->flash_id == FLASH_UNKNOWN) { if (info->flash_id == FLASH_UNKNOWN) {
return; return;
} }
@ -160,6 +175,9 @@ void flash_print_info (flash_info_t * info)
case FLASH_28F256L18T: case FLASH_28F256L18T:
printf ("FLASH 28F256L18T\n"); printf ("FLASH 28F256L18T\n");
break; break;
case FLASH_28F256K3:
printf ("FLASH 28F256K3\n");
break;
default: default:
printf ("Unknown Chip Type\n"); printf ("Unknown Chip Type\n");
break; break;
@ -193,7 +211,6 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
mb (); mb ();
value = addr[0]; value = addr[0];
switch (value) { switch (value) {
case (FPW) INTEL_MANUFACT: case (FPW) INTEL_MANUFACT:
@ -218,6 +235,13 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
info->size = 0x02000000; info->size = 0x02000000;
break; /* => 32 MB */ break; /* => 32 MB */
case (FPW)(INTEL_ID_28F256K3):
info->flash_id += FLASH_28F256K3;
info->sector_count = 256;
info->size = 0x02000000;
printf ("\Intel StrataFlash 28F256K3C device initialized\n");
break;
default: default:
info->flash_id = FLASH_UNKNOWN; info->flash_id = FLASH_UNKNOWN;
break; break;
@ -290,6 +314,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
printf ("\n"); printf ("\n");
} }
flash_vpp(1);
start = get_timer (0); start = get_timer (0);
last = start; last = start;
@ -335,6 +360,9 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
printf (" done\n"); printf (" done\n");
} }
} }
flash_vpp(0);
return rcode; return rcode;
} }
@ -364,6 +392,8 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
port_width = 4; port_width = 4;
#endif #endif
flash_vpp(1);
/* /*
* handle unaligned start bytes * handle unaligned start bytes
*/ */
@ -382,6 +412,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
} }
if ((rc = write_data (info, wp, SWAP (data))) != 0) { if ((rc = write_data (info, wp, SWAP (data))) != 0) {
flash_vpp(0);
return (rc); return (rc);
} }
wp += port_width; wp += port_width;
@ -397,6 +428,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
data = (data << 8) | *src++; data = (data << 8) | *src++;
} }
if ((rc = write_data (info, wp, SWAP (data))) != 0) { if ((rc = write_data (info, wp, SWAP (data))) != 0) {
flash_vpp(0);
return (rc); return (rc);
} }
wp += port_width; wp += port_width;
@ -408,6 +440,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
} }
if (cnt == 0) { if (cnt == 0) {
flash_vpp(0);
return (0); return (0);
} }
@ -423,7 +456,11 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
data = (data << 8) | (*(uchar *) cp); data = (data << 8) | (*(uchar *) cp);
} }
return (write_data (info, wp, SWAP (data))); rc = write_data (info, wp, SWAP (data));
flash_vpp(0);
return rc;
} }
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
@ -443,6 +480,9 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
return (2); return (2);
} }
flash_vpp(1);
flash_unprotect_sectors (addr); flash_unprotect_sectors (addr);
/* Disable interrupts which might cause a timeout here */ /* Disable interrupts which might cause a timeout here */
flag = disable_interrupts (); flag = disable_interrupts ();
@ -456,10 +496,12 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
*addr = (FPW) 0x00FF00FF; /* restore read mode */ *addr = (FPW) 0x00FF00FF; /* restore read mode */
flash_vpp(0);
return (1); return (1);
} }
} }
*addr = (FPW) 0x00FF00FF; /* restore read mode */ *addr = (FPW) 0x00FF00FF; /* restore read mode */
flash_vpp(0);
return (0); return (0);
} }

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@ -96,7 +96,7 @@
#define CFG_SERIAL0 0x101F1000 #define CFG_SERIAL0 0x101F1000
#define CFG_SERIAL1 0x101F2000 #define CFG_SERIAL1 0x101F2000
#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY) #define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY | CFG_CMD_FLASH | CFG_CMD_ENV)
/*#define CONFIG_COMMANDS (CFG_CMD_IMI | CFG_CMD_BDI | CFG_CMD_MEMORY) */ /*#define CONFIG_COMMANDS (CFG_CMD_IMI | CFG_CMD_BDI | CFG_CMD_MEMORY) */
@ -155,15 +155,25 @@
/*----------------------------------------------------------------------- /*-----------------------------------------------------------------------
* FLASH and environment organization * FLASH and environment organization
*/ */
#define CFG_ENV_IS_NOWHERE
#define VERSATILE_SYS_BASE 0x10000000
#define VERSATILE_SYS_FLASH_OFFSET 0x4C
#define VERSATILE_FLASHCTRL (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define PHYS_FLASH_SIZE 0x34000000 /* 64MB */ #define PHYS_FLASH_SIZE 0x34000000 /* 64MB */
/* timeout values are in ticks */ /* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */
#define CFG_MAX_FLASH_SECT 128 #define CFG_MAX_FLASH_SECT (256)
#define CFG_ENV_SIZE 32768
#define PHYS_FLASH_1 (CFG_FLASH_BASE) #define PHYS_FLASH_1 (CFG_FLASH_BASE)
#define CFG_ENV_IS_IN_FLASH 1 /* env in flash instead of CFG_ENV_IS_NOWHERE */
#define CFG_ENV_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
#define CFG_ENV_OFFSET 0x01f00000 /* environment starts here */
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

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@ -381,6 +381,7 @@ restart:
#if (CONFIG_COMMANDS & CFG_CMD_DHCP) #if (CONFIG_COMMANDS & CFG_CMD_DHCP)
case DHCP: case DHCP:
/* Start with a clean slate... */ /* Start with a clean slate... */
BootpTry = 0;
NetOurIP = 0; NetOurIP = 0;
NetServerIP = getenv_IPaddr ("serverip"); NetServerIP = getenv_IPaddr ("serverip");
DhcpRequest(); /* Basically same as BOOTP */ DhcpRequest(); /* Basically same as BOOTP */