pxa: fix CKEN_B register bits

The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
This commit is contained in:
Daniel Mack 2009-06-23 17:30:05 +02:00 committed by Jean-Christophe PLAGNIOL-VILLARD
parent bd876be46f
commit c33c5990ce
1 changed files with 6 additions and 6 deletions

View File

@ -1953,12 +1953,12 @@ typedef void (*ExcpHndlr) (void) ;
#define CKENA_1_LCD (1 << 1) /* LCD Unit Clock Enable */
#define CKENB_9_SYSBUS2 (1 << 9) /* System bus 2 */
#define CKENB_8_1WIRE ((1 << 8) + 32) /* One Wire Interface Unit Clock Enable */
#define CKENB_7_GPIO ((1 << 7) + 32) /* GPIO Clock Enable */
#define CKENB_6_IRQ ((1 << 6) + 32) /* Interrupt Controller Clock Enable */
#define CKENB_4_I2C ((1 << 4) + 32) /* I2C Unit Clock Enable */
#define CKENB_1_PWM1 ((1 << 1) + 32) /* PWM2 & PWM3 Clock Enable */
#define CKENB_0_PWM0 ((1 << 0) + 32) /* PWM0 & PWM1 Clock Enable */
#define CKENB_8_1WIRE (1 << 8) /* One Wire Interface Unit Clock Enable */
#define CKENB_7_GPIO (1 << 7) /* GPIO Clock Enable */
#define CKENB_6_IRQ (1 << 6) /* Interrupt Controller Clock Enable */
#define CKENB_4_I2C (1 << 4) /* I2C Unit Clock Enable */
#define CKENB_1_PWM1 (1 << 1) /* PWM2 & PWM3 Clock Enable */
#define CKENB_0_PWM0 (1 << 0) /* PWM0 & PWM1 Clock Enable */
#else /* if defined CONFIG_CPU_MONAHANS */