sh: Add support Renesas Solutions Migo-R board
Migo-R is a board based on SH7722 and has may devices. In this patch, supported SCIF, NOR flash and Ethernet. Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
goda.yusuke
Nobuhiro Iwamatsu
parent
74d1e66d22
commit
c2042f5952
|
|
@ -703,6 +703,10 @@ Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
|
|||
|
||||
MS7720SE SH7720
|
||||
|
||||
Yusuke Goda <goda.yusuke@renesas.com>
|
||||
|
||||
MIGO-R SH7722
|
||||
|
||||
#########################################################################
|
||||
# Blackfin Systems: #
|
||||
# #
|
||||
|
|
|
|||
1
MAKEALL
1
MAKEALL
|
|
@ -699,6 +699,7 @@ LIST_blackfin=" \
|
|||
LIST_sh4=" \
|
||||
ms7750se \
|
||||
ms7722se \
|
||||
Migo-R \
|
||||
"
|
||||
|
||||
LIST_sh3=" \
|
||||
|
|
|
|||
5
Makefile
5
Makefile
|
|
@ -2852,6 +2852,11 @@ ms7722se_config : unconfig
|
|||
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
|
||||
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
|
||||
|
||||
MigoR_config : unconfig
|
||||
@ >include/config.h
|
||||
@echo "#define CONFIG_MIGO_R 1" >> include/config.h
|
||||
@./mkconfig -a $(@:_config=) sh sh4 MigoR
|
||||
|
||||
#########################################################################
|
||||
#########################################################################
|
||||
#########################################################################
|
||||
|
|
|
|||
|
|
@ -0,0 +1,48 @@
|
|||
#
|
||||
# Copyright (C) 2007
|
||||
# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
#
|
||||
# Copyright (C) 2007
|
||||
# Kenati Technologies, Inc.
|
||||
#
|
||||
# board/MigoR/Makefile
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS := migo_r.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
$(LIB): $(OBJS) $(SOBJS)
|
||||
$(AR) crv $@ $(OBJS) $(SOBJS)
|
||||
|
||||
clean:
|
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean
|
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
|
||||
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
|
||||
|
||||
-include .depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
#
|
||||
# Copyright (C) 2007
|
||||
# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
#
|
||||
# Copyright (C) 2007
|
||||
# Kenati Technologies, Inc.
|
||||
#
|
||||
# board/MigoR/config.mk
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
|
||||
#
|
||||
# TEXT_BASE refers to image _after_ relocation.
|
||||
#
|
||||
# NOTE: Must match value used in u-boot.lds (in this directory).
|
||||
#
|
||||
|
||||
TEXT_BASE = 0x8FFC0000
|
||||
|
||||
|
|
@ -0,0 +1,269 @@
|
|||
/*
|
||||
* Copyright (C) 2007
|
||||
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
*
|
||||
* Copyright (C) 2007
|
||||
* Kenati Technologies, Inc.
|
||||
*
|
||||
* board/MigoR/lowlevel_init.S
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
|
||||
#include <asm/processor.h>
|
||||
|
||||
/*
|
||||
* Board specific low level init code, called _very_ early in the
|
||||
* startup sequence. Relocation to SDRAM has not happened yet, no
|
||||
* stack is available, bss section has not been initialised, etc.
|
||||
*
|
||||
* (Note: As no stack is available, no subroutines can be called...).
|
||||
*/
|
||||
|
||||
.global lowlevel_init
|
||||
|
||||
.text
|
||||
.align 2
|
||||
|
||||
lowlevel_init:
|
||||
|
||||
mov.l CCR_A, r1 ! Address of Cache Control Register
|
||||
mov.l CCR_D, r0 ! Instruction Cache Invalidate
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l MMUCR_A, r1 ! Address of MMU Control Register
|
||||
mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0
|
||||
mov.l MSTPCR0_D, r0 !
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2
|
||||
mov.l MSTPCR2_D, r0 !
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l PFC_PULCR_A, r1
|
||||
mov.w PFC_PULCR_D, r0
|
||||
mov.w r0,@r1
|
||||
|
||||
mov.l PFC_DRVCR_A, r1
|
||||
mov.w PFC_DRVCR_D, r0
|
||||
mov.w r0, @r1
|
||||
|
||||
mov.l SBSCR_A, r1 !
|
||||
mov.w SBSCR_D, r0 !
|
||||
mov.w r0, @r1
|
||||
|
||||
mov.l PSCR_A, r1 !
|
||||
mov.w PSCR_D, r0 !
|
||||
mov.w r0, @r1
|
||||
|
||||
mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
|
||||
mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max
|
||||
mov.w r0, @r1
|
||||
|
||||
mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register)
|
||||
mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear
|
||||
mov.w r0, @r1
|
||||
|
||||
mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register)
|
||||
mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms
|
||||
mov.w r0, @r1
|
||||
|
||||
mov.l DLLFRQ_A, r1 ! 20080115
|
||||
mov.l DLLFRQ_D, r0 ! 20080115
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register
|
||||
mov.l FRQCR_D, r0 ! 20080115
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l CCR_A, r1 ! Address of Cache Control Register
|
||||
mov.l CCR_D_2, r0 ! ??
|
||||
mov.l r0, @r1
|
||||
|
||||
bsc_init:
|
||||
|
||||
mov.l CMNCR_A, r1 ! CMNCR address -> R1
|
||||
mov.l CMNCR_D, r0 ! CMNCR data -> R0
|
||||
mov.l r0, @r1 ! CMNCR set
|
||||
|
||||
mov.l CS0BCR_A, r1 ! CS0BCR address -> R1
|
||||
mov.l CS0BCR_D, r0 ! CS0BCR data -> R0
|
||||
mov.l r0, @r1 ! CS0BCR set
|
||||
|
||||
mov.l CS4BCR_A, r1 ! CS4BCR address -> R1
|
||||
mov.l CS4BCR_D, r0 ! CS4BCR data -> R0
|
||||
mov.l r0, @r1 ! CS4BCR set
|
||||
|
||||
mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1
|
||||
mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0
|
||||
mov.l r0, @r1 ! CS5ABCR set
|
||||
|
||||
mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1
|
||||
mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0
|
||||
mov.l r0, @r1 ! CS5BBCR set
|
||||
|
||||
mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1
|
||||
mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0
|
||||
mov.l r0, @r1 ! CS6ABCR set
|
||||
|
||||
mov.l CS0WCR_A, r1 ! CS0WCR address -> R1
|
||||
mov.l CS0WCR_D, r0 ! CS0WCR data -> R0
|
||||
mov.l r0, @r1 ! CS0WCR set
|
||||
|
||||
mov.l CS4WCR_A, r1 ! CS4WCR address -> R1
|
||||
mov.l CS4WCR_D, r0 ! CS4WCR data -> R0
|
||||
mov.l r0, @r1 ! CS4WCR set
|
||||
|
||||
mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1
|
||||
mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0
|
||||
mov.l r0, @r1 ! CS5AWCR set
|
||||
|
||||
mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1
|
||||
mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0
|
||||
mov.l r0, @r1 ! CS5BWCR set
|
||||
|
||||
mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1
|
||||
mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0
|
||||
mov.l r0, @r1 ! CS6AWCR set
|
||||
|
||||
! SDRAM initialization
|
||||
mov.l SDCR_A, r1 ! SB_SDCR address -> R1
|
||||
mov.l SDCR_D, r0 ! SB_SDCR data -> R0
|
||||
mov.l r0, @r1 ! SB_SDCR set
|
||||
|
||||
mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1
|
||||
mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0
|
||||
mov.l r0, @r1 ! SB_SDWCR set
|
||||
|
||||
mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1
|
||||
mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0
|
||||
mov.l r0, @r1 ! SB_SDPCR set
|
||||
|
||||
mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1
|
||||
mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0
|
||||
mov.l r0, @r1 ! SB_RTCOR set
|
||||
|
||||
mov.l RTCNT_A, r1 ! SB_RTCNT address -> R1
|
||||
mov.l RTCNT_D, r0 ! SB_RTCNT data -> R0
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1
|
||||
mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0
|
||||
mov.l r0, @r1 ! SB_RTCSR set
|
||||
|
||||
mov.l RFCR_A, r1 ! SB_RFCR address -> R1
|
||||
mov.l RFCR_D, r0 ! SB_RFCR data -> R0
|
||||
mov.l r0, @r1
|
||||
|
||||
mov.l SDMR3_A, r1 ! SDMR3 address -> R1
|
||||
mov #0x00, r0 ! SDMR3 data -> R0
|
||||
mov.b r0, @r1 ! SDMR3 set
|
||||
|
||||
! BL bit off (init = ON) (?!?)
|
||||
|
||||
stc sr, r0 ! BL bit off(init=ON)
|
||||
mov.l SR_MASK_D, r1
|
||||
and r1, r0
|
||||
ldc r0, sr
|
||||
|
||||
rts
|
||||
mov #0, r0
|
||||
|
||||
|
||||
|
||||
.align 4
|
||||
|
||||
CCR_A: .long CCR
|
||||
MMUCR_A: .long MMUCR
|
||||
MSTPCR0_A: .long MSTPCR0
|
||||
MSTPCR2_A: .long MSTPCR2
|
||||
PFC_PULCR_A: .long PULCR
|
||||
PFC_DRVCR_A: .long DRVCR
|
||||
SBSCR_A: .long SBSCR
|
||||
PSCR_A: .long PSCR
|
||||
RWTCSR_A: .long RWTCSR
|
||||
RWTCNT_A: .long RWTCNT
|
||||
FRQCR_A: .long FRQCR
|
||||
PLLCR_A: .long PLLCR
|
||||
DLLFRQ_A: .long DLLFRQ
|
||||
|
||||
CCR_D: .long 0x00000800
|
||||
CCR_D_2: .long 0x00000103
|
||||
MMUCR_D: .long 0x00000004
|
||||
MSTPCR0_D: .long 0x00001001
|
||||
MSTPCR2_D: .long 0xffffffff
|
||||
PFC_PULCR_D: .long 0x6000
|
||||
PFC_DRVCR_D: .long 0x0464
|
||||
FRQCR_D: .long 0x07033639
|
||||
PLLCR_D: .long 0x00005000
|
||||
DLLFRQ_D: .long 0x000004F6 ! 20080115
|
||||
|
||||
CMNCR_A: .long CMNCR
|
||||
CMNCR_D: .long 0x0000001B ! 20080115
|
||||
CS0BCR_A: .long CS0BCR ! Flash bank 1
|
||||
CS0BCR_D: .long 0x24920400
|
||||
CS4BCR_A: .long CS4BCR !
|
||||
CS4BCR_D: .long 0x10003400 ! 20080115
|
||||
CS5ABCR_A: .long CS5ABCR !
|
||||
CS5ABCR_D: .long 0x24920400
|
||||
CS5BBCR_A: .long CS5BBCR !
|
||||
CS5BBCR_D: .long 0x24920400
|
||||
CS6ABCR_A: .long CS6ABCR !
|
||||
CS6ABCR_D: .long 0x24920400
|
||||
|
||||
CS0WCR_A: .long CS0WCR
|
||||
CS0WCR_D: .long 0x00000380
|
||||
CS4WCR_A: .long CS4WCR
|
||||
CS4WCR_D: .long 0x00100A81 ! 20080115
|
||||
CS5AWCR_A: .long CS5AWCR
|
||||
CS5AWCR_D: .long 0x00000300
|
||||
CS5BWCR_A: .long CS5BWCR
|
||||
CS5BWCR_D: .long 0x00000300
|
||||
CS6AWCR_A: .long CS6AWCR
|
||||
CS6AWCR_D: .long 0x00000300
|
||||
|
||||
SDCR_A: .long SBSC_SDCR
|
||||
SDCR_D: .long 0x80160809 ! 20080115
|
||||
SDWCR_A: .long SBSC_SDWCR
|
||||
SDWCR_D: .long 0x0014450C ! 20080115
|
||||
SDPCR_A: .long SBSC_SDPCR
|
||||
SDPCR_D: .long 0x00000087
|
||||
RTCOR_A: .long SBSC_RTCOR
|
||||
RTCNT_A: .long SBSC_RTCNT
|
||||
RTCNT_D: .long 0xA55A0012
|
||||
RTCOR_D: .long 0xA55A001C ! 20080115
|
||||
RTCSR_A: .long SBSC_RTCSR
|
||||
RFCR_A: .long SBSC_RFCR
|
||||
RFCR_D: .long 0xA55A0221
|
||||
RTCSR_D: .long 0xA55A009a ! 20080115
|
||||
SDMR3_A: .long 0xFE581180 ! 20080115
|
||||
|
||||
SR_MASK_D: .long 0xEFFFFF0F
|
||||
|
||||
.align 2
|
||||
|
||||
SBSCR_D: .word 0x0044
|
||||
PSCR_D: .word 0x0000
|
||||
RWTCSR_D_1: .word 0xA507
|
||||
RWTCSR_D_2: .word 0xA504 ! 20080115
|
||||
RWTCNT_D: .word 0x5A00
|
||||
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* Copyright (C) 2007
|
||||
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
*
|
||||
* Copyright (C) 2007
|
||||
* Kenati Technologies, Inc.
|
||||
*
|
||||
* board/MigoR/migo_r.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
int checkboard(void)
|
||||
{
|
||||
puts("BOARD: Renesas MigoR\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init (void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
gd->bd->bi_memstart = CFG_SDRAM_BASE;
|
||||
gd->bd->bi_memsize = CFG_SDRAM_SIZE;
|
||||
printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024));
|
||||
return 0;
|
||||
}
|
||||
|
||||
void led_set_state (unsigned short value)
|
||||
{
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
/*
|
||||
* Copyrigth (c) 2007
|
||||
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
|
||||
OUTPUT_ARCH(sh)
|
||||
ENTRY(_start)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/*
|
||||
Base address of internal SDRAM is 0x0C000000.
|
||||
Although size of SDRAM can be either 16 or 32 MBytes,
|
||||
we assume 16 MBytes (ie ignore upper half if the full
|
||||
32 MBytes is present).
|
||||
|
||||
NOTE: This address must match with the definition of
|
||||
TEXT_BASE in config.mk (in this directory).
|
||||
|
||||
*/
|
||||
. = 0x8C000000 + (64*1024*1024) - (256*1024);
|
||||
|
||||
PROVIDE (reloc_dst = .);
|
||||
|
||||
PROVIDE (_ftext = .);
|
||||
PROVIDE (_fcode = .);
|
||||
PROVIDE (_start = .);
|
||||
|
||||
.text :
|
||||
{
|
||||
cpu/sh4/start.o (.text)
|
||||
. = ALIGN(8192);
|
||||
common/environment.o (.ppcenv)
|
||||
. = ALIGN(8192);
|
||||
common/environment.o (.ppcenvr)
|
||||
. = ALIGN(8192);
|
||||
*(.text)
|
||||
. = ALIGN(4);
|
||||
} =0xFF
|
||||
PROVIDE (_ecode = .);
|
||||
.rodata :
|
||||
{
|
||||
*(.rodata)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
PROVIDE (_etext = .);
|
||||
|
||||
|
||||
PROVIDE (_fdata = .);
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
PROVIDE (_edata = .);
|
||||
|
||||
PROVIDE (_fgot = .);
|
||||
.got :
|
||||
{
|
||||
*(.got)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
PROVIDE (_egot = .);
|
||||
|
||||
PROVIDE (__u_boot_cmd_start = .);
|
||||
.u_boot_cmd :
|
||||
{
|
||||
*(.u_boot_cmd)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
PROVIDE (__u_boot_cmd_end = .);
|
||||
|
||||
PROVIDE (reloc_dst_end = .);
|
||||
/* _reloc_dst_end = .; */
|
||||
|
||||
PROVIDE (bss_start = .);
|
||||
PROVIDE (__bss_start = .);
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
}
|
||||
PROVIDE (bss_end = .);
|
||||
|
||||
PROVIDE (_end = .);
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,151 @@
|
|||
/*
|
||||
* Configuation settings for the Renesas Solutions Migo-R board
|
||||
*
|
||||
* Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __MIGO_R_H
|
||||
#define __MIGO_R_H
|
||||
|
||||
#undef DEBUG
|
||||
#define CONFIG_SH 1
|
||||
#define CONFIG_SH4 1
|
||||
#define CONFIG_CPU_SH7722 1
|
||||
#define CONFIG_MIGO_R 1
|
||||
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_LOADS
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_NFS
|
||||
#define CONFIG_CMD_DFL
|
||||
#define CONFIG_CMD_SDRAM
|
||||
#define CONFIG_CMD_ENV
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
|
||||
#define CONFIG_NETMASK 255.255.255.0
|
||||
#define CONFIG_IPADDR 192.168.10.100
|
||||
#define CONFIG_SERVERIP 192.168.10.77
|
||||
#define CONFIG_GATEWAYIP 192.168.10.77
|
||||
|
||||
#define CONFIG_VERSION_VARIABLE
|
||||
#undef CONFIG_SHOW_BOOT_PROGRESS
|
||||
|
||||
/* SMC9111 */
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_SMC91111_BASE (0xB0000000)
|
||||
|
||||
/* MEMORY */
|
||||
#define MIGO_R_SDRAM_BASE (0x8C000000)
|
||||
#define MIGO_R_FLASH_BASE_1 (0xA0000000)
|
||||
#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
|
||||
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 256 /* Buffer size for input from the Console */
|
||||
#define CFG_PBSIZE 256 /* Buffer size for Console output */
|
||||
#define CFG_MAXARGS 16 /* max args accepted for monitor commands */
|
||||
#define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */
|
||||
#define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
|
||||
|
||||
/* SCIF */
|
||||
#define CFG_SCIF_CONSOLE 1
|
||||
#define CONFIG_CONS_SCIF0 1
|
||||
#undef CFG_CONSOLE_INFO_QUIET /* Suppress display of console
|
||||
information at boot */
|
||||
#undef CFG_CONSOLE_OVERWRITE_ROUTINE
|
||||
#undef CFG_CONSOLE_ENV_OVERWRITE
|
||||
|
||||
#define CFG_MEMTEST_START (MIGO_R_SDRAM_BASE)
|
||||
#define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024))
|
||||
|
||||
/* Enable alternate, more extensive, memory test */
|
||||
#undef CFG_ALT_MEMTEST
|
||||
/* Scratch address used by the alternate memory test */
|
||||
#undef CFG_MEMTEST_SCRATCH
|
||||
|
||||
/* Enable temporary baudrate change while serial download */
|
||||
#undef CFG_LOADS_BAUD_CHANGE
|
||||
|
||||
#define CFG_SDRAM_BASE (MIGO_R_SDRAM_BASE)
|
||||
/* maybe more, but if so u-boot doesn't know about it... */
|
||||
#define CFG_SDRAM_SIZE (64 * 1024 * 1024)
|
||||
/* default load address for scripts ?!? */
|
||||
#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 16 * 1024 * 1024)
|
||||
|
||||
/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
|
||||
#define CFG_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
|
||||
/* Monitor size */
|
||||
#define CFG_MONITOR_LEN (128 * 1024)
|
||||
/* Size of DRAM reserved for malloc() use */
|
||||
#define CFG_MALLOC_LEN (256 * 1024)
|
||||
/* size in bytes reserved for initial data */
|
||||
#define CFG_GBL_DATA_SIZE (256)
|
||||
#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
|
||||
|
||||
/* FLASH */
|
||||
#define CFG_FLASH_CFI
|
||||
#define CFG_FLASH_CFI_DRIVER
|
||||
#undef CFG_FLASH_QUIET_TEST
|
||||
/* print 'E' for empty sector on flinfo */
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
/* Physical start address of Flash memory */
|
||||
#define CFG_FLASH_BASE (MIGO_R_FLASH_BASE_1)
|
||||
/* Max number of sectors on each Flash chip */
|
||||
#define CFG_MAX_FLASH_SECT 512
|
||||
|
||||
/* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
|
||||
#define CFG_MAX_FLASH_BANKS 1
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
|
||||
|
||||
/* Timeout for Flash erase operations (in ms) */
|
||||
#define CFG_FLASH_ERASE_TOUT (3 * 1000)
|
||||
/* Timeout for Flash write operations (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT (3 * 1000)
|
||||
/* Timeout for Flash set sector lock bit operations (in ms) */
|
||||
#define CFG_FLASH_LOCK_TOUT (3 * 1000)
|
||||
/* Timeout for Flash clear lock bit operations (in ms) */
|
||||
#define CFG_FLASH_UNLOCK_TOUT (3 * 1000)
|
||||
|
||||
/* Use hardware flash sectors protection instead of U-Boot software protection */
|
||||
#undef CFG_FLASH_PROTECTION
|
||||
#undef CFG_DIRECT_FLASH_TFTP
|
||||
|
||||
/* ENV setting */
|
||||
#define CFG_ENV_IS_IN_FLASH
|
||||
#define CONFIG_ENV_OVERWRITE 1
|
||||
#define CFG_ENV_SECT_SIZE (128 * 1024)
|
||||
#define CFG_ENV_SIZE (CFG_ENV_SECT_SIZE)
|
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
|
||||
/* Offset of env Flash sector relative to CFG_FLASH_BASE */
|
||||
#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE)
|
||||
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SECT_SIZE)
|
||||
|
||||
/* Board Clock */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
|
||||
#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
|
||||
|
||||
#endif /* __MIGO_R_H */
|
||||
Loading…
Reference in New Issue