PXA: ZipitZ2 support
This patch adds support for Aeronix Zipit Z2 handheld. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This commit is contained in:
Marek Vasut
parent
2e49984bd1
commit
bc3a4a53a7
1
MAKEALL
1
MAKEALL
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@ -720,6 +720,7 @@ LIST_pxa=" \
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xaeniax \
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xm250 \
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xsengine \
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zipitz2 \
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zylonite \
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"
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@ -0,0 +1,54 @@
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#
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# Copyright (C) 2009
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# Marek Vasut <marek.vasut@gmail.com>
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#
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# Heavily based on pxa255_idp platform
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS := zipitz2.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1 @@
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TEXT_BASE = 0xa1000000
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@ -0,0 +1,40 @@
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/*
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* Aeronix Zipit Z2 Lowlevel Hardware Initialization
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*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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*
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <version.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/macro.h>
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.globl lowlevel_init
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lowlevel_init:
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pxa_gpio_setup
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pxa_wait_ticks 0x8000
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pxa_mem_setup
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pxa_wakeup
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pxa_intr_setup
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pxa_clock_setup
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mov pc, lr
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@ -0,0 +1,56 @@
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/*
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* (C) Copyright 2000-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = 0x00000000;
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. = ALIGN(4);
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.text :
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{
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cpu/pxa/start.o (.text)
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*(.text)
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}
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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. = ALIGN(4);
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.data : { *(.data) }
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. = ALIGN(4);
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.got : { *(.got) }
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. = .;
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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__u_boot_cmd_end = .;
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. = ALIGN(4);
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__bss_start = .;
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.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
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_end = .;
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}
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@ -0,0 +1,213 @@
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/*
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* Copyright (C) 2009
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* Marek Vasut <marek.vasut@gmail.com>
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*
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* Heavily based on pxa255_idp platform
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <serial.h>
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#include <asm/arch/hardware.h>
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#include <spi.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_CMD_SPI
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void lcd_start(void);
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#else
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inline void lcd_start(void) {};
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#endif
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* memory and cpu-speed are setup before relocation */
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/* so we do _nothing_ here */
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/* arch number of Lubbock-Board */
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gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0xa0000100;
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/* Enable LCD */
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lcd_start();
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return 0;
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}
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int board_late_init(void)
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{
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setenv("stdout", "serial");
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setenv("stderr", "serial");
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return 0;
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}
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struct serial_device *default_serial_console (void)
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{
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return &serial_stuart_device;
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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#ifdef CONFIG_CMD_SPI
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struct {
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unsigned char reg;
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unsigned short data;
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unsigned char mdelay;
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} lcd_data[] = {
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{ 0x07, 0x0000, 0 },
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{ 0x13, 0x0000, 10 },
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{ 0x11, 0x3004, 0 },
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{ 0x14, 0x200F, 0 },
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{ 0x10, 0x1a20, 0 },
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{ 0x13, 0x0040, 50 },
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{ 0x13, 0x0060, 0 },
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{ 0x13, 0x0070, 200 },
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{ 0x01, 0x0127, 0 },
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{ 0x02, 0x0700, 0 },
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{ 0x03, 0x1030, 0 },
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{ 0x08, 0x0208, 0 },
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{ 0x0B, 0x0620, 0 },
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{ 0x0C, 0x0110, 0 },
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{ 0x30, 0x0120, 0 },
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{ 0x31, 0x0127, 0 },
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{ 0x32, 0x0000, 0 },
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{ 0x33, 0x0503, 0 },
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{ 0x34, 0x0727, 0 },
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{ 0x35, 0x0124, 0 },
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{ 0x36, 0x0706, 0 },
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{ 0x37, 0x0701, 0 },
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{ 0x38, 0x0F00, 0 },
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{ 0x39, 0x0F00, 0 },
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{ 0x40, 0x0000, 0 },
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{ 0x41, 0x0000, 0 },
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{ 0x42, 0x013f, 0 },
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{ 0x43, 0x0000, 0 },
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{ 0x44, 0x013f, 0 },
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{ 0x45, 0x0000, 0 },
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{ 0x46, 0xef00, 0 },
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{ 0x47, 0x013f, 0 },
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{ 0x48, 0x0000, 0 },
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{ 0x07, 0x0015, 30 },
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{ 0x07, 0x0017, 0 },
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{ 0x20, 0x0000, 0 },
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{ 0x21, 0x0000, 0 },
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{ 0x22, 0x0000, 0 },
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};
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void zipitz2_spi_sda(int set)
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{
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/* GPIO 13 */
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if (set)
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GPSR0 = (1 << 13);
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else
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GPCR0 = (1 << 13);
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}
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void zipitz2_spi_scl(int set)
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{
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/* GPIO 22 */
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if (set)
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GPCR0 = (1 << 22);
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else
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GPSR0 = (1 << 22);
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}
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unsigned char zipitz2_spi_read(void)
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{
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/* GPIO 40 */
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return !!(GPLR1 & (1 << 8));
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}
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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/* Always valid */
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return 1;
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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/* GPIO 88 low */
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GPCR2 = (1 << 24);
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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/* GPIO 88 high */
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GPSR2 = (1 << 24);
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}
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void lcd_start(void)
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{
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int i;
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unsigned char reg[3] = { 0x74, 0x00, 0 };
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unsigned char data[3] = { 0x76, 0, 0 };
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unsigned char dummy[3] = { 0, 0, 0 };
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/* PWM2 AF */
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GAFR0_L |= 0x00800000;
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/* Enable clock to all PWM */
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CKEN |= 0x3;
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/* Configure PWM2 */
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PWM_CTRL2 = 0x4f;
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PWM_PWDUTY2 = 0x2ff;
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PWM_PERVAL2 = 792;
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/* Toggle the reset pin to reset the LCD */
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GPSR0 = (1 << 19);
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udelay(100000);
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GPCR0 = (1 << 19);
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udelay(20000);
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GPSR0 = (1 << 19);
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udelay(20000);
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/* Program the LCD init sequence */
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for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
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reg[0] = 0x74;
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reg[1] = 0x0;
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reg[2] = lcd_data[i].reg;
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spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
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data[0] = 0x76;
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data[1] = lcd_data[i].data >> 8;
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data[2] = lcd_data[i].data & 0xff;
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spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
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if (lcd_data[i].mdelay)
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udelay(lcd_data[i].mdelay * 1000);
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}
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GPSR0 = (1 << 11);
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}
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#endif
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@ -62,6 +62,7 @@ lubbock arm pxa
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pleb2 arm pxa
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xaeniax arm pxa
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xm250 arm pxa
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zipitz2 arm pxa
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B2 arm s3c44b0 - dave
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assabet arm sa1100
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dnp1110 arm sa1100
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@ -0,0 +1,259 @@
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/*
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* Aeronix Zipit Z2 configuration file
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*
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* Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com>
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*
|
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* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Board Configuration Options
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*/
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#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */
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#define CONFIG_ZIPITZ2 1 /* Zipit Z2 board */
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#undef BOARD_LATE_INIT
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#undef CONFIG_SKIP_RELOCATE_UBOOT
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#undef CONFIG_USE_IRQ
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#undef CONFIG_SKIP_LOWLEVEL_INIT
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/*
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* Environment settings
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*/
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_ADDR 0x40000
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#define CONFIG_ENV_SIZE 0x20000
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_STACKSIZE)
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#define CONFIG_SYS_GBL_DATA_SIZE 512
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#define CONFIG_BOOTCOMMAND \
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"if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \
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"source 0xa0000000; " \
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"else " \
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"bootm 0x60000; " \
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"fi; "
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#define CONFIG_BOOTARGS \
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"console=tty0 console=ttyS2,115200 fbcon=rotate:3"
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#define CONFIG_TIMESTAMP
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#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_LZMA /* LZMA compression support */
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/*
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* Serial Console Configuration
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* STUART - the lower serial port on Colibri board
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*/
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#define CONFIG_PXA_SERIAL
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#define CONFIG_STUART 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*
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* Bootloader Components Configuration
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*/
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_NET
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#define CONFIG_CMD_ENV
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_SPI
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/*
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* MMC Card Configuration
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*/
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_PXA_MMC
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#define CONFIG_SYS_MMC_BASE 0xF0000000
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_DOS_PARTITION
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#endif
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/*
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* SPI and LCD
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*/
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#ifdef CONFIG_CMD_SPI
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#define CONFIG_SOFT_SPI
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#define CONFIG_LCD
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#define CONFIG_LMS283GF05
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_CMD_BMP
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
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||||
#undef SPI_INIT
|
||||
|
||||
#define SPI_DELAY udelay(10)
|
||||
#define SPI_SDA(val) zipitz2_spi_sda(val)
|
||||
#define SPI_SCL(val) zipitz2_spi_scl(val)
|
||||
#define SPI_READ zipitz2_spi_read()
|
||||
#ifndef __ASSEMBLY__
|
||||
void zipitz2_spi_sda(int);
|
||||
void zipitz2_spi_scl(int);
|
||||
unsigned char zipitz2_spi_read(void);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* KGDB
|
||||
*/
|
||||
#ifdef CONFIG_CMD_KGDB
|
||||
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
|
||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* HUSH Shell Configuration
|
||||
*/
|
||||
#define CONFIG_SYS_HUSH_PARSER 1
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#ifdef CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
|
||||
#else
|
||||
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#endif
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_DEVICE_NULLDEV 1
|
||||
|
||||
/*
|
||||
* Clock Configuration
|
||||
*/
|
||||
#undef CONFIG_SYS_CLKS_IN_HZ
|
||||
#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
|
||||
#define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
|
||||
|
||||
/*
|
||||
* Stack sizes
|
||||
*/
|
||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
|
||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* DRAM Map
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* We have 1 bank of DRAM */
|
||||
#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
|
||||
|
||||
#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
|
||||
#define CONFIG_SYS_DRAM_SIZE 0x02000000 /* 32 MB DRAM */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
|
||||
|
||||
/*
|
||||
* NOR FLASH
|
||||
*/
|
||||
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
|
||||
#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
|
||||
#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
||||
|
||||
#define CONFIG_SYS_FLASH_CFI
|
||||
#define CONFIG_FLASH_CFI_DRIVER 1
|
||||
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
|
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
|
||||
#define CONFIG_SYS_MONITOR_LEN PHYS_FLASH_SECT_SIZE
|
||||
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 256
|
||||
|
||||
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
|
||||
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_FLASH_PROTECTION
|
||||
|
||||
/*
|
||||
* GPIO settings
|
||||
*/
|
||||
#define CONFIG_SYS_GAFR0_L_VAL 0x02000140
|
||||
#define CONFIG_SYS_GAFR0_U_VAL 0x59188000
|
||||
#define CONFIG_SYS_GAFR1_L_VAL 0x63900002
|
||||
#define CONFIG_SYS_GAFR1_U_VAL 0xaaa03950
|
||||
#define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa
|
||||
#define CONFIG_SYS_GAFR2_U_VAL 0x29000308
|
||||
#define CONFIG_SYS_GAFR3_L_VAL 0x54000000
|
||||
#define CONFIG_SYS_GAFR3_U_VAL 0x000000d5
|
||||
#define CONFIG_SYS_GPCR0_VAL 0x00000000
|
||||
#define CONFIG_SYS_GPCR1_VAL 0x00000020
|
||||
#define CONFIG_SYS_GPCR2_VAL 0x00000000
|
||||
#define CONFIG_SYS_GPCR3_VAL 0x00000000
|
||||
#define CONFIG_SYS_GPDR0_VAL 0xdafcee00
|
||||
#define CONFIG_SYS_GPDR1_VAL 0xffa3aaab
|
||||
#define CONFIG_SYS_GPDR2_VAL 0x8fe1ffff
|
||||
#define CONFIG_SYS_GPDR3_VAL 0x001b1f8a
|
||||
#define CONFIG_SYS_GPSR0_VAL 0x06080400
|
||||
#define CONFIG_SYS_GPSR1_VAL 0x007f0000
|
||||
#define CONFIG_SYS_GPSR2_VAL 0x032a0000
|
||||
#define CONFIG_SYS_GPSR3_VAL 0x00000180
|
||||
|
||||
#define CONFIG_SYS_PSSR_VAL 0x30
|
||||
|
||||
/*
|
||||
* Clock settings
|
||||
*/
|
||||
#define CONFIG_SYS_CKEN 0x00511220
|
||||
#define CONFIG_SYS_CCCR 0x00000190
|
||||
|
||||
/*
|
||||
* Memory settings
|
||||
*/
|
||||
#define CONFIG_SYS_MSC0_VAL 0x2ffc38f8
|
||||
#define CONFIG_SYS_MSC1_VAL 0x0000ccd1
|
||||
#define CONFIG_SYS_MSC2_VAL 0x0000b884
|
||||
#define CONFIG_SYS_MDCNFG_VAL 0x08000ba9
|
||||
#define CONFIG_SYS_MDREFR_VAL 0x2011a01e
|
||||
#define CONFIG_SYS_MDMRS_VAL 0x00000000
|
||||
#define CONFIG_SYS_FLYCNFG_VAL 0x00010001
|
||||
#define CONFIG_SYS_SXCNFG_VAL 0x40044004
|
||||
|
||||
/*
|
||||
* PCMCIA and CF Interfaces
|
||||
*/
|
||||
#define CONFIG_SYS_MECR_VAL 0x00000001
|
||||
#define CONFIG_SYS_MCMEM0_VAL 0x00014307
|
||||
#define CONFIG_SYS_MCMEM1_VAL 0x00014307
|
||||
#define CONFIG_SYS_MCATT0_VAL 0x0001c787
|
||||
#define CONFIG_SYS_MCATT1_VAL 0x0001c787
|
||||
#define CONFIG_SYS_MCIO0_VAL 0x0001430f
|
||||
#define CONFIG_SYS_MCIO1_VAL 0x0001430f
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue