arm, i.mx27: add support for magnesium board from projectiondesign
This patch adds support for the magnesium board from projectiondesign. This board uses i.MX27 SoC and has 8MB NOR flash, 128MB NAND flash, FEC ethernet controller integrated into i.MX27. As this port is based on the imx27lite port, common config options are collected in include/configs/imx27lite-common.h Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher
trix
parent
1e65c2beb5
commit
bbe310922f
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@ -738,6 +738,10 @@ Jens Scharsig <esw@bus-elektronik.de>
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eb_cpux9k2 ARM920T (AT91RM9200 SoC)
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Heiko Schocher <hs@denx.de>
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magnesium i.MX27
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Robert Schwebel <r.schwebel@pengutronix.de>
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csb226 xscale
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1
MAKEALL
1
MAKEALL
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@ -569,6 +569,7 @@ LIST_ARM9=" \
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edb9315a \
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imx27lite \
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lpd7a400 \
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magnesium \
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mv88f6281gtw_ge \
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mx1ads \
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mx1fs2 \
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1
Makefile
1
Makefile
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@ -2940,6 +2940,7 @@ davinci_dm365evm_config : unconfig
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davinci_dm6467evm_config : unconfig
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@$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
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magnesium_config \
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imx27lite_config: unconfig
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@$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
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@ -29,6 +29,10 @@ DECLARE_GLOBAL_DATA_PTR;
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int board_init (void)
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{
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struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
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#if defined(CONFIG_SYS_NAND_LARGEPAGE)
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struct system_control_regs *sc_regs =
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(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
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#endif
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gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE;
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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@ -43,9 +47,20 @@ int board_init (void)
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®s->port[PORTC].dr);
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#endif
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#ifdef CONFIG_MXC_MMC
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#if defined(CONFIG_MAGNESIUM)
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mx27_sd1_init_pins();
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#else
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mx27_sd2_init_pins();
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#endif
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#endif
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#if defined(CONFIG_SYS_NAND_LARGEPAGE)
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/*
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* set in FMCR NF_FMS Bit(5) to 1
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* (NAND Flash with 2 Kbyte page size)
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*/
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writel(readl(&sc_regs->fmcr) | (1 << 5), &sc_regs->fmcr);
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#endif
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return 0;
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}
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@ -68,6 +83,7 @@ int dram_init (void)
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int checkboard(void)
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{
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printf("LogicPD imx27lite\n");
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puts ("Board: ");
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puts(CONFIG_BOARDNAME);
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return 0;
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}
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@ -0,0 +1,237 @@
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/*
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* Copyright (C) 2010 Heiko Schocher <hs@denx.de>
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*
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* based on:
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* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __IMX27LITE_COMMON_CONFIG_H
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#define __IMX27LITE_COMMON_CONFIG_H
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/*
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* SoC Configuration
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*/
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#define CONFIG_ARM926EJS /* arm926ejs CPU core */
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#define CONFIG_MX27
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#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Lowlevel configuration
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*/
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#define SDRAM_ESDCFG_REGISTER_VAL(cas) \
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(ESDCFG_TRC(10) | \
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ESDCFG_TRCD(3) | \
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ESDCFG_TCAS(cas) | \
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ESDCFG_TRRD(1) | \
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ESDCFG_TRAS(5) | \
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ESDCFG_TWR | \
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ESDCFG_TMRD(2) | \
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ESDCFG_TRP(2) | \
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ESDCFG_TXP(3))
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#define SDRAM_ESDCTL_REGISTER_VAL \
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(ESDCTL_PRCT(0) | \
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ESDCTL_BL | \
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ESDCTL_PWDT(0) | \
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ESDCTL_SREFR(3) | \
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ESDCTL_DSIZ_32 | \
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ESDCTL_COL10 | \
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ESDCTL_ROW13 | \
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ESDCTL_SDE)
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#define SDRAM_ALL_VAL 0xf00
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#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
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#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
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#define MPCTL0_VAL 0x1ef15d5
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#define SPCTL0_VAL 0x043a1c09
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#define CSCR_VAL 0x33f08107
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#define PCDR0_VAL 0x120470c3
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#define PCDR1_VAL 0x03030303
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#define PCCR0_VAL 0xffffffff
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#define PCCR1_VAL 0xfffffffc
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#define AIPI1_PSR0_VAL 0x20040304
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#define AIPI1_PSR1_VAL 0xdffbfcfb
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#define AIPI2_PSR0_VAL 0x07ffc200
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#define AIPI2_PSR1_VAL 0xffffffff
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/*
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* Memory Info
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*/
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/* malloc() len */
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#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
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/* reserved for initial data */
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#define CONFIG_SYS_GBL_DATA_SIZE 128
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/* memtest start address */
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#define CONFIG_SYS_MEMTEST_START 0xA0000000
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#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
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#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
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/*
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* Serial Driver info
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_SYS_MX27_UART1
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#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*
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* Flash & Environment
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*/
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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/* Use buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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/* Use hardware sector protection */
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#define CONFIG_SYS_FLASH_PROTECTION 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
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/* CS2 Base address */
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#define PHYS_FLASH_1 0xc0000000
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/* Flash Base for U-Boot */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
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CONFIG_SYS_FLASH_SECT_SZ)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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/*
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* Ethernet
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*/
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_MXC_PHYADDR 0x1f
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#define CONFIG_MII
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#define CONFIG_NET_MULTI
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/*
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* MTD
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*/
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#define CONFIG_FLASH_CFI_MTD
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#define CONFIG_MTD_DEVICE
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/*
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* NAND
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*/
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#define CONFIG_NAND_MXC
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#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0xd8000000
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#define CONFIG_JFFS2_NAND
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
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/*
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* SD/MMC
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*/
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_MXC_MMC
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#define CONFIG_DOS_PARTITION
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/*
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* MTD partitions
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*/
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#define CONFIG_CMD_MTDPARTS
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/*
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* U-Boot general configuration
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*/
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#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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/* Print buffer sz */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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/*
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* U-Boot commands
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_PING
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define xstr(s) str(s)
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#define str(s) #s
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addtty=setenv bootargs ${bootargs}" \
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" console=ttymxc0,${baudrate}\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addmisc=setenv bootargs ${bootargs}\0" \
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"u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
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"kernel_addr_r=a0800000\0" \
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"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
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"rootpath=/opt/eldk-4.2-arm/arm\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
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"run nfsargs addip addtty addmtd addmisc;" \
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"bootm\0" \
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"bootcmd=run net_nfs\0" \
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"load=tftp ${loadaddr} ${u-boot}\0" \
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"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
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" +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
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" +${filesize};cp.b ${fileaddr} " \
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xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
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"upd=run load update\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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#endif /* __IMX27LITE_COMMON_CONFIG_H */
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@ -20,158 +20,31 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* include common defines/options for all imx27lite related boards */
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#include "imx27lite-common.h"
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/*
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* SoC Configuration
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*/
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#define CONFIG_ARM926EJS /* arm926ejs CPU core */
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#define CONFIG_MX27
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#define CONFIG_IMX27LITE
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#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Lowlevel configuration
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*/
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#define SDRAM_ESDCFG_REGISTER_VAL(cas) \
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(ESDCFG_TRC(10) | \
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ESDCFG_TRCD(3) | \
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ESDCFG_TCAS(cas) | \
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ESDCFG_TRRD(1) | \
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ESDCFG_TRAS(5) | \
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ESDCFG_TWR | \
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ESDCFG_TMRD(2) | \
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ESDCFG_TRP(2) | \
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ESDCFG_TXP(3))
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#define SDRAM_ESDCTL_REGISTER_VAL \
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(ESDCTL_PRCT(0) | \
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ESDCTL_BL | \
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ESDCTL_PWDT(0) | \
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ESDCTL_SREFR(3) | \
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ESDCTL_DSIZ_32 | \
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ESDCTL_COL10 | \
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ESDCTL_ROW13 | \
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ESDCTL_SDE)
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#define SDRAM_ALL_VAL 0xf00
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#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
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#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
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#define MPCTL0_VAL 0x1ef15d5
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#define SPCTL0_VAL 0x043a1c09
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#define CSCR_VAL 0x33f08107
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#define PCDR0_VAL 0x120470c3
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#define PCDR1_VAL 0x03030303
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#define PCCR0_VAL 0xffffffff
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#define PCCR1_VAL 0xfffffffc
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#define AIPI1_PSR0_VAL 0x20040304
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#define AIPI1_PSR1_VAL 0xdffbfcfb
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#define AIPI2_PSR0_VAL 0x07ffc200
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#define AIPI2_PSR1_VAL 0xffffffff
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/*
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* Memory Info
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*/
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/* malloc() len */
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#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
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/* reserved for initial data */
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#define CONFIG_SYS_GBL_DATA_SIZE 128
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/* memtest start address */
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#define CONFIG_SYS_MEMTEST_START 0xA0000000
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#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
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#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
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/*
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* Serial Driver info
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_SYS_MX27_UART1
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#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_HOSTNAME imx27
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#define CONFIG_BOARDNAME "LogicPD imx27lite\n"
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/*
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* Flash & Environment
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*/
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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/* Use buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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/* Use hardware sector protection */
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#define CONFIG_SYS_FLASH_PROTECTION 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
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#define CONFIG_SYS_FLASH_SECT_SZ 0x2000 /* 8KB sect size Intel Flash */
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/* end of flash */
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#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - 0x20000)
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/* CS2 Base address */
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#define PHYS_FLASH_1 0xc0000000
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/* Flash Base for U-Boot */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/* Flash size 2MB */
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#define PHYS_FLASH_SIZE 0x200000
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#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
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CONFIG_SYS_FLASH_SECT_SZ)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
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#define CONFIG_ENV_SECT_SIZE 0x10000 /* Env sector Size */
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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/*
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* Ethernet
|
||||
*/
|
||||
#define CONFIG_FEC_MXC
|
||||
#define CONFIG_FEC_MXC_PHYADDR 0x1f
|
||||
#define CONFIG_MII
|
||||
#define CONFIG_NET_MULTI
|
||||
|
||||
/*
|
||||
* MTD
|
||||
*/
|
||||
#define CONFIG_FLASH_CFI_MTD
|
||||
#define CONFIG_MTD_DEVICE
|
||||
|
||||
/*
|
||||
* NAND
|
||||
*/
|
||||
#define CONFIG_NAND_MXC
|
||||
#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0xd8000000
|
||||
#define CONFIG_JFFS2_NAND
|
||||
#define CONFIG_MXC_NAND_HWECC
|
||||
#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
|
||||
|
||||
/*
|
||||
* SD/MMC
|
||||
*/
|
||||
#define CONFIG_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_MXC_MMC
|
||||
#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
/*
|
||||
* MTD partitions
|
||||
*/
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=mxc_nand.0"
|
||||
#define MTDPARTS_DEFAULT \
|
||||
"mtdparts=" \
|
||||
|
|
@ -186,69 +59,4 @@
|
|||
"22m(rootfs)," \
|
||||
"-(userfs)"
|
||||
|
||||
/*
|
||||
* U-Boot general configuration
|
||||
*/
|
||||
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
|
||||
#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
/* Print buffer sz */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
/* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
|
||||
/*
|
||||
* U-Boot commands
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#define CONFIG_CMD_ASKENV
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_DIAG
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_JFFS2
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_CMD_NAND
|
||||
#define CONFIG_CMD_PING
|
||||
|
||||
#define CONFIG_BOOTDELAY 5
|
||||
|
||||
#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
|
||||
#define xstr(s) str(s)
|
||||
#define str(s) #s
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"netdev=eth0\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=${serverip}:${rootpath}\0" \
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||
"addip=setenv bootargs ${bootargs} " \
|
||||
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
|
||||
":${hostname}:${netdev}:off panic=1\0" \
|
||||
"addtty=setenv bootargs ${bootargs}" \
|
||||
" console=ttymxc0,${baudrate}\0" \
|
||||
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
||||
"addmisc=setenv bootargs ${bootargs}\0" \
|
||||
"u-boot=imx27/u-boot.bin\0" \
|
||||
"kernel_addr_r=a0800000\0" \
|
||||
"hostname=imx27\0" \
|
||||
"bootfile=imx27/uImage\0" \
|
||||
"rootpath=/opt/eldk-4.2-arm/arm\0" \
|
||||
"net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
|
||||
"run nfsargs addip addtty addmtd addmisc;" \
|
||||
"bootm\0" \
|
||||
"bootcmd=run net_nfs\0" \
|
||||
"load=tftp ${loadaddr} ${u-boot}\0" \
|
||||
"update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
|
||||
" +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
|
||||
" +${filesize};cp.b ${fileaddr} " \
|
||||
xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
|
||||
"upd=run load update\0" \
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* Copyright (C) 2010 Heiko Schocher <hs@denx.de>
|
||||
*
|
||||
* based on:
|
||||
* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/* include common defines/options for all imx27lite related boards */
|
||||
#include "imx27lite-common.h"
|
||||
|
||||
/*
|
||||
* SoC Configuration
|
||||
*/
|
||||
#define CONFIG_MAGNESIUM
|
||||
#define CONFIG_HOSTNAME magnesium
|
||||
#define CONFIG_BOARDNAME "Projectiondesign magnesium\n"
|
||||
|
||||
/*
|
||||
* Flash & Environment
|
||||
*/
|
||||
#define CONFIG_SYS_FLASH_SECT_SZ 0x8000 /* 64KB sect size */
|
||||
#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - 0x40000)
|
||||
#define PHYS_FLASH_SIZE 0x800000
|
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 /* Env sector Size */
|
||||
|
||||
/*
|
||||
* NAND
|
||||
*/
|
||||
#define CONFIG_SYS_NAND_LARGEPAGE
|
||||
|
||||
/*
|
||||
* SD/MMC
|
||||
*/
|
||||
#define CONFIG_MXC_MCI_REGS_BASE 0x10013000
|
||||
|
||||
/*
|
||||
* MTD partitions
|
||||
*/
|
||||
#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=mxc_nand.0"
|
||||
#define MTDPARTS_DEFAULT \
|
||||
"mtdparts=" \
|
||||
"physmap-flash.0:" \
|
||||
"256k(U-Boot)," \
|
||||
"7680k(user)," \
|
||||
"128k(env1)," \
|
||||
"128k(env2);" \
|
||||
"mxc_nand.0:" \
|
||||
"128k(IPL-SPL)," \
|
||||
"4m(kernel)," \
|
||||
"22m(rootfs)," \
|
||||
"-(userfs)"
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue