ARMV7: Versatile Express Coretile CortexA9x4 support
Adds support for the ARM quad-core Cortex-A9 processor This system includes a motherboard(Versatile Express), daughterboard (Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is: SOC -> CortexA9 quad core = ca9x4 daughterboard -> Coretile = ct motherboard -> Versatile Express = vxp This gives ca9x4_ct_vxp.c as the board support file. Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
This commit is contained in:
Matt Waddel
Wolfgang Denk
parent
a4a87d8a93
commit
b80e41ac54
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@ -800,6 +800,10 @@ Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
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SFFSDR ARM926EJS
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Matt Waddel <matt.waddel@linaro.org>
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ca9x4_ct_vxp ARM ARMV7 (Quad Core)
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Prafulla Wadaskar <prafulla@marvell.com>
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mv88f6281gtw_ge ARM926EJS (Kirkwood SoC)
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1
MAKEALL
1
MAKEALL
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@ -489,6 +489,7 @@ LIST_ARM11=" \
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#########################################################################
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LIST_ARMV7=" \
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am3517_evm \
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ca9x4_ct_vxp \
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devkit8000 \
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mx51evk \
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omap3_beagle \
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@ -0,0 +1,70 @@
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/*
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* (C) Copyright 2010 Linaro
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* Matt Waddel, <matt.waddel@linaro.org>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
|
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _SYSCTRL_H_
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#define _SYSCTRL_H_
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/* System controller (SP810) register definitions */
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#define SP810_TIMER0_ENSEL (1 << 15)
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#define SP810_TIMER1_ENSEL (1 << 17)
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#define SP810_TIMER2_ENSEL (1 << 19)
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#define SP810_TIMER3_ENSEL (1 << 21)
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struct sysctrl {
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u32 scctrl; /* 0x000 */
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u32 scsysstat;
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u32 scimctrl;
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u32 scimstat;
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u32 scxtalctrl;
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u32 scpllctrl;
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u32 scpllfctrl;
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u32 scperctrl0;
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u32 scperctrl1;
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u32 scperen;
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u32 scperdis;
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u32 scperclken;
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u32 scperstat;
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u32 res1[0x006];
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u32 scflashctrl; /* 0x04c */
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u32 res2[0x3a4];
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u32 scsysid0; /* 0xee0 */
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u32 scsysid1;
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u32 scsysid2;
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u32 scsysid3;
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u32 scitcr;
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u32 scitir0;
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u32 scitir1;
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u32 scitor;
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u32 sccntctrl;
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u32 sccntdata;
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u32 sccntstep;
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u32 res3[0x32];
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u32 scperiphid0; /* 0xfe0 */
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u32 scperiphid1;
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u32 scperiphid2;
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u32 scperiphid3;
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u32 scpcellid0;
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u32 scpcellid1;
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u32 scpcellid2;
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u32 scpcellid3;
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};
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#endif /* _SYSCTRL_H_ */
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@ -0,0 +1,50 @@
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/*
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* (C) Copyright 2010 Linaro
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* Matt Waddel, <matt.waddel@linaro.org>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _SYSTIMER_H_
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#define _SYSTIMER_H_
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/* AMBA timer register base address */
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#define SYSTIMER_BASE 0x10011000
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#define SYSHZ_CLOCK 1000000 /* Timers -> 1Mhz */
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#define SYSTIMER_RELOAD 0xFFFFFFFF
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#define SYSTIMER_EN (1 << 7)
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#define SYSTIMER_32BIT (1 << 1)
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struct systimer {
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u32 timer0load; /* 0x00 */
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u32 timer0value;
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u32 timer0control;
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u32 timer0intclr;
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u32 timer0ris;
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u32 timer0mis;
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u32 timer0bgload;
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u32 timer1load; /* 0x20 */
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u32 timer1value;
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u32 timer1control;
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u32 timer1intclr;
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u32 timer1ris;
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u32 timer1mis;
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u32 timer1bgload;
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};
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#endif /* _SYSTIMER_H_ */
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@ -0,0 +1,55 @@
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/*
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* (C) Copyright 2010
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* Matt Waddel, <matt.waddel@linaro.org>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _WDT_H_
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#define _WDT_H_
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/* Watchdog timer (SP805) register base address */
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#define WDT_BASE 0x100E5000
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#define WDT_EN 0x2
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#define WDT_RESET_LOAD 0x0
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struct wdt {
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u32 wdogload; /* 0x000 */
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u32 wdogvalue;
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u32 wdogcontrol;
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u32 wdogintclr;
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u32 wdogris;
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u32 wdogmis;
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u32 res1[0x2F9];
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u32 wdoglock; /* 0xC00 */
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u32 res2[0xBE];
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u32 wdogitcr; /* 0xF00 */
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u32 wdogitop;
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u32 res3[0x35];
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u32 wdogperiphid0; /* 0xFE0 */
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u32 wdogperiphid1;
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u32 wdogperiphid2;
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u32 wdogperiphid3;
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u32 wdogpcellid0;
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u32 wdogpcellid1;
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u32 wdogpcellid2;
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u32 wdogpcellid3;
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};
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#endif /* _WDT_H_ */
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@ -0,0 +1,49 @@
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#
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# (C) Copyright 2000-2004
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS := ca9x4_ct_vxp.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,220 @@
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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*
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* (C) Copyright 2003
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* Texas Instruments, <www.ti.com>
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* Kshitij Gupta <Kshitij@ti.com>
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
|
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
||||
*
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||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/systimer.h>
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#include <asm/arch/sysctrl.h>
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#include <asm/arch/wdt.h>
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static ulong timestamp;
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static ulong lastdec;
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static struct wdt *wdt_base = (struct wdt *)WDT_BASE;
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static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
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static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
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static void flash__init(void);
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static void vexpress_timer_init(void);
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_SHOW_BOOT_PROGRESS)
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void show_boot_progress(int progress)
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{
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printf("Boot reached stage %d\n", progress);
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}
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#endif
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static inline void delay(ulong loops)
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{
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__asm__ volatile ("1:\n"
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"subs %0, %1, #1\n"
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"bne 1b" : "=r" (loops) : "0" (loops));
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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gd->bd->bi_arch_number = MACH_TYPE_VEXPRESS;
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gd->flags = 0;
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icache_enable();
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flash__init();
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vexpress_timer_init();
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC911X
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rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
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#endif
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return rc;
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}
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static void flash__init(void)
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{
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/* Setup the sytem control register to allow writing to flash */
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writel(readl(&sysctrl_base->scflashctrl) | VEXPRESS_FLASHPROG_FLVPPEN,
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&sysctrl_base->scflashctrl);
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = get_ram_size(PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
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}
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int timer_init(void)
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{
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return 0;
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}
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/*
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* Start timer:
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* Setup a 32 bit timer, running at 1KHz
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* Versatile Express Motherboard provides 1 MHz timer
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*/
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static void vexpress_timer_init(void)
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{
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/*
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* Set clock frequency in system controller:
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* VEXPRESS_REFCLK is 32KHz
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* VEXPRESS_TIMCLK is 1MHz
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*/
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writel(SP810_TIMER0_ENSEL | SP810_TIMER1_ENSEL |
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SP810_TIMER2_ENSEL | SP810_TIMER3_ENSEL |
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readl(&sysctrl_base->scctrl), &sysctrl_base->scctrl);
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/*
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* Set Timer0 to be:
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* Enabled, free running, no interrupt, 32-bit, wrapping
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*/
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writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
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writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
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writel(SYSTIMER_EN | SYSTIMER_32BIT | \
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readl(&systimer_base->timer0control), \
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&systimer_base->timer0control);
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||||
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reset_timer_masked();
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||||
}
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||||
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||||
/* Use the ARM Watchdog System to cause reset */
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||||
void reset_cpu(ulong addr)
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||||
{
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||||
writeb(WDT_EN, &wdt_base->wdogcontrol);
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||||
writel(WDT_RESET_LOAD, &wdt_base->wdogload);
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||||
while (1)
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||||
;
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||||
}
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||||
|
||||
/*
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||||
* Delay x useconds AND perserve advance timstamp value
|
||||
* assumes timer is ticking at 1 msec
|
||||
*/
|
||||
void udelay(ulong usec)
|
||||
{
|
||||
ulong tmo, tmp;
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||||
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||||
tmo = usec / 1000;
|
||||
tmp = get_timer(0); /* get current timestamp */
|
||||
|
||||
/*
|
||||
* If setting this forward will roll time stamp then
|
||||
* reset "advancing" timestamp to 0 and set lastdec value
|
||||
* otherwise set the advancing stamp to the wake up time
|
||||
*/
|
||||
if ((tmo + tmp + 1) < tmp)
|
||||
reset_timer_masked();
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||||
else
|
||||
tmo += tmp;
|
||||
|
||||
while (get_timer_masked() < tmo)
|
||||
; /* loop till wakeup event */
|
||||
}
|
||||
|
||||
ulong get_timer(ulong base)
|
||||
{
|
||||
return get_timer_masked() - base;
|
||||
}
|
||||
|
||||
void reset_timer_masked(void)
|
||||
{
|
||||
lastdec = readl(&systimer_base->timer0value) / 1000;
|
||||
timestamp = 0;
|
||||
}
|
||||
|
||||
void reset_timer(void)
|
||||
{
|
||||
reset_timer_masked();
|
||||
}
|
||||
|
||||
ulong get_timer_masked(void)
|
||||
{
|
||||
ulong now = readl(&systimer_base->timer0value) / 1000;
|
||||
|
||||
if (lastdec >= now) { /* normal mode (non roll) */
|
||||
timestamp += lastdec - now;
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||||
} else { /* count down timer overflowed */
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||||
/*
|
||||
* nts = ts + ld - now
|
||||
* ts = old stamp, ld = time before passing through - 1
|
||||
* now = amount of time after passing though - 1
|
||||
* nts = new "advancing time stamp"
|
||||
*/
|
||||
timestamp += lastdec + SYSTIMER_RELOAD - now;
|
||||
}
|
||||
lastdec = now;
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
void lowlevel_init(void)
|
||||
{
|
||||
}
|
||||
|
||||
ulong get_board_rev(void){
|
||||
return readl((u32 *)SYS_ID);
|
||||
}
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
# Linux-Kernel is expected to be at 0x60008000
|
||||
#
|
||||
TEXT_BASE = 0x60800000
|
||||
LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
arch/arm/cpu/armv7/start.o (.text)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data)
|
||||
__datarel_start = .;
|
||||
*(.data.rel)
|
||||
__datarelrolocal_start = .;
|
||||
*(.data.rel.ro.local)
|
||||
__datarellocal_start = .;
|
||||
*(.data.rel.local)
|
||||
__datarelro_start = .;
|
||||
*(.data.rel.ro)
|
||||
}
|
||||
|
||||
__got_start = .;
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
__got_end = .;
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
.bss : { *(.bss) }
|
||||
_end = .;
|
||||
}
|
||||
|
|
@ -252,6 +252,7 @@ imx27lite arm arm926ejs imx27lite logicpd mx27
|
|||
magnesium arm arm926ejs imx27lite logicpd mx27
|
||||
omap5912osk arm arm926ejs - ti omap
|
||||
edminiv2 arm arm926ejs - LaCie orion5x
|
||||
ca9x4_ct_vxp arm armv7 vexpress armltd
|
||||
omap3_overo arm armv7 overo - omap3
|
||||
omap3_pandora arm armv7 pandora - omap3
|
||||
omap3_zoom1 arm armv7 zoom1 logicpd omap3
|
||||
|
|
|
|||
|
|
@ -0,0 +1,196 @@
|
|||
/*
|
||||
* (C) Copyright 2010 Linaro
|
||||
* Matt Waddel, <matt.waddel@linaro.org>
|
||||
*
|
||||
* Configuration for Versatile Express. Parts were derived from other ARM
|
||||
* configurations.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/* Board info register */
|
||||
#define SYS_ID 0x10000000
|
||||
#define CONFIG_REVISION_TAG 1
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_ARMV7 1
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0x60000000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x20000000
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_L2_OFF 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
/* Size of malloc() pool */
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128
|
||||
|
||||
#define SCTL_BASE 0x10001000
|
||||
#define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
|
||||
|
||||
/* SMSC9115 Ethernet from SMSC9118 family */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC911X 1
|
||||
#define CONFIG_SMC911X_32_BIT 1
|
||||
#define CONFIG_SMC911X_BASE 0x4E000000
|
||||
|
||||
/* PL011 Serial Configuration */
|
||||
#define CONFIG_PL011_SERIAL
|
||||
#define CONFIG_PL011_CLOCK 24000000
|
||||
#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
|
||||
(void *)CONFIG_SYS_SERIAL1}
|
||||
#define CONFIG_CONS_INDEX 0
|
||||
|
||||
#define CONFIG_BAUDRATE 38400
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
#define CONFIG_SYS_SERIAL0 0x10009000
|
||||
#define CONFIG_SYS_SERIAL1 0x1000A000
|
||||
|
||||
/* Command line configuration */
|
||||
#define CONFIG_CMD_BDI
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_ELF
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_IMI
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_CMD_RUN
|
||||
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define CONFIG_MMC 1
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_GENERIC_MMC
|
||||
|
||||
/* BOOTP options */
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#undef CONFIG_SYS_CLKS_IN_HZ
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x60008000 /* load address */
|
||||
#define LINUX_BOOT_PARAM_ADDR 0x60000200
|
||||
#define CONFIG_BOOTDELAY 2
|
||||
|
||||
/* Stack sizes are set up in start.S using the settings below */
|
||||
#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* IRQ stack */
|
||||
#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* FIQ stack */
|
||||
#endif
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define CONFIG_NR_DRAM_BANKS 2
|
||||
#define PHYS_SDRAM_1 0x60000000 /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
|
||||
#define PHYS_SDRAM_2_SIZE 0x20000000 /* 512 MB */
|
||||
|
||||
/* additions for new relocation code */
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_RAM_END 0x1000
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
|
||||
CONFIG_SYS_INIT_RAM_END - \
|
||||
CONFIG_SYS_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
|
||||
|
||||
/* Basic environment settings */
|
||||
#define CONFIG_BOOTCOMMAND "run bootflash;"
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"loadaddr=0x80008000\0" \
|
||||
"initrd=0x61000000\0" \
|
||||
"kerneladdr=0x44100000\0" \
|
||||
"initrdaddr=0x44800000\0" \
|
||||
"maxinitrd=0x1800000\0" \
|
||||
"console=ttyAMA0,38400n8\0" \
|
||||
"dram=1024M\0" \
|
||||
"root=/dev/sda1 rw\0" \
|
||||
"mtd=armflash:1M@0x800000(uboot),7M@0x1000000(kernel)," \
|
||||
"24M@0x2000000(initrd)\0" \
|
||||
"flashargs=setenv bootargs root=${root} console=${console} " \
|
||||
"mem=${dram} mtdparts=${mtd} mmci.fmax=190000 " \
|
||||
"devtmpfs.mount=0 vmalloc=256M\0" \
|
||||
"bootflash=run flashargs; " \
|
||||
"cp ${initrdaddr} ${initrd} ${maxinitrd}; " \
|
||||
"bootm ${kerneladdr} ${initrd}\0"
|
||||
|
||||
/* FLASH and environment organization */
|
||||
#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
|
||||
#define CONFIG_SYS_FLASH_CFI 1
|
||||
#define CONFIG_FLASH_CFI_DRIVER 1
|
||||
#define CONFIG_SYS_FLASH_SIZE 0x04000000
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 2
|
||||
#define CONFIG_SYS_FLASH_BASE0 0x40000000
|
||||
#define CONFIG_SYS_FLASH_BASE1 0x44000000
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE0
|
||||
|
||||
/* Timeout values in ticks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
|
||||
|
||||
/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
|
||||
#define FLASH_MAX_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
|
||||
|
||||
/* Room required on the stack for the environment data */
|
||||
#define CONFIG_ENV_SIZE FLASH_MAX_SECTOR_SIZE
|
||||
|
||||
/*
|
||||
* Amount of flash used for environment:
|
||||
* We don't know which end has the small erase blocks so we use the penultimate
|
||||
* sector location for the environment
|
||||
*/
|
||||
#define CONFIG_ENV_SECT_SIZE FLASH_MAX_SECTOR_SIZE
|
||||
#define CONFIG_ENV_OVERWRITE 1
|
||||
|
||||
/* Store environment at top of flash */
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - \
|
||||
(2 * CONFIG_ENV_SECT_SIZE))
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE1 + \
|
||||
CONFIG_ENV_OFFSET)
|
||||
#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
|
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
|
||||
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE0, \
|
||||
CONFIG_SYS_FLASH_BASE1 }
|
||||
|
||||
/* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_PROMPT "VExpress# "
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
|
||||
#define CONFIG_CMD_SOURCE
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_CMDLINE_EDITING 1
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max command args */
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue