Blackfin: TWI/I2C: implement multibus support
In order to do this cleanly, the register accesses have to be converted to a C struct (base pointer), so do that in the process. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger
Heiko Schocher
parent
b88c5988db
commit
b5cebb4fd6
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@ -1,7 +1,7 @@
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/*
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* i2c.c - driver for Blackfin on-chip TWI/I2C
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*
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* Copyright (c) 2006-2008 Analog Devices Inc.
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* Copyright (c) 2006-2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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@ -12,6 +12,35 @@
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#include <asm/blackfin.h>
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#include <asm/mach-common/bits/twi.h>
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/* Every register is 32bit aligned, but only 16bits in size */
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#define ureg(name) u16 name; u16 __pad_##name;
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struct twi_regs {
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ureg(clkdiv);
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ureg(control);
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ureg(slave_ctl);
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ureg(slave_stat);
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ureg(slave_addr);
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ureg(master_ctl);
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ureg(master_stat);
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ureg(master_addr);
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ureg(int_stat);
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ureg(int_mask);
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ureg(fifo_ctl);
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ureg(fifo_stat);
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char __pad[0x50];
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ureg(xmt_data8);
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ureg(xmt_data16);
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ureg(rcv_data8);
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ureg(rcv_data16);
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};
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#undef ureg
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/* U-Boot I2C framework allows only one active device at a time. */
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#ifdef TWI_CLKDIV
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#define TWI0_CLKDIV TWI_CLKDIV
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#endif
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static volatile struct twi_regs *twi = (void *)TWI0_CLKDIV;
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#ifdef DEBUG
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# define dmemset(s, c, n) memset(s, c, n)
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#else
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@ -19,29 +48,10 @@
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#endif
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#define debugi(fmt, args...) \
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debug( \
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"MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t" \
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"%-20s:%-3i: " fmt "\n", \
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bfin_read_TWI_MASTER_STAT(), bfin_read_TWI_FIFO_STAT(), bfin_read_TWI_INT_STAT(), \
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"MSTAT:0x%03x FSTAT:0x%x ISTAT:0x%02x\t%-20s:%-3i: " fmt "\n", \
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twi->master_stat, twi->fifo_stat, twi->int_stat, \
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__func__, __LINE__, ## args)
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#ifdef TWI0_CLKDIV
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#define bfin_write_TWI_CLKDIV(val) bfin_write_TWI0_CLKDIV(val)
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#define bfin_read_TWI_CLKDIV(val) bfin_read_TWI0_CLKDIV(val)
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#define bfin_write_TWI_CONTROL(val) bfin_write_TWI0_CONTROL(val)
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#define bfin_read_TWI_CONTROL(val) bfin_read_TWI0_CONTROL(val)
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#define bfin_write_TWI_MASTER_ADDR(val) bfin_write_TWI0_MASTER_ADDR(val)
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#define bfin_write_TWI_XMT_DATA8(val) bfin_write_TWI0_XMT_DATA8(val)
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#define bfin_read_TWI_RCV_DATA8() bfin_read_TWI0_RCV_DATA8()
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#define bfin_read_TWI_INT_STAT() bfin_read_TWI0_INT_STAT()
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#define bfin_write_TWI_INT_STAT(val) bfin_write_TWI0_INT_STAT(val)
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#define bfin_read_TWI_MASTER_STAT() bfin_read_TWI0_MASTER_STAT()
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#define bfin_write_TWI_MASTER_STAT(val) bfin_write_TWI0_MASTER_STAT(val)
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#define bfin_read_TWI_MASTER_CTL() bfin_read_TWI0_MASTER_CTL()
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#define bfin_write_TWI_MASTER_CTL(val) bfin_write_TWI0_MASTER_CTL(val)
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#define bfin_write_TWI_INT_MASK(val) bfin_write_TWI0_INT_MASK(val)
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#define bfin_write_TWI_FIFO_CTL(val) bfin_write_TWI0_FIFO_CTL(val)
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#endif
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#ifdef CONFIG_TWICLK_KHZ
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# error do not define CONFIG_TWICLK_KHZ ... use CONFIG_SYS_I2C_SPEED
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#endif
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@ -87,49 +97,48 @@ static int wait_for_completion(struct i2c_msg *msg)
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ulong timebase = get_timer(0);
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do {
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int_stat = bfin_read_TWI_INT_STAT();
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int_stat = twi->int_stat;
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if (int_stat & XMTSERV) {
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debugi("processing XMTSERV");
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bfin_write_TWI_INT_STAT(XMTSERV);
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twi->int_stat = XMTSERV;
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SSYNC();
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if (msg->alen) {
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bfin_write_TWI_XMT_DATA8(*(msg->abuf++));
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twi->xmt_data8 = *(msg->abuf++);
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--msg->alen;
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} else if (!(msg->flags & I2C_M_COMBO) && msg->len) {
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bfin_write_TWI_XMT_DATA8(*(msg->buf++));
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twi->xmt_data8 = *(msg->buf++);
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--msg->len;
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} else {
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bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() |
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(msg->flags & I2C_M_COMBO ? RSTART | MDIR : STOP));
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twi->master_ctl |= (msg->flags & I2C_M_COMBO) ? RSTART | MDIR : STOP;
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SSYNC();
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}
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}
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if (int_stat & RCVSERV) {
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debugi("processing RCVSERV");
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bfin_write_TWI_INT_STAT(RCVSERV);
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twi->int_stat = RCVSERV;
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SSYNC();
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if (msg->len) {
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*(msg->buf++) = bfin_read_TWI_RCV_DATA8();
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*(msg->buf++) = twi->rcv_data8;
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--msg->len;
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} else if (msg->flags & I2C_M_STOP) {
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bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() | STOP);
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twi->master_ctl |= STOP;
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SSYNC();
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}
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}
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if (int_stat & MERR) {
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debugi("processing MERR");
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bfin_write_TWI_INT_STAT(MERR);
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twi->int_stat = MERR;
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SSYNC();
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return msg->len;
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}
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if (int_stat & MCOMP) {
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debugi("processing MCOMP");
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bfin_write_TWI_INT_STAT(MCOMP);
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twi->int_stat = MCOMP;
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SSYNC();
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if (msg->flags & I2C_M_COMBO && msg->len) {
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bfin_write_TWI_MASTER_CTL((bfin_read_TWI_MASTER_CTL() & ~RSTART) |
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(min(msg->len, 0xff) << 6) | MEN | MDIR);
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twi->master_ctl = (twi->master_ctl & ~RSTART) |
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(min(msg->len, 0xff) << 6) | MEN | MDIR;
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SSYNC();
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} else
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break;
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@ -172,55 +181,54 @@ static int i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer, int len,
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chip, addr, alen, buffer[0], len, flags, (flags & I2C_M_READ ? "rd" : "wr"));
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/* wait for things to settle */
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while (bfin_read_TWI_MASTER_STAT() & BUSBUSY)
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while (twi->master_stat & BUSBUSY)
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if (ctrlc())
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return 1;
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/* Set Transmit device address */
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bfin_write_TWI_MASTER_ADDR(chip);
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twi->master_addr = chip;
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/* Clear the FIFO before starting things */
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bfin_write_TWI_FIFO_CTL(XMTFLUSH | RCVFLUSH);
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twi->fifo_ctl = XMTFLUSH | RCVFLUSH;
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SSYNC();
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bfin_write_TWI_FIFO_CTL(0);
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twi->fifo_ctl = 0;
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SSYNC();
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/* prime the pump */
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if (msg.alen) {
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len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len;
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debugi("first byte=0x%02x", *msg.abuf);
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bfin_write_TWI_XMT_DATA8(*(msg.abuf++));
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twi->xmt_data8 = *(msg.abuf++);
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--msg.alen;
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} else if (!(msg.flags & I2C_M_READ) && msg.len) {
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debugi("first byte=0x%02x", *msg.buf);
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bfin_write_TWI_XMT_DATA8(*(msg.buf++));
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twi->xmt_data8 = *(msg.buf++);
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--msg.len;
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}
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/* clear int stat */
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bfin_write_TWI_MASTER_STAT(-1);
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bfin_write_TWI_INT_STAT(-1);
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bfin_write_TWI_INT_MASK(0);
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twi->master_stat = -1;
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twi->int_stat = -1;
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twi->int_mask = 0;
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SSYNC();
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/* Master enable */
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bfin_write_TWI_MASTER_CTL(
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(bfin_read_TWI_MASTER_CTL() & FAST) |
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twi->master_ctl =
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(twi->master_ctl & FAST) |
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(min(len, 0xff) << 6) | MEN |
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((msg.flags & I2C_M_READ) ? MDIR : 0)
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);
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((msg.flags & I2C_M_READ) ? MDIR : 0);
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SSYNC();
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debugi("CTL=0x%04x", bfin_read_TWI_MASTER_CTL());
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debugi("CTL=0x%04x", twi->master_ctl);
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/* process the rest */
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ret = wait_for_completion(&msg);
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debugi("ret=%d", ret);
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if (ret) {
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bfin_write_TWI_MASTER_CTL(bfin_read_TWI_MASTER_CTL() & ~MEN);
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bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() & ~TWI_ENA);
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twi->master_ctl &= ~MEN;
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twi->control &= ~TWI_ENA;
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SSYNC();
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bfin_write_TWI_CONTROL(bfin_read_TWI_CONTROL() | TWI_ENA);
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twi->control |= TWI_ENA;
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SSYNC();
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}
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@ -238,10 +246,10 @@ int i2c_set_bus_speed(unsigned int speed)
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/* Set TWI interface clock */
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if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN)
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return -1;
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bfin_write_TWI_CLKDIV((clkdiv << 8) | (clkdiv & 0xff));
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twi->clkdiv = (clkdiv << 8) | (clkdiv & 0xff);
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/* Don't turn it on */
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bfin_write_TWI_MASTER_CTL(speed > 100000 ? FAST : 0);
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twi->master_ctl = (speed > 100000 ? FAST : 0);
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return 0;
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}
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@ -253,7 +261,7 @@ int i2c_set_bus_speed(unsigned int speed)
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unsigned int i2c_get_bus_speed(void)
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{
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/* 10 MHz / (2 * CLKDIV) -> 5 MHz / CLKDIV */
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return 5000000 / (bfin_read_TWI_CLKDIV() & 0xff);
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return 5000000 / (twi->clkdiv & 0xff);
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}
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/**
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@ -269,24 +277,23 @@ void i2c_init(int speed, int slaveaddr)
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uint8_t prescale = ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F;
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/* Set TWI internal clock as 10MHz */
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bfin_write_TWI_CONTROL(prescale);
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twi->control = prescale;
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/* Set TWI interface clock as specified */
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i2c_set_bus_speed(speed);
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/* Enable it */
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bfin_write_TWI_CONTROL(TWI_ENA | prescale);
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twi->control = TWI_ENA | prescale;
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SSYNC();
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debugi("CONTROL:0x%04x CLKDIV:0x%04x",
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bfin_read_TWI_CONTROL(), bfin_read_TWI_CLKDIV());
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debugi("CONTROL:0x%04x CLKDIV:0x%04x", twi->control, twi->clkdiv);
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#if CONFIG_SYS_I2C_SLAVE
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# error I2C slave support not tested/supported
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/* If they want us as a slave, do it */
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if (slaveaddr) {
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bfin_write_TWI_SLAVE_ADDR(slaveaddr);
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bfin_write_TWI_SLAVE_CTL(SEN);
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twi->slave_addr = slaveaddr;
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twi->slave_ctl = SEN;
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}
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#endif
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}
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@ -329,3 +336,43 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
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{
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return i2c_transfer(chip, addr, alen, buffer, len, 0);
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}
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/**
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* i2c_set_bus_num - change active I2C bus
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* @bus: bus index, zero based
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* @returns: 0 on success, non-0 on failure
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*/
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int i2c_set_bus_num(unsigned int bus)
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{
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switch (bus) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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case 0: twi = (void *)TWI0_CLKDIV; return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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case 1: twi = (void *)TWI1_CLKDIV; return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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case 2: twi = (void *)TWI2_CLKDIV; return 0;
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#endif
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default: return -1;
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}
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}
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/**
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* i2c_get_bus_num - returns index of active I2C bus
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*/
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unsigned int i2c_get_bus_num(void)
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{
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switch ((unsigned long)twi) {
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#if CONFIG_SYS_MAX_I2C_BUS > 0
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case TWI0_CLKDIV: return 0;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 1
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case TWI1_CLKDIV: return 1;
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#endif
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#if CONFIG_SYS_MAX_I2C_BUS > 2
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case TWI2_CLKDIV: return 2;
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#endif
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default: return -1;
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}
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}
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