sh: Update core code of SuperH.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Nobuhiro Iwamatsu
parent
b8685affe6
commit
b02bad1286
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@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).a
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START = start.o
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OBJS = cpu.o interrupts.o watchdog.o time.o
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OBJS = cpu.o interrupts.o watchdog.o time.o cache.o
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all: .depend $(START) $(LIB)
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@ -0,0 +1,108 @@
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/*
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* (C) Copyright 2007
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* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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/*
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* Jump to P2 area.
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* When handling TLB or caches, we need to do it from P2 area.
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*/
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#define jump_to_P2() \
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do { \
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unsigned long __dummy; \
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__asm__ __volatile__( \
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"mov.l 1f, %0\n\t" \
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"or %1, %0\n\t" \
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"jmp @%0\n\t" \
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" nop\n\t" \
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".balign 4\n" \
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"1: .long 2f\n" \
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"2:" \
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: "=&r" (__dummy) \
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: "r" (0x20000000)); \
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} while (0)
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/*
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* Back to P1 area.
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*/
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#define back_to_P1() \
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do { \
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unsigned long __dummy; \
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__asm__ __volatile__( \
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"nop;nop;nop;nop;nop;nop;nop\n\t" \
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"mov.l 1f, %0\n\t" \
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"jmp @%0\n\t" \
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" nop\n\t" \
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".balign 4\n" \
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"1: .long 2f\n" \
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"2:" \
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: "=&r" (__dummy)); \
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} while (0)
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#define CACHE_VALID 1
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#define CACHE_UPDATED 2
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static inline void cache_wback_all(void)
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{
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unsigned long addr, data, i, j;
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jump_to_P2();
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for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++){
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for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
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addr = CACHE_OC_ADDRESS_ARRAY | (j << CACHE_OC_WAY_SHIFT)
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| (i << CACHE_OC_ENTRY_SHIFT);
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data = inl(addr);
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if (data & CACHE_UPDATED) {
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data &= ~CACHE_UPDATED;
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outl(data, addr);
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}
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}
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}
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back_to_P1();
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}
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#define CACHE_ENABLE 0
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#define CACHE_DISABLE 1
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int cache_control(unsigned int cmd)
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{
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unsigned long ccr;
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jump_to_P2();
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ccr = inl(CCR);
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if (ccr & CCR_CACHE_ENABLE)
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cache_wback_all();
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if (cmd == CACHE_DISABLE)
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outl(CCR_CACHE_STOP, CCR);
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else
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outl(CCR_CACHE_INIT, CCR);
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back_to_P1();
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return 0;
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}
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@ -23,6 +23,7 @@
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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int checkcpu(void)
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{
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@ -48,20 +49,35 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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return 0;
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}
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void flush_cache (unsigned long addr, unsigned long size){}
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void flush_cache (unsigned long addr, unsigned long size)
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{
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}
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void icache_enable (void)
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{
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cache_control(0);
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}
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void icache_disable (void)
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{
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cache_control(1);
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}
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int icache_status (void)
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{
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return 0;
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}
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void dcache_enable (void)
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{
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}
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void dcache_disable (void)
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{
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}
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int dcache_status (void)
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{
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return 0;
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}
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@ -1,4 +1,7 @@
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/*
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* (C) Copyright 2007
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* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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@ -31,7 +34,15 @@ static void tmu_timer_start (unsigned int timer)
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if (timer > 2)
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return;
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*((volatile unsigned char *) TSTR0) |= (1 << timer);
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*((volatile unsigned char *) TSTR) |= (1 << timer);
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}
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static void tmu_timer_stop (unsigned int timer)
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{
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u8 val = *((volatile u8 *)TSTR);
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if (timer > 2)
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return;
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*((volatile unsigned char *)TSTR) = val &~(1 << timer);
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}
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int timer_init (void)
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@ -39,7 +50,8 @@ int timer_init (void)
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/* Divide clock by 4 */
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*(volatile u16 *)TCR0 = 0;
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tmu_timer_start (0);
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tmu_timer_stop(0);
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tmu_timer_start(0);
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return 0;
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}
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@ -51,15 +63,12 @@ int timer_init (void)
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*/
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unsigned long long get_ticks (void)
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{
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return (0 - *((volatile unsigned int *) TCNT0));
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return (0 - *((volatile u32 *) TCNT0));
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}
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unsigned long get_timer (unsigned long base)
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{
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unsigned long n =
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*((volatile unsigned int *)TCNT0) ;
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return ((int)n - base ) < 0 ? ( TMU_MAX_COUNTER - ( base -n )):(n - base );
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return ((0 - *((volatile u32 *) TCNT0)) - base);
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}
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void set_timer (unsigned long t)
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@ -69,19 +78,15 @@ void set_timer (unsigned long t)
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void reset_timer (void)
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{
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tmu_timer_stop(0);
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set_timer (0);
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tmu_timer_start(0);
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}
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void udelay (unsigned long usec)
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{
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unsigned int start = get_timer (0);
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unsigned int end = 0;
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if (usec > 1000000)
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end = ((usec/100000) * CFG_HZ) / 10;
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else if (usec > 1000)
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end = ((usec/100) * CFG_HZ) / 10000;
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else
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end = (usec * CFG_HZ) / 1000000;
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unsigned int end = start + (usec * ((CFG_HZ + 500000) / 1000000));
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while (get_timer (0) < end)
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continue;
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@ -91,4 +96,3 @@ unsigned long get_tbclk (void)
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{
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return CFG_HZ;
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}
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@ -32,11 +32,13 @@ static void cnt_write (unsigned char value){
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while (csr_read() & (1 << 5)) {
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/* delay */
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}
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*((volatile unsigned short *)(WDT_BASE + 0x00)) = ((unsigned short) value) | 0x5A00;
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*((volatile unsigned short *)(WDT_BASE + 0x00))
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= ((unsigned short) value) | 0x5A00;
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}
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static void csr_write (unsigned char value){
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*((volatile unsigned short *)(WDT_BASE + 0x04)) = ((unsigned short) value) | 0xA500;
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*((volatile unsigned short *)(WDT_BASE + 0x04))
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= ((unsigned short) value) | 0xA500;
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}
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@ -1,13 +1,166 @@
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#ifndef __ASM_SH_BITOPS_H_
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#define __ASM_SH_BITOPS_H_
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#ifndef __ASM_SH_BITOPS_H
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#define __ASM_SH_BITOPS_H
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extern void set_bit(int nr, volatile void * a);
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extern void clear_bit(int nr, volatile void * a);
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extern int test_and_clear_bit(int nr, volatile void * a);
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extern void change_bit(unsigned long nr, volatile void *addr);
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extern int test_and_set_bit(int nr, volatile void * a);
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extern int test_and_change_bit(int nr, volatile void * addr);
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extern int test_bit(int nr, volatile void * a);
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extern int ffs(int i);
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#ifdef __KERNEL__
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//#include <asm/system.h>
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#include <asm/irqflags.h>
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/* For __swab32 */
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#include <asm/byteorder.h>
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static inline void set_bit(int nr, volatile void * addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a |= mask;
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local_irq_restore(flags);
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}
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/*
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* clear_bit() doesn't provide any barrier for the compiler.
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*/
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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static inline void clear_bit(int nr, volatile void * addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a &= ~mask;
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local_irq_restore(flags);
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}
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static inline void change_bit(int nr, volatile void * addr)
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{
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int mask;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a ^= mask;
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local_irq_restore(flags);
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}
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static inline int test_and_set_bit(int nr, volatile void * addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a |= mask;
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local_irq_restore(flags);
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return retval;
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}
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static inline int test_and_clear_bit(int nr, volatile void * addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a &= ~mask;
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local_irq_restore(flags);
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return retval;
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}
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static inline int test_and_change_bit(int nr, volatile void * addr)
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{
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int mask, retval;
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volatile unsigned int *a = addr;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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retval = (mask & *a) != 0;
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*a ^= mask;
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local_irq_restore(flags);
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return retval;
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}
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//#include <asm-generic/bitops/non-atomic.h>
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static inline unsigned long ffz(unsigned long word)
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{
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unsigned long result;
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__asm__("1:\n\t"
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"shlr %1\n\t"
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"bt/s 1b\n\t"
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" add #1, %0"
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: "=r" (result), "=r" (word)
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: "0" (~0L), "1" (word)
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: "t");
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return result;
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}
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/**
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* ffs - find first bit in word.
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* @word: The word to search
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*
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* Undefined if no bit exists, so code should check against 0 first.
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*/
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static inline int ffs(int x)
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{
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int r = 1;
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if (!x)
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return 0;
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if (!(x & 0xffff)) {
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x >>= 16;
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r += 16;
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}
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if (!(x & 0xff)) {
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x >>= 8;
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r += 8;
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}
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if (!(x & 0xf)) {
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x >>= 4;
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r += 4;
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}
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if (!(x & 3)) {
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x >>= 2;
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r += 2;
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}
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if (!(x & 1)) {
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x >>= 1;
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r += 1;
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}
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return r;
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}
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#if 0
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/ext2-non-atomic.h>
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#include <asm-generic/bitops/ext2-atomic.h>
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#include <asm-generic/bitops/minix.h>
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/fls64.h>
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH_BITOPS_H */
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|
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@ -1,10 +1,48 @@
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/*
|
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* (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
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||||
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#ifndef _ASM_CPU_SH4_H_
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#define _ASM_CPU_SH4_H_
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/* cache control */
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#define CCR_CACHE_STOP 0x00000808
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#define CCR_CACHE_ENABLE 0x00000101
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#define CCR_CACHE_ICI 0x00000800
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#define CACHE_OC_ADDRESS_ARRAY 0xf4000000
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#define CACHE_OC_WAY_SHIFT 14
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#define CACHE_OC_NUM_ENTRIES 512
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#define CACHE_OC_ENTRY_SHIFT 5
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//#define CACHE_OC_NUM_WAYS 1
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|
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#if defined (CONFIG_CPU_SH7750)
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#include <asm/cpu_sh7750.h>
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#elif defined (CONFIG_CPU_SH7780)
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#include <asm/cpu_sh7780.h>
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//#ifdef CONFIG_CPU_TYPE_R
|
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//#define CCR_CACHE_INIT 0x8000090d /* EMODE,ICI,ICE(16k),OCI,P1-wb,OCE(32k) */
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//#else
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//#define CCR_CACHE_INIT 0x0000090b
|
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//#endif
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#elif defined (CONFIG_CPU_SH7722)
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#include <asm/cpu_sh7722.h>
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//#define CCR_CACHE_INIT 0x0000090d
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#else
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#error "Unknown SH4 variant"
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#endif
|
||||
#endif
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|
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#endif /* _ASM_CPU_SH4_H_ */
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|
|
|
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|
|
@ -1,13 +1,44 @@
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/*
|
||||
* (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
*
|
||||
* SH7750/SH7750S/SH7750R/SH7751/SH7751R
|
||||
* Internal I/O register
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _ASM_CPU_SH7750_H_
|
||||
#define _ASM_CPU_SH7750_H_
|
||||
|
||||
#define PTEH 0xFF000000
|
||||
#define PTEL 0xFF000004
|
||||
#define TTB 0xFF000008
|
||||
#define TEA 0xFF00000C
|
||||
#define MMUCR 0xFF000010
|
||||
#define BASRA 0xFF000014
|
||||
#define BASRB 0xFF000018
|
||||
#ifdef CONFIG_CPU_TYPE_R
|
||||
#define CACHE_OC_NUM_WAYS 2
|
||||
#define CCR_CACHE_INIT 0x8000090d /* EMODE,ICI,ICE(16k),OCI,P1-wb,OCE(32k) */
|
||||
#else
|
||||
#define CACHE_OC_NUM_WAYS 1
|
||||
#define CCR_CACHE_INIT 0x0000090b
|
||||
#endif
|
||||
|
||||
/* OCN */
|
||||
#define PTEH 0xFF000000
|
||||
#define PTEL 0xFF000004
|
||||
#define TTB 0xFF000008
|
||||
#define TEA 0xFF00000C
|
||||
#define MMUCR 0xFF000010
|
||||
#define BASRA 0xFF000014
|
||||
#define BASRB 0xFF000018
|
||||
#define CCR 0xFF00001C
|
||||
#define TRA 0xFF000020
|
||||
#define EXPEVT 0xFF000024
|
||||
|
|
@ -15,6 +46,8 @@
|
|||
#define PTEA 0xFF000034
|
||||
#define QACR0 0xFF000038
|
||||
#define QACR1 0xFF00003C
|
||||
|
||||
/* UBC */
|
||||
#define BARA 0xFF200000
|
||||
#define BAMRA 0xFF200004
|
||||
#define BBRA 0xFF200008
|
||||
|
|
@ -25,121 +58,139 @@
|
|||
#define BDMRB 0xFF20001C
|
||||
#define BRCR 0xFF200020
|
||||
|
||||
/* BSC */
|
||||
#define BCR1 0xFF800000
|
||||
#define BCR2 0xFF800004
|
||||
#define BCR3 0xFF800050
|
||||
#define BCR4 0xFE0A00F0
|
||||
#define WCR1 0xFF800008
|
||||
#define WCR2 0xFF80000C
|
||||
#define WCR3 0xFF800010
|
||||
#define MCR 0xFF800014
|
||||
#define PCR 0xFF800018
|
||||
#define RTCSR 0xFF80001C
|
||||
#define RTCNT 0xFF800020
|
||||
#define RTCOR 0xFF800024
|
||||
#define RFCR 0xFF800028
|
||||
#define PCTRA 0xFF80002C
|
||||
#define PDTRA 0xFF800030
|
||||
#define PCTRB 0xFF800040
|
||||
#define PDTRB 0xFF800044
|
||||
#define GPIOIC 0xFF800048
|
||||
#define SAR0 0xFFA00000
|
||||
#define DAR0 0xFFA00004
|
||||
#define DMATCR0 0xFFA00008
|
||||
#define CHCR0 0xFFA0000C
|
||||
#define SAR1 0xFFA00010
|
||||
#define DAR1 0xFFA00014
|
||||
#define DMATCR1 0xFFA00018
|
||||
#define CHCR1 0xFFA0001C
|
||||
#define SAR2 0xFFA00020
|
||||
#define DAR2 0xFFA00024
|
||||
#define DMATCR2 0xFFA00028
|
||||
#define CHCR2 0xFFA0002C
|
||||
#define SAR3 0xFFA00030
|
||||
#define DAR3 0xFFA00034
|
||||
#define DMATCR3 0xFFA00038
|
||||
#define CHCR3 0xFFA0003C
|
||||
#define DMAOR 0xFFA00040
|
||||
#define SAR4 0xFFA00050
|
||||
#define DAR4 0xFFA00054
|
||||
#define DMATCR4 0xFFA00058
|
||||
#define BCR2 0xFF800004
|
||||
#define BCR3 0xFF800050
|
||||
#define BCR4 0xFE0A00F0
|
||||
#define WCR1 0xFF800008
|
||||
#define WCR2 0xFF80000C
|
||||
#define WCR3 0xFF800010
|
||||
#define MCR 0xFF800014
|
||||
#define PCR 0xFF800018
|
||||
#define RTCSR 0xFF80001C
|
||||
#define RTCNT 0xFF800020
|
||||
#define RTCOR 0xFF800024
|
||||
#define RFCR 0xFF800028
|
||||
#define PCTRA 0xFF80002C
|
||||
#define PDTRA 0xFF800030
|
||||
#define PCTRB 0xFF800040
|
||||
#define PDTRB 0xFF800044
|
||||
#define GPIOIC 0xFF800048
|
||||
|
||||
#define FRQCR 0xFFC00000
|
||||
#define STBCR 0xFFC00004
|
||||
#define WTCNT 0xFFC00008
|
||||
#define WTCSR 0xFFC0000C
|
||||
#define STBCR2 0xFFC00010
|
||||
#define R64CNT 0xFFC80000
|
||||
#define RSECCNT 0xFFC80004
|
||||
#define RMINCNT 0xFFC80008
|
||||
#define RHRCNT 0xFFC8000C
|
||||
#define RWKCNT 0xFFC80010
|
||||
#define RDAYCNT 0xFFC80014
|
||||
#define RMONCNT 0xFFC80018
|
||||
#define RYRCNT 0xFFC8001C
|
||||
#define RSECAR 0xFFC80020
|
||||
#define RMINAR 0xFFC80024
|
||||
#define RHRAR 0xFFC80028
|
||||
#define RWKAR 0xFFC8002C
|
||||
#define RDAYAR 0xFFC80030
|
||||
#define RMONAR 0xFFC80034
|
||||
#define RCR1 0xFFC80038
|
||||
#define RCR2 0xFFC8003C
|
||||
#define RCR3 0xFFC80050
|
||||
#define RYRAR 0xFFC80054
|
||||
#define ICR 0xFFD00000
|
||||
#define IPRA 0xFFD00004
|
||||
#define IPRB 0xFFD00008
|
||||
#define IPRC 0xFFD0000C
|
||||
#define IPRD 0xFFD00010
|
||||
#define INTPRI 0xFE080000
|
||||
#define INTREQ 0xFE080020
|
||||
#define INTMSK 0xFE080040
|
||||
#define INTMSKCL 0xFE080060
|
||||
/* DMAC */
|
||||
#define SAR0 0xFFA00000
|
||||
#define DAR0 0xFFA00004
|
||||
#define DMATCR0 0xFFA00008
|
||||
#define CHCR0 0xFFA0000C
|
||||
#define SAR1 0xFFA00010
|
||||
#define DAR1 0xFFA00014
|
||||
#define DMATCR1 0xFFA00018
|
||||
#define CHCR1 0xFFA0001C
|
||||
#define SAR2 0xFFA00020
|
||||
#define DAR2 0xFFA00024
|
||||
#define DMATCR2 0xFFA00028
|
||||
#define CHCR2 0xFFA0002C
|
||||
#define SAR3 0xFFA00030
|
||||
#define DAR3 0xFFA00034
|
||||
#define DMATCR3 0xFFA00038
|
||||
#define CHCR3 0xFFA0003C
|
||||
#define DMAOR 0xFFA00040
|
||||
#define SAR4 0xFFA00050
|
||||
#define DAR4 0xFFA00054
|
||||
#define DMATCR4 0xFFA00058
|
||||
|
||||
/* CPG */
|
||||
#define FRQCR 0xFFC00000
|
||||
#define STBCR 0xFFC00004
|
||||
#define WTCNT 0xFFC00008
|
||||
#define WTCSR 0xFFC0000C
|
||||
#define STBCR2 0xFFC00010
|
||||
|
||||
/* RTC */
|
||||
#define R64CNT 0xFFC80000
|
||||
#define RSECCNT 0xFFC80004
|
||||
#define RMINCNT 0xFFC80008
|
||||
#define RHRCNT 0xFFC8000C
|
||||
#define RWKCNT 0xFFC80010
|
||||
#define RDAYCNT 0xFFC80014
|
||||
#define RMONCNT 0xFFC80018
|
||||
#define RYRCNT 0xFFC8001C
|
||||
#define RSECAR 0xFFC80020
|
||||
#define RMINAR 0xFFC80024
|
||||
#define RHRAR 0xFFC80028
|
||||
#define RWKAR 0xFFC8002C
|
||||
#define RDAYAR 0xFFC80030
|
||||
#define RMONAR 0xFFC80034
|
||||
#define RCR1 0xFFC80038
|
||||
#define RCR2 0xFFC8003C
|
||||
#define RCR3 0xFFC80050
|
||||
#define RYRAR 0xFFC80054
|
||||
|
||||
/* ICR */
|
||||
#define ICR 0xFFD00000
|
||||
#define IPRA 0xFFD00004
|
||||
#define IPRB 0xFFD00008
|
||||
#define IPRC 0xFFD0000C
|
||||
#define IPRD 0xFFD00010
|
||||
#define INTPRI 0xFE080000
|
||||
#define INTREQ 0xFE080020
|
||||
#define INTMSK 0xFE080040
|
||||
#define INTMSKCL 0xFE080060
|
||||
|
||||
/* CPG */
|
||||
#define CLKSTP 0xFE0A0000
|
||||
#define CLKSTPCLR 0xFE0A0008
|
||||
#define TSTR2 0xFE100004
|
||||
#define TCOR3 0xFE100008
|
||||
#define TCNT3 0xFE10000C
|
||||
#define TCR3 0xFE100010
|
||||
#define TCOR4 0xFE100014
|
||||
#define TCNT4 0xFE100018
|
||||
#define TCR4 0xFE10001C
|
||||
#define TOCR 0xFFD80000
|
||||
#define TSTR0 0xFFD80004
|
||||
#define TCOR0 0xFFD80008
|
||||
#define TCNT0 0xFFD8000C
|
||||
#define TCR0 0xFFD80010
|
||||
#define TCOR1 0xFFD80014
|
||||
#define TCNT1 0xFFD80018
|
||||
#define TCR1 0xFFD8001C
|
||||
#define TCOR2 0xFFD80020
|
||||
#define TCNT2 0xFFD80024
|
||||
#define TCR2 0xFFD80028
|
||||
|
||||
/* TMU */
|
||||
#define TSTR2 0xFE100004
|
||||
#define TCOR3 0xFE100008
|
||||
#define TCNT3 0xFE10000C
|
||||
#define TCR3 0xFE100010
|
||||
#define TCOR4 0xFE100014
|
||||
#define TCNT4 0xFE100018
|
||||
#define TCR4 0xFE10001C
|
||||
#define TOCR 0xFFD80000
|
||||
#define TSTR0 0xFFD80004
|
||||
#define TCOR0 0xFFD80008
|
||||
#define TCNT0 0xFFD8000C
|
||||
#define TCR0 0xFFD80010
|
||||
#define TCOR1 0xFFD80014
|
||||
#define TCNT1 0xFFD80018
|
||||
#define TCR1 0xFFD8001C
|
||||
#define TCOR2 0xFFD80020
|
||||
#define TCNT2 0xFFD80024
|
||||
#define TCR2 0xFFD80028
|
||||
#define TCPR2 0xFFD8002C
|
||||
#define SCSMR1 0xFFE00000
|
||||
#define SCBRR1 0xFFE00004
|
||||
#define SCSCR1 0xFFE00008
|
||||
#define SCTDR1 0xFFE0000C
|
||||
#define SCSSR1 0xFFE00010
|
||||
#define SCRDR1 0xFFE00014
|
||||
#define SCSCMR1 0xFFE00018
|
||||
#define SCSPTR1 0xFFE0001C
|
||||
#define TSTR TSTR0
|
||||
|
||||
/* SCI */
|
||||
#define SCSMR1 0xFFE00000
|
||||
#define SCBRR1 0xFFE00004
|
||||
#define SCSCR1 0xFFE00008
|
||||
#define SCTDR1 0xFFE0000C
|
||||
#define SCSSR1 0xFFE00010
|
||||
#define SCRDR1 0xFFE00014
|
||||
#define SCSCMR1 0xFFE00018
|
||||
#define SCSPTR1 0xFFE0001C
|
||||
#define SCF0_BASE SCSMR1
|
||||
|
||||
/* SCIF */
|
||||
#define SCSMR2 0xFFE80000
|
||||
#define SCBRR2 0xFFE80004
|
||||
#define SCSCR2 0xFFE80008
|
||||
#define SCFTDR2 0xFFE8000C
|
||||
#define SCFSR2 0xFFE80010
|
||||
#define SCFRDR2 0xFFE80014
|
||||
#define SCFCR2 0xFFE80018
|
||||
#define SCFDR2 0xFFE8001C
|
||||
#define SCSPTR2 0xFFE80020
|
||||
#define SCLSR2 0xFFE80024
|
||||
#define SCBRR2 0xFFE80004
|
||||
#define SCSCR2 0xFFE80008
|
||||
#define SCFTDR2 0xFFE8000C
|
||||
#define SCFSR2 0xFFE80010
|
||||
#define SCFRDR2 0xFFE80014
|
||||
#define SCFCR2 0xFFE80018
|
||||
#define SCFDR2 0xFFE8001C
|
||||
#define SCSPTR2 0xFFE80020
|
||||
#define SCLSR2 0xFFE80024
|
||||
#define SCIF1_BASE SCSMR2
|
||||
#define SDIR 0xFFF00000
|
||||
#define SDDR 0xFFF00008
|
||||
#define SDINT 0xFFF00014
|
||||
|
||||
/* H-UDI */
|
||||
#define SDIR 0xFFF00000
|
||||
#define SDDR 0xFFF00008
|
||||
#define SDINT 0xFFF00014
|
||||
|
||||
#endif /* _ASM_CPU_SH7750_H_ */
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,156 @@
|
|||
/*
|
||||
* U-boot - errno.h Error number defines
|
||||
*
|
||||
* Copyright (c) 2005-2007 Analog Devices Inc.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef _BLACKFIN_ERRNO_H
|
||||
#define _BLACKFIN_ERRNO_H
|
||||
|
||||
#define EPERM 1 /* Operation not permitted */
|
||||
#define ENOENT 2 /* No such file or directory */
|
||||
#define ESRCH 3 /* No such process */
|
||||
#define EINTR 4 /* Interrupted system call */
|
||||
#define EIO 5 /* I/O error */
|
||||
#define ENXIO 6 /* No such device or address */
|
||||
#define E2BIG 7 /* Arg list too long */
|
||||
#define ENOEXEC 8 /* Exec format error */
|
||||
#define EBADF 9 /* Bad file number */
|
||||
#define ECHILD 10 /* No child processes */
|
||||
#define EAGAIN 11 /* Try again */
|
||||
#define ENOMEM 12 /* Out of memory */
|
||||
#define EACCES 13 /* Permission denied */
|
||||
#define EFAULT 14 /* Bad address */
|
||||
#define ENOTBLK 15 /* Block device required */
|
||||
#define EBUSY 16 /* Device or resource busy */
|
||||
#define EEXIST 17 /* File exists */
|
||||
#define EXDEV 18 /* Cross-device link */
|
||||
#define ENODEV 19 /* No such device */
|
||||
#define ENOTDIR 20 /* Not a directory */
|
||||
#define EISDIR 21 /* Is a directory */
|
||||
#define EINVAL 22 /* Invalid argument */
|
||||
#define ENFILE 23 /* File table overflow */
|
||||
#define EMFILE 24 /* Too many open files */
|
||||
#define ENOTTY 25 /* Not a typewriter */
|
||||
#define ETXTBSY 26 /* Text file busy */
|
||||
#define EFBIG 27 /* File too large */
|
||||
#define ENOSPC 28 /* No space left on device */
|
||||
#define ESPIPE 29 /* Illegal seek */
|
||||
#define EROFS 30 /* Read-only file system */
|
||||
#define EMLINK 31 /* Too many links */
|
||||
#define EPIPE 32 /* Broken pipe */
|
||||
#define EDOM 33 /* Math argument out of domain of func */
|
||||
#define ERANGE 34 /* Math result not representable */
|
||||
#define EDEADLK 35 /* Resource deadlock would occur */
|
||||
#define ENAMETOOLONG 36 /* File name too long */
|
||||
#define ENOLCK 37 /* No record locks available */
|
||||
#define ENOSYS 38 /* Function not implemented */
|
||||
#define ENOTEMPTY 39 /* Directory not empty */
|
||||
#define ELOOP 40 /* Too many symbolic links encountered */
|
||||
#define EWOULDBLOCK EAGAIN /* Operation would block */
|
||||
#define ENOMSG 42 /* No message of desired type */
|
||||
#define EIDRM 43 /* Identifier removed */
|
||||
#define ECHRNG 44 /* Channel number out of range */
|
||||
#define EL2NSYNC 45 /* Level 2 not synchronized */
|
||||
#define EL3HLT 46 /* Level 3 halted */
|
||||
#define EL3RST 47 /* Level 3 reset */
|
||||
#define ELNRNG 48 /* Link number out of range */
|
||||
#define EUNATCH 49 /* Protocol driver not attached */
|
||||
#define ENOCSI 50 /* No CSI structure available */
|
||||
#define EL2HLT 51 /* Level 2 halted */
|
||||
#define EBADE 52 /* Invalid exchange */
|
||||
#define EBADR 53 /* Invalid request descriptor */
|
||||
#define EXFULL 54 /* Exchange full */
|
||||
#define ENOANO 55 /* No anode */
|
||||
#define EBADRQC 56 /* Invalid request code */
|
||||
#define EBADSLT 57 /* Invalid slot */
|
||||
|
||||
#define EDEADLOCK EDEADLK
|
||||
|
||||
#define EBFONT 59 /* Bad font file format */
|
||||
#define ENOSTR 60 /* Device not a stream */
|
||||
#define ENODATA 61 /* No data available */
|
||||
#define ETIME 62 /* Timer expired */
|
||||
#define ENOSR 63 /* Out of streams resources */
|
||||
#define ENONET 64 /* Machine is not on the network */
|
||||
#define ENOPKG 65 /* Package not installed */
|
||||
#define EREMOTE 66 /* Object is remote */
|
||||
#define ENOLINK 67 /* Link has been severed */
|
||||
#define EADV 68 /* Advertise error */
|
||||
#define ESRMNT 69 /* Srmount error */
|
||||
#define ECOMM 70 /* Communication error on send */
|
||||
#define EPROTO 71 /* Protocol error */
|
||||
#define EMULTIHOP 72 /* Multihop attempted */
|
||||
#define EDOTDOT 73 /* RFS specific error */
|
||||
#define EBADMSG 74 /* Not a data message */
|
||||
#define EOVERFLOW 75 /* Value too large for defined data type */
|
||||
#define ENOTUNIQ 76 /* Name not unique on network */
|
||||
#define EBADFD 77 /* File descriptor in bad state */
|
||||
#define EREMCHG 78 /* Remote address changed */
|
||||
#define ELIBACC 79 /* Can not access a needed shared library */
|
||||
#define ELIBBAD 80 /* Accessing a corrupted shared library */
|
||||
#define ELIBSCN 81 /* .lib section in a.out corrupted */
|
||||
#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
|
||||
#define ELIBEXEC 83 /* Cannot exec a shared library directly */
|
||||
#define EILSEQ 84 /* Illegal byte sequence */
|
||||
#define ERESTART 85 /* Interrupted system call should be restarted */
|
||||
#define ESTRPIPE 86 /* Streams pipe error */
|
||||
#define EUSERS 87 /* Too many users */
|
||||
#define ENOTSOCK 88 /* Socket operation on non-socket */
|
||||
#define EDESTADDRREQ 89 /* Destination address required */
|
||||
#define EMSGSIZE 90 /* Message too long */
|
||||
#define EPROTOTYPE 91 /* Protocol wrong type for socket */
|
||||
#define ENOPROTOOPT 92 /* Protocol not available */
|
||||
#define EPROTONOSUPPORT 93 /* Protocol not supported */
|
||||
#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
|
||||
#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
|
||||
#define EPFNOSUPPORT 96 /* Protocol family not supported */
|
||||
#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
|
||||
#define EADDRINUSE 98 /* Address already in use */
|
||||
#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
|
||||
#define ENETDOWN 100 /* Network is down */
|
||||
#define ENETUNREACH 101 /* Network is unreachable */
|
||||
#define ENETRESET 102 /* Network dropped connection because of reset */
|
||||
#define ECONNABORTED 103 /* Software caused connection abort */
|
||||
#define ECONNRESET 104 /* Connection reset by peer */
|
||||
#define ENOBUFS 105 /* No buffer space available */
|
||||
#define EISCONN 106 /* Transport endpoint is already connected */
|
||||
#define ENOTCONN 107 /* Transport endpoint is not connected */
|
||||
#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
|
||||
#define ETOOMANYREFS 109 /* Too many references: cannot splice */
|
||||
#define ETIMEDOUT 110 /* Connection timed out */
|
||||
#define ECONNREFUSED 111 /* Connection refused */
|
||||
#define EHOSTDOWN 112 /* Host is down */
|
||||
#define EHOSTUNREACH 113 /* No route to host */
|
||||
#define EALREADY 114 /* Operation already in progress */
|
||||
#define EINPROGRESS 115 /* Operation now in progress */
|
||||
#define ESTALE 116 /* Stale NFS file handle */
|
||||
#define EUCLEAN 117 /* Structure needs cleaning */
|
||||
#define ENOTNAM 118 /* Not a XENIX named type file */
|
||||
#define ENAVAIL 119 /* No XENIX semaphores available */
|
||||
#define EISNAM 120 /* Is a named type file */
|
||||
#define EREMOTEIO 121 /* Remote I/O error */
|
||||
#define EDQUOT 122 /* Quota exceeded */
|
||||
|
||||
#define ENOMEDIUM 123 /* No medium found */
|
||||
#define EMEDIUMTYPE 124 /* Wrong medium type */
|
||||
|
||||
#endif
|
||||
|
|
@ -91,23 +91,21 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
|
|||
*
|
||||
* The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
|
||||
*/
|
||||
#ifdef __io
|
||||
#define outb(v,p) __raw_writeb(v,__io(p))
|
||||
#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
|
||||
#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
|
||||
#define outb(v,p) __raw_writeb(v, p)
|
||||
#define outw(v,p) __raw_writew(cpu_to_le16(v),p)
|
||||
#define outl(v,p) __raw_writel(cpu_to_le32(v),p)
|
||||
|
||||
#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
|
||||
#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
|
||||
#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
|
||||
#define inb(p) ({ unsigned int __v = __raw_readb(p); __v; })
|
||||
#define inw(p) ({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; })
|
||||
#define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; })
|
||||
|
||||
#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
|
||||
#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
|
||||
#define outsl(p,d,l) __raw_writesl(__io(p),d,l)
|
||||
#define outsb(p,d,l) __raw_writesb(p,d,l)
|
||||
#define outsw(p,d,l) __raw_writesw(p,d,l)
|
||||
#define outsl(p,d,l) __raw_writesl(p,d,l)
|
||||
|
||||
#define insb(p,d,l) __raw_readsb(__io(p),d,l)
|
||||
#define insw(p,d,l) __raw_readsw(__io(p),d,l)
|
||||
#define insl(p,d,l) __raw_readsl(__io(p),d,l)
|
||||
#endif
|
||||
#define insb(p,d,l) __raw_readsb(p,d,l)
|
||||
#define insw(p,d,l) __raw_readsw(p,d,l)
|
||||
#define insl(p,d,l) __raw_readsl(p,d,l)
|
||||
|
||||
#define outb_p(val,port) outb((val),(port))
|
||||
#define outw_p(val,port) outw((val),(port))
|
||||
|
|
@ -174,8 +172,6 @@ extern void _memcpy_fromio(void *, unsigned long, size_t);
|
|||
extern void _memcpy_toio(unsigned long, const void *, size_t);
|
||||
extern void _memset_io(unsigned long, int, size_t);
|
||||
|
||||
extern void __readwrite_bug(const char *fn);
|
||||
|
||||
/*
|
||||
* If this architecture has PCI memory IO, then define the read/write
|
||||
* macros. These should only be used with the cookie passed from
|
||||
|
|
@ -217,76 +213,19 @@ out:
|
|||
|
||||
#elif !defined(readb)
|
||||
|
||||
#define readb(addr) (__readwrite_bug("readb"),0)
|
||||
#define readw(addr) (__readwrite_bug("readw"),0)
|
||||
#define readl(addr) (__readwrite_bug("readl"),0)
|
||||
#define writeb(v,addr) __readwrite_bug("writeb")
|
||||
#define writew(v,addr) __readwrite_bug("writew")
|
||||
#define writel(v,addr) __readwrite_bug("writel")
|
||||
|
||||
#define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum")
|
||||
#define readb(addr) __raw_readb(addr)
|
||||
#define readw(addr) __raw_readw(addr)
|
||||
#define readl(addr) __raw_readl(addr)
|
||||
#define writeb(v,addr) __raw_writeb(v, addr)
|
||||
#define writew(v,addr) __raw_writew(v, addr)
|
||||
#define writel(v,addr) __raw_writel(v, addr)
|
||||
|
||||
#define check_signature(io,sig,len) (0)
|
||||
|
||||
#endif /* __mem_pci */
|
||||
|
||||
/*
|
||||
* If this architecture has ISA IO, then define the isa_read/isa_write
|
||||
* macros.
|
||||
*/
|
||||
#ifdef __mem_isa
|
||||
|
||||
#define isa_readb(addr) __raw_readb(__mem_isa(addr))
|
||||
#define isa_readw(addr) __raw_readw(__mem_isa(addr))
|
||||
#define isa_readl(addr) __raw_readl(__mem_isa(addr))
|
||||
#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
|
||||
#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
|
||||
#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
|
||||
#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
|
||||
#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
|
||||
#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
|
||||
|
||||
#define isa_eth_io_copy_and_sum(a,b,c,d) \
|
||||
eth_copy_and_sum((a),__mem_isa(b),(c),(d))
|
||||
|
||||
static inline int
|
||||
isa_check_signature(unsigned long io_addr, const unsigned char *signature,
|
||||
int length)
|
||||
{
|
||||
int retval = 0;
|
||||
do {
|
||||
if (isa_readb(io_addr) != *signature)
|
||||
goto out;
|
||||
io_addr++;
|
||||
signature++;
|
||||
length--;
|
||||
} while (length);
|
||||
retval = 1;
|
||||
out:
|
||||
return retval;
|
||||
}
|
||||
|
||||
#else /* __mem_isa */
|
||||
|
||||
#define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
|
||||
#define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
|
||||
#define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
|
||||
#define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
|
||||
#define isa_writew(val,addr) __readwrite_bug("isa_writew")
|
||||
#define isa_writel(val,addr) __readwrite_bug("isa_writel")
|
||||
#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
|
||||
#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
|
||||
#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
|
||||
|
||||
#define isa_eth_io_copy_and_sum(a,b,c,d) \
|
||||
__readwrite_bug("isa_eth_io_copy_and_sum")
|
||||
|
||||
#define isa_check_signature(io,sig,len) (0)
|
||||
|
||||
static inline void sync(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* __mem_isa */
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_SH_IO_H */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,126 @@
|
|||
#ifndef __ASM_SH_IRQFLAGS_H
|
||||
#define __ASM_SH_IRQFLAGS_H
|
||||
|
||||
static inline void raw_local_irq_enable(void)
|
||||
{
|
||||
unsigned long __dummy0, __dummy1;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"stc sr, %0\n\t"
|
||||
"and %1, %0\n\t"
|
||||
#ifdef CONFIG_CPU_HAS_SR_RB
|
||||
"stc r6_bank, %1\n\t"
|
||||
"or %1, %0\n\t"
|
||||
#endif
|
||||
"ldc %0, sr\n\t"
|
||||
: "=&r" (__dummy0), "=r" (__dummy1)
|
||||
: "1" (~0x000000f0)
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
static inline void raw_local_irq_disable(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"stc sr, %0\n\t"
|
||||
"or #0xf0, %0\n\t"
|
||||
"ldc %0, sr\n\t"
|
||||
: "=&z" (flags)
|
||||
: /* no inputs */
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
static inline void set_bl_bit(void)
|
||||
{
|
||||
unsigned long __dummy0, __dummy1;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"stc sr, %0\n\t"
|
||||
"or %2, %0\n\t"
|
||||
"and %3, %0\n\t"
|
||||
"ldc %0, sr\n\t"
|
||||
: "=&r" (__dummy0), "=r" (__dummy1)
|
||||
: "r" (0x10000000), "r" (0xffffff0f)
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
static inline void clear_bl_bit(void)
|
||||
{
|
||||
unsigned long __dummy0, __dummy1;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"stc sr, %0\n\t"
|
||||
"and %2, %0\n\t"
|
||||
"ldc %0, sr\n\t"
|
||||
: "=&r" (__dummy0), "=r" (__dummy1)
|
||||
: "1" (~0x10000000)
|
||||
: "memory"
|
||||
);
|
||||
}
|
||||
|
||||
static inline unsigned long __raw_local_save_flags(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"stc sr, %0\n\t"
|
||||
"and #0xf0, %0\n\t"
|
||||
: "=&z" (flags)
|
||||
: /* no inputs */
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return flags;
|
||||
}
|
||||
|
||||
#define raw_local_save_flags(flags) \
|
||||
do { (flags) = __raw_local_save_flags(); } while (0)
|
||||
|
||||
static inline int raw_irqs_disabled_flags(unsigned long flags)
|
||||
{
|
||||
return (flags != 0);
|
||||
}
|
||||
|
||||
static inline int raw_irqs_disabled(void)
|
||||
{
|
||||
unsigned long flags = __raw_local_save_flags();
|
||||
|
||||
return raw_irqs_disabled_flags(flags);
|
||||
}
|
||||
|
||||
static inline unsigned long __raw_local_irq_save(void)
|
||||
{
|
||||
unsigned long flags, __dummy;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"stc sr, %1\n\t"
|
||||
"mov %1, %0\n\t"
|
||||
"or #0xf0, %0\n\t"
|
||||
"ldc %0, sr\n\t"
|
||||
"mov %1, %0\n\t"
|
||||
"and #0xf0, %0\n\t"
|
||||
: "=&z" (flags), "=&r" (__dummy)
|
||||
: /* no inputs */
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return flags;
|
||||
}
|
||||
|
||||
#define raw_local_irq_save(flags) \
|
||||
do { (flags) = __raw_local_irq_save(); } while (0)
|
||||
|
||||
#define local_irq_save raw_local_irq_save
|
||||
|
||||
static inline void raw_local_irq_restore(unsigned long flags)
|
||||
{
|
||||
if ((flags & 0xf0) != 0xf0)
|
||||
raw_local_irq_enable();
|
||||
}
|
||||
#define local_irq_restore raw_local_irq_restore
|
||||
|
||||
#endif /* __ASM_SH_IRQFLAGS_H */
|
||||
|
|
@ -8,6 +8,8 @@
|
|||
* from linux kernel code.
|
||||
*/
|
||||
|
||||
#ifdef __KERNEL__ /* only set these up for kernel code */
|
||||
|
||||
#define __HAVE_ARCH_STRCPY
|
||||
static inline char *strcpy(char *__dest, const char *__src)
|
||||
{
|
||||
|
|
@ -129,4 +131,32 @@ extern size_t strlen(const char *);
|
|||
/* arch/sh/lib/strcasecmp.c */
|
||||
extern int strcasecmp(const char *, const char *);
|
||||
|
||||
#else /* KERNEL */
|
||||
|
||||
/*
|
||||
* let user libraries deal with these,
|
||||
* IMHO the kernel has no place defining these functions for user apps
|
||||
*/
|
||||
|
||||
#define __HAVE_ARCH_STRCPY 1
|
||||
#define __HAVE_ARCH_STRNCPY 1
|
||||
#define __HAVE_ARCH_STRCAT 1
|
||||
#define __HAVE_ARCH_STRNCAT 1
|
||||
#define __HAVE_ARCH_STRCMP 1
|
||||
#define __HAVE_ARCH_STRNCMP 1
|
||||
#define __HAVE_ARCH_STRNICMP 1
|
||||
#define __HAVE_ARCH_STRCHR 1
|
||||
#define __HAVE_ARCH_STRRCHR 1
|
||||
#define __HAVE_ARCH_STRSTR 1
|
||||
#define __HAVE_ARCH_STRLEN 1
|
||||
#define __HAVE_ARCH_STRNLEN 1
|
||||
#define __HAVE_ARCH_MEMSET 1
|
||||
#define __HAVE_ARCH_MEMCPY 1
|
||||
#define __HAVE_ARCH_MEMMOVE 1
|
||||
#define __HAVE_ARCH_MEMSCAN 1
|
||||
#define __HAVE_ARCH_MEMCMP 1
|
||||
#define __HAVE_ARCH_MEMCHR 1
|
||||
#define __HAVE_ARCH_STRTOK 1
|
||||
|
||||
#endif /* KERNEL */
|
||||
#endif /* __ASM_SH_STRING_H */
|
||||
|
|
|
|||
119
lib_sh/board.c
119
lib_sh/board.c
|
|
@ -65,6 +65,61 @@ void *sbrk (ptrdiff_t increment)
|
|||
return (void *) old;
|
||||
}
|
||||
|
||||
static int sh_flash_init(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
gd->bd->bi_flashsize = flash_init();
|
||||
printf("FLASH: %dMB\n", gd->bd->bi_flashsize / (1024*1024));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_CMD_NAND)
|
||||
void nand_init (void);
|
||||
static int sh_nand_init(void)
|
||||
{
|
||||
printf("NAND: ");
|
||||
nand_init(); /* go init the NAND */
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_CMD_NAND */
|
||||
|
||||
#if defined(CONFIG_CMD_IDE)
|
||||
#include <ide.h>
|
||||
static int sh_marubun_init(void)
|
||||
{
|
||||
puts ("IDE: ");
|
||||
ide_init();
|
||||
return 0;
|
||||
}
|
||||
#endif /* (CONFIG_CMD_IDE) */
|
||||
|
||||
static int sh_mem_env_init(void)
|
||||
{
|
||||
mem_malloc_init();
|
||||
malloc_bin_reloc();
|
||||
env_relocate();
|
||||
jumptable_init();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_net_init(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
char *s, *e;
|
||||
int i;
|
||||
|
||||
gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr");
|
||||
s = getenv("ethaddr");
|
||||
for (i = 0; i < 6; ++i) {
|
||||
gd->bd->bi_enetaddr[i] = s ? simple_strtoul(s, &e, 16) : 0;
|
||||
if (s) s = (*e) ? e + 1 : e;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
typedef int (init_fnc_t) (void);
|
||||
|
||||
init_fnc_t *init_sequence[] =
|
||||
|
|
@ -74,12 +129,27 @@ init_fnc_t *init_sequence[] =
|
|||
interrupt_init, /* set up exceptions */
|
||||
env_init, /* event init */
|
||||
serial_init, /* SCIF init */
|
||||
watchdog_init,
|
||||
watchdog_init, /* watchdog init */
|
||||
console_init_f,
|
||||
display_options,
|
||||
checkcpu,
|
||||
checkboard,
|
||||
checkboard, /* Check support board */
|
||||
dram_init, /* SDRAM init */
|
||||
timer_init, /* SuperH Timer (TCNT0 only) init */
|
||||
sh_flash_init, /* Flash memory(NOR) init*/
|
||||
sh_mem_env_init,
|
||||
#if defined(CONFIG_CMD_NAND)
|
||||
sh_nand_init, /* Flash memory (NAND) init */
|
||||
#endif
|
||||
devices_init,
|
||||
console_init_r,
|
||||
interrupt_init,
|
||||
#ifdef BOARD_LATE_INIT
|
||||
board_late_init,
|
||||
#endif
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
sh_net_init, /* SH specific eth init */
|
||||
#endif
|
||||
NULL /* Terminate this list */
|
||||
};
|
||||
|
||||
|
|
@ -89,14 +159,14 @@ void sh_generic_init (void)
|
|||
|
||||
bd_t *bd;
|
||||
init_fnc_t **init_fnc_ptr;
|
||||
char *s, *e;
|
||||
char *s;
|
||||
int i;
|
||||
|
||||
memset (gd, 0, CFG_GBL_DATA_SIZE);
|
||||
|
||||
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
|
||||
|
||||
gd->bd = (bd_t *) (gd + 1); /* At end of global data */
|
||||
gd->bd = (bd_t *) (gd + 1); /* At end of global data */
|
||||
gd->baudrate = CONFIG_BAUDRATE;
|
||||
|
||||
gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
|
||||
|
|
@ -111,53 +181,30 @@ void sh_generic_init (void)
|
|||
#endif
|
||||
bd->bi_baudrate = CONFIG_BAUDRATE;
|
||||
|
||||
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
|
||||
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr , i++) {
|
||||
if ((*init_fnc_ptr) () != 0) {
|
||||
hang();
|
||||
}
|
||||
}
|
||||
|
||||
timer_init();
|
||||
|
||||
/* flash_init need timer_init().(TMU) */
|
||||
bd->bi_flashsize = flash_init();
|
||||
printf("FLASH: %dMB\n", bd->bi_flashsize / (1024*1024));
|
||||
|
||||
mem_malloc_init();
|
||||
malloc_bin_reloc();
|
||||
env_relocate();
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NET)
|
||||
bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
|
||||
s = getenv ("ethaddr");
|
||||
for (i = 0; i < 6; ++i) {
|
||||
bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
|
||||
if (s) s = (*e) ? e + 1 : e;
|
||||
}
|
||||
#endif
|
||||
devices_init();
|
||||
jumptable_init();
|
||||
console_init_r();
|
||||
interrupt_init();
|
||||
#ifdef BOARD_LATE_INIT
|
||||
board_late_init ();
|
||||
#endif
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_NET)
|
||||
#if defined(CONFIG_NET_MULTI)
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
puts ("Net: ");
|
||||
#endif
|
||||
eth_initialize(gd->bd);
|
||||
#endif
|
||||
|
||||
if ((s = getenv ("bootfile")) != NULL) {
|
||||
copy_filename (BootFile, s, sizeof (BootFile));
|
||||
}
|
||||
#endif /* CONFIG_CMD_NET */
|
||||
|
||||
while (1) {
|
||||
main_loop();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/***********************************************************************/
|
||||
|
||||
void hang (void)
|
||||
{
|
||||
puts ("Board ERROR \n");
|
||||
puts ("Board ERROR\n");
|
||||
for (;;);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -69,6 +69,7 @@ void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
|
|||
/* Setup parameters */
|
||||
memset(PARAM, 0, 0x1000); /* Clear zero page */
|
||||
strcpy(COMMAND_LINE, bootargs);
|
||||
|
||||
kernel();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -73,4 +73,3 @@ unsigned long get_tbclk (void)
|
|||
{
|
||||
return CFG_HZ;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,24 @@
|
|||
#
|
||||
# (C) Copyright 2000-2002
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__
|
||||
Loading…
Reference in New Issue