cpuat91: convert to new at91 soc architecture

convert the board to the new soc architecture
update default config
i2c upgrade taken from eb_cpux9k2.h & board/BuS/eb_cpux9k2/cpux9k2.c

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
This commit is contained in:
Eric Bénard 2010-08-09 11:50:45 +02:00 committed by Reinhard Meyer
parent 64037fb453
commit af4b8b4bdb
3 changed files with 54 additions and 46 deletions

View File

@ -1883,7 +1883,7 @@ CPUAT91_RAM_config \
CPUAT91_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200
@$(MKCONFIG) -n $@ -a cpuat91 arm arm920t cpuat91 eukrea at91
#########################################################################
## ARM926EJ-S Systems

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@ -1,5 +1,5 @@
/*
* (C) Copyright 2006 Eukrea Electromatique <www.eukrea.com>
* (C) Copyright 2006-2010 Eukrea Electromatique <www.eukrea.com>
* Eric Benard <eric@eukrea.com>
* based on at91rm9200dk.c which is :
* (C) Copyright 2002
@ -27,13 +27,11 @@
#include <common.h>
#include <netdev.h>
#include <asm/arch/AT91RM9200.h>
#include <asm/io.h>
#if defined(CONFIG_DRIVER_ETHER)
#include <at91rm9200_net.h>
#include <ks8721.h>
#endif
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/at91_pmc.h>
DECLARE_GLOBAL_DATA_PTR;
@ -61,31 +59,7 @@ int dram_init(void)
return 0;
}
#if defined(CONFIG_DRIVER_ETHER)
#if defined(CONFIG_CMD_NET)
/*
* Name:
* at91rm9200_GetPhyInterface
* Description:
* Initialise the interface functions to the PHY
* Arguments:
* None
* Return value:
* None
*/
void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
{
p_phyops->Init = ks8721_initphy;
p_phyops->IsPhyConnected = ks8721_isphyconnected;
p_phyops->GetLinkSpeed = ks8721_getlinkspeed;
p_phyops->AutoNegotiate = ks8721_autonegotiate;
}
#endif /* CONFIG_CMD_NET */
#endif /* CONFIG_DRIVER_ETHER */
#ifdef CONFIG_DRIVER_AT91EMAC
int board_eth_init(bd_t *bis)
{
int rc = 0;
@ -93,3 +67,20 @@ int board_eth_init(bd_t *bis)
return rc;
}
#endif
#ifdef CONFIG_SOFT_I2C
void i2c_init_board(void)
{
u32 pin;
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
writel(1 << AT91_ID_PIOA, &pmc->pcer);
pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
writel(pin, &pio->pioa.idr);
writel(pin, &pio->pioa.pudr);
writel(pin, &pio->pioa.per);
writel(pin, &pio->pioa.oer);
writel(pin, &pio->pioa.sodr);
}
#endif

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@ -1,5 +1,5 @@
/*
* CPUAT91 by (C) Copyright 2006 Eric Benard
* CPUAT91 by (C) Copyright 2006-2010 Eric Benard
* eric@eukrea.com
*
* Configuration settings for the CPUAT91 board.
@ -23,15 +23,12 @@
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_AT91_LEGACY
#ifndef _CONFIG_CPUAT91_H
#define _CONFIG_CPUAT91_H
#ifdef CONFIG_CPUAT91_RAM
#define CONFIG_SKIP_LOWLEVEL_INIT 1
#define CONFIG_SKIP_RELOCATE_UBOOT 1
#define CONFIG_CPUAT91 1
#else
#define CONFIG_BOOTDELAY 1
#endif
@ -43,6 +40,7 @@
#define CONFIG_ARM920T 1
#define CONFIG_AT91RM9200 1
#define CONFIG_CPUAT91 1
#undef CONFIG_USE_IRQ
#define USE_920T_MMU 1
@ -89,16 +87,36 @@
#undef CONFIG_USART0
#undef CONFIG_USART1
#define CONFIG_HARD_I2C 1
#undef CONFIG_HARD_I2C
#define CONFIG_SOFT_I2C 1
#define AT91_PIN_SDA (1<<25)
#define AT91_PIN_SCL (1<<26)
#define CONFIG_SYS_I2C_INIT_BOARD 1
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0
#define I2C_INIT i2c_init_board();
#define I2C_ACTIVE writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
#define I2C_TRISTATE writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
#define I2C_READ ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0)
#define I2C_SDA(bit) \
if (bit) \
writel(AT91_PMX_AA_TWD, &pio->pioa.sodr); \
else \
writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
#define I2C_SCL(bit) \
if (bit) \
writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr); \
else \
writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED)
#if defined(CONFIG_HARD_I2C)
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_I2C_SLAVE 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
#endif
#define CONFIG_BOOTP_BOOTFILESIZE 1
#define CONFIG_BOOTP_BOOTPATH 1
@ -117,10 +135,8 @@
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_NFS
#if defined(CONFIG_HARD_I2C)
#define CONFIG_CMD_EEPROM 1
#define CONFIG_CMD_I2C 1
#endif
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
@ -148,6 +164,7 @@
#define PHYS_FLASH_1 0x10000000
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_MAX_FLASH_SECT 128
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#if defined(CONFIG_CMD_USB)
#define CONFIG_USB_OHCI_NEW 1
@ -230,4 +247,4 @@
"flashboot=run ramargs;bootm 10040000\0" \
"netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \
"bootm 21000000\0"
#endif /* __CONFIG_H */
#endif /* _CONFIG_CPUAT91_H */