nios2: remove EP1C20, EP1S10, EP1S40 boards
The example configuration files of nios2-generic board can generated binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three boards can be removed. With nios2-generic approach, the fpga parameter header file can be generated from hardware designs using tools. Porting u-boot for nios2 boards is simplified. Vendors can supply their fpga parameter file or patches to add a new nios2-generic board instance. There is no need to include other boards support for nios2 in the u-boot mainline. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This commit is contained in:
Thomas Chou
Scott McNutt
parent
551265f0df
commit
a3c09f66b2
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@ -869,9 +869,6 @@ Scott McNutt <smcnutt@psyent.com>
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PCI5441 Nios-II
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PK1C20 Nios-II
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EP1C20 Nios-II
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EP1S10 Nios-II
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EP1S40 Nios-II
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nios2-generic Nios-II
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#########################################################################
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3
MAKEALL
3
MAKEALL
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@ -824,9 +824,6 @@ LIST_x86=" \
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#########################################################################
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LIST_nios2=" \
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EP1C20 \
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EP1S10 \
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EP1S40 \
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PCI5441 \
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PK1C20 \
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nios2-generic \
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@ -1,55 +0,0 @@
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#
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# (C) Copyright 2001-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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||||
# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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ifneq ($(OBJTREE),$(SRCTREE))
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$(shell mkdir -p $(obj)../common)
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endif
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LIB = $(obj)lib$(BOARD).a
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COMOBJS := ../common/AMDLV065D.o ../common/epled.o
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COBJS := $(BOARD).o $(COMOBJS)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,31 +0,0 @@
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#
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# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
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# Scott McNutt <smcnutt@psyent.com>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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TEXT_BASE = 0x01fc0000
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PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
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PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
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ifeq ($(debug),1)
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PLATFORM_CPPFLAGS += -DDEBUG
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endif
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@ -1,52 +0,0 @@
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/*
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* (C) Copyright 2005, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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int board_early_init_f (void)
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{
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return 0;
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}
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int checkboard (void)
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{
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puts ("BOARD : Altera EP-1C20\n");
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return 0;
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}
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phys_size_t initdram (int board_type)
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{
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return (0);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -1,55 +0,0 @@
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#
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# (C) Copyright 2001-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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||||
# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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ifneq ($(OBJTREE),$(SRCTREE))
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$(shell mkdir -p $(obj)../common)
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endif
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LIB = $(obj)lib$(BOARD).a
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COMOBJS := ../common/AMDLV065D.o ../common/epled.o
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COBJS := $(BOARD).o $(COMOBJS)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,31 +0,0 @@
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#
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# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
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# Scott McNutt <smcnutt@psyent.com>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
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||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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TEXT_BASE = 0x01fc0000
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PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
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PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
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ifeq ($(debug),1)
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PLATFORM_CPPFLAGS += -DDEBUG
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endif
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@ -1,52 +0,0 @@
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/*
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* (C) Copyright 2005, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
|
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
|
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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int board_early_init_f (void)
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{
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return 0;
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}
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int checkboard (void)
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{
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puts ("BOARD : Altera EP-1S10\n");
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return 0;
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}
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phys_size_t initdram (int board_type)
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{
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return (0);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -1,55 +0,0 @@
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#
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# (C) Copyright 2001-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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ifneq ($(OBJTREE),$(SRCTREE))
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$(shell mkdir -p $(obj)../common)
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endif
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LIB = $(obj)lib$(BOARD).a
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COMOBJS := ../common/AMDLV065D.o ../common/epled.o
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COBJS := $(BOARD).o $(COMOBJS)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,31 +0,0 @@
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#
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# (C) Copyright 2005, Psyent Corporation <www.psyent.com>
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# Scott McNutt <smcnutt@psyent.com>
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#
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# See file CREDITS for list of people who contributed to this
|
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# project.
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#
|
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# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
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||||
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TEXT_BASE = 0x01fc0000
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PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul
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PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include
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|
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ifeq ($(debug),1)
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PLATFORM_CPPFLAGS += -DDEBUG
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endif
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@ -1,47 +0,0 @@
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/*
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* (C) Copyright 2005, Psyent Corporation <www.psyent.com>
|
||||
* Scott McNutt <smcnutt@psyent.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
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#include <common.h>
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#include <netdev.h>
|
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|
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int checkboard (void)
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{
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puts ("BOARD : Altera EP-1S40\n");
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return 0;
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||||
}
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||||
|
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phys_size_t initdram (int board_type)
|
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{
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return (0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
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int board_eth_init(bd_t *bis)
|
||||
{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -75,9 +75,6 @@ M5272C3 m68k mcf52x2 m5272c3 freescale
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EP2500 m68k mcf52x2 ep2500 Mercury
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purple mips mips
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tb0229 mips mips
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EP1C20 nios2 nios2 ep1c20 altera
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EP1S10 nios2 nios2 ep1s10 altera
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EP1S40 nios2 nios2 ep1s40 altera
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PCI5441 nios2 nios2 pci5441 psyent
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PK1C20 nios2 nios2 pk1c20 psyent
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P3G4 powerpc 74xx_7xx evb64260
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|
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@ -1,214 +0,0 @@
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/*
|
||||
* (C) Copyright 2005, Psyent Corporation <www.psyent.com>
|
||||
* Scott McNutt <smcnutt@psyent.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
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#define __CONFIG_H
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* BOARD/CPU
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_EP1C20 1 /* EP1C20 board */
|
||||
#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
|
||||
|
||||
#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */
|
||||
#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
|
||||
#define CONFIG_SYS_NIOS_SYSID_BASE 0x021208b8 /* System id address */
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* CACHE -- the following will support II/s and II/f. The II/s does not
|
||||
* have dcache, so the cache instructions will behave as NOPs.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */
|
||||
#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */
|
||||
#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
|
||||
#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MEMORY BASE ADDRESSES
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */
|
||||
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */
|
||||
#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */
|
||||
#define CONFIG_SYS_SRAM_BASE 0x02000000 /* SRAM base addr */
|
||||
#define CONFIG_SYS_SRAM_SIZE 0x00100000 /* 1 MB (only 1M mapped)*/
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MEMORY ORGANIZATION
|
||||
* -Monitor at top.
|
||||
* -The heap is placed below the monitor.
|
||||
* -Global data is placed below the heap.
|
||||
* -The stack is placed below global data (&grows down).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 128k */
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
|
||||
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* FLASH (AM29LV065D)
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
|
||||
#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
|
||||
* CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
|
||||
* reset address, no? This will keep the environment in user region
|
||||
* of flash. NOTE: the monitor length must be multiple of sector size
|
||||
* (which is common practice).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
|
||||
#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
|
||||
#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_RESET_ADDR + CONFIG_SYS_MONITOR_LEN)
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* CONSOLE
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_ALTERA_UART 1 /* Use altera uart */
|
||||
#if defined(CONFIG_ALTERA_JTAG_UART)
|
||||
#define CONFIG_SYS_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
|
||||
#else
|
||||
#define CONFIG_SYS_NIOS_CONSOLE 0x02120840 /* UART base addr */
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
|
||||
#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
|
||||
|
||||
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* EPCS Device -- wne CONFIG_SYS_NIOS_EPCSBASE is defined code/commands for
|
||||
* epcs device access is enabled. The base address is the epcs
|
||||
* _register_ base address, NOT THE ADDRESS OF THE MEMORY BLOCK.
|
||||
* The register base is currently at offset 0x600 from the memory base.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_NIOS_EPCSBASE 0x02100200 /* EPCS register base */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* DEBUG
|
||||
*----------------------------------------------------------------------*/
|
||||
#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* TIMEBASE --
|
||||
*
|
||||
* The high res timer defaults to 1 msec. Since it includes the period
|
||||
* registers, the interrupt frequency can be reduced using TMRCNT.
|
||||
* If the default period is acceptable, TMRCNT can be left undefined.
|
||||
* TMRMS represents the desired mecs per tick (msecs per interrupt).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_HZ 1000 /* Always 1000 */
|
||||
#define CONFIG_SYS_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
|
||||
#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
|
||||
#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/
|
||||
#define CONFIG_SYS_NIOS_TMRCNT \
|
||||
(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* STATUS LED -- Provides a simple blinking led. For Nios2 each board
|
||||
* must implement its own led routines -- leds are, after all,
|
||||
* board-specific, no?
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
|
||||
#define CONFIG_STATUS_LED /* Enable status driver */
|
||||
|
||||
#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
|
||||
#define STATUS_LED_STATE 1 /* Blinking */
|
||||
#define STATUS_LED_PERIOD (500/CONFIG_SYS_NIOS_TMRMS) /* Every 500 msec */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
|
||||
* and really doesn't need any additional clutter. So I choose the lazy
|
||||
* way out to avoid changes there -- define the base address to ensure
|
||||
* cache bypass so there's no need to monkey with inx/outx macros.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111 */
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
|
||||
|
||||
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
|
||||
#define CONFIG_NETMASK 255.255.255.0
|
||||
#define CONFIG_IPADDR 192.168.2.21
|
||||
#define CONFIG_SERVERIP 192.168.2.16
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_IRQ
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_SAVES
|
||||
|
||||
#undef CONFIG_CMD_BOOTD
|
||||
#undef CONFIG_CMD_CONSOLE
|
||||
#undef CONFIG_CMD_FPGA
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#undef CONFIG_CMD_ITEST
|
||||
#undef CONFIG_CMD_NFS
|
||||
#undef CONFIG_CMD_SETGETDCR
|
||||
#undef CONFIG_CMD_SOURCE
|
||||
#undef CONFIG_CMD_XIMG
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MISC
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_LONGHELP /* Provide extended help*/
|
||||
#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* Max command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */
|
||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000
|
||||
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
@ -1,207 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2005, Psyent Corporation <www.psyent.com>
|
||||
* Scott McNutt <smcnutt@psyent.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* BOARD/CPU
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_EP1S10 1 /* EP1S10 board */
|
||||
#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
|
||||
|
||||
#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */
|
||||
#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
|
||||
#define CONFIG_SYS_NIOS_SYSID_BASE 0x021208b8 /* System id address */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* CACHE -- the following will support II/s and II/f. The II/s does not
|
||||
* have dcache, so the cache instructions will behave as NOPs.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */
|
||||
#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */
|
||||
#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
|
||||
#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MEMORY BASE ADDRESSES
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */
|
||||
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */
|
||||
#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */
|
||||
#define CONFIG_SYS_SRAM_BASE 0x02000000 /* SRAM base addr */
|
||||
#define CONFIG_SYS_SRAM_SIZE 0x00100000 /* 1 MB */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MEMORY ORGANIZATION
|
||||
* -Monitor at top.
|
||||
* -The heap is placed below the monitor.
|
||||
* -Global data is placed below the heap.
|
||||
* -The stack is placed below global data (&grows down).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) /* 256k heap */
|
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
|
||||
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* FLASH (AM29LV065D)
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
|
||||
* CONFIG_SYS_FLASH_BASE, since we assume that u-boot is stored at the bottom
|
||||
* of flash memory. This will keep the environment in user region
|
||||
* of flash. NOTE: the monitor length must be multiple of sector size
|
||||
* (which is common practice).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
|
||||
#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
|
||||
#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* CONSOLE
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_ALTERA_UART 1 /* Use altera uart */
|
||||
#if defined(CONFIG_ALTERA_JTAG_UART)
|
||||
#define CONFIG_SYS_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
|
||||
#else
|
||||
#define CONFIG_SYS_NIOS_CONSOLE 0x02120840 /* UART base addr */
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
|
||||
#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
|
||||
|
||||
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* EPCS Device -- None for stratix.
|
||||
*----------------------------------------------------------------------*/
|
||||
#undef CONFIG_SYS_NIOS_EPCSBASE
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* DEBUG
|
||||
*----------------------------------------------------------------------*/
|
||||
#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* TIMEBASE --
|
||||
*
|
||||
* The high res timer defaults to 1 msec. Since it includes the period
|
||||
* registers, the interrupt frequency can be reduced using TMRCNT.
|
||||
* If the default period is acceptable, TMRCNT can be left undefined.
|
||||
* TMRMS represents the desired mecs per tick (msecs per interrupt).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_HZ 1000 /* Always 1000 */
|
||||
#define CONFIG_SYS_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
|
||||
#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
|
||||
#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/
|
||||
#define CONFIG_SYS_NIOS_TMRCNT \
|
||||
(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* STATUS LED -- Provides a simple blinking led. For Nios2 each board
|
||||
* must implement its own led routines -- since leds are board-specific.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
|
||||
#define CONFIG_STATUS_LED /* Enable status driver */
|
||||
|
||||
#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
|
||||
#define STATUS_LED_STATE 1 /* Blinking */
|
||||
#define STATUS_LED_PERIOD (500/CONFIG_SYS_NIOS_TMRMS) /* Every 500 msec */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
|
||||
* and really doesn't need any additional clutter. So I choose the lazy
|
||||
* way out to avoid changes there -- define the base address to ensure
|
||||
* cache bypass so there's no need to monkey with inx/outx macros.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111 */
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
|
||||
|
||||
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
|
||||
#define CONFIG_NETMASK 255.255.255.0
|
||||
#define CONFIG_IPADDR 192.168.2.21
|
||||
#define CONFIG_SERVERIP 192.168.2.16
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#define CONFIG_CMD_BDI
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_ECHO
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_IMI
|
||||
#define CONFIG_CMD_IRQ
|
||||
#define CONFIG_CMD_LOADS
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_MISC
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_RUN
|
||||
#define CONFIG_CMD_SAVES
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MISC
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_LONGHELP /* Provide extended help*/
|
||||
#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* Max command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */
|
||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000
|
||||
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
@ -1,207 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2005, Psyent Corporation <www.psyent.com>
|
||||
* Scott McNutt <smcnutt@psyent.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* BOARD/CPU
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_EP1S40 1 /* EP1S40 board */
|
||||
#define CONFIG_SYS_CLK_FREQ 50000000 /* 50 MHz core clk */
|
||||
|
||||
#define CONFIG_SYS_RESET_ADDR 0x00000000 /* Hard-reset address */
|
||||
#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 /* Exception entry point*/
|
||||
#define CONFIG_SYS_NIOS_SYSID_BASE 0x021208b8 /* System id address */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* CACHE -- the following will support II/s and II/f. The II/s does not
|
||||
* have dcache, so the cache instructions will behave as NOPs.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_ICACHE_SIZE 4096 /* 4 KByte total */
|
||||
#define CONFIG_SYS_ICACHELINE_SIZE 32 /* 32 bytes/line */
|
||||
#define CONFIG_SYS_DCACHE_SIZE 2048 /* 2 KByte (II/f) */
|
||||
#define CONFIG_SYS_DCACHELINE_SIZE 4 /* 4 bytes/line (II/f) */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MEMORY BASE ADDRESSES
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_FLASH_BASE 0x00000000 /* FLASH base addr */
|
||||
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x01000000 /* SDRAM base addr */
|
||||
#define CONFIG_SYS_SDRAM_SIZE 0x01000000 /* 16 MByte */
|
||||
#define CONFIG_SYS_SRAM_BASE 0x02000000 /* SRAM base addr */
|
||||
#define CONFIG_SYS_SRAM_SIZE 0x00100000 /* 1 MB */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MEMORY ORGANIZATION
|
||||
* -Monitor at top.
|
||||
* -The heap is placed below the monitor.
|
||||
* -Global data is placed below the heap.
|
||||
* -The stack is placed below global data (&grows down).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256k */
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Global data size rsvd*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) /* 256k heap */
|
||||
|
||||
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
|
||||
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - CONFIG_SYS_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* FLASH (AM29LV065D)
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* Max # sects per bank */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max # of flash banks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
|
||||
* CONFIG_SYS_FLASH_BASE, since we assume that u-boot is stored at the bottom
|
||||
* of flash memory. This will keep the environment in user region
|
||||
* of flash. NOTE: the monitor length must be multiple of sector size
|
||||
* (which is common practice).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment in flash */
|
||||
#define CONFIG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
|
||||
#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* CONSOLE
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_ALTERA_UART 1 /* Use altera uart */
|
||||
#if defined(CONFIG_ALTERA_JTAG_UART)
|
||||
#define CONFIG_SYS_NIOS_CONSOLE 0x021208b0 /* JTAG UART base addr */
|
||||
#else
|
||||
#define CONFIG_SYS_NIOS_CONSOLE 0x02120840 /* UART base addr */
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
|
||||
#define CONFIG_BAUDRATE 115200 /* Initial baudrate */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200} /* It's fixed ;-) */
|
||||
|
||||
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1 /* Suppress console info*/
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* EPCS Device -- None for stratix.
|
||||
*----------------------------------------------------------------------*/
|
||||
#undef CONFIG_SYS_NIOS_EPCSBASE
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* DEBUG
|
||||
*----------------------------------------------------------------------*/
|
||||
#undef CONFIG_ROM_STUBS /* Stubs not in ROM */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* TIMEBASE --
|
||||
*
|
||||
* The high res timer defaults to 1 msec. Since it includes the period
|
||||
* registers, the interrupt frequency can be reduced using TMRCNT.
|
||||
* If the default period is acceptable, TMRCNT can be left undefined.
|
||||
* TMRMS represents the desired mecs per tick (msecs per interrupt).
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_HZ 1000 /* Always 1000 */
|
||||
#define CONFIG_SYS_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
|
||||
#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
|
||||
#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec) */
|
||||
#define CONFIG_SYS_NIOS_TMRCNT \
|
||||
(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* STATUS LED -- Provides a simple blinking led. For Nios2 each board
|
||||
* must implement its own led routines -- since leds are board-specific.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_LEDPIO_ADDR 0x02120870 /* LED PIO base addr */
|
||||
#define CONFIG_STATUS_LED /* Enable status driver */
|
||||
|
||||
#define STATUS_LED_BIT 1 /* Bit-0 on PIO */
|
||||
#define STATUS_LED_STATE 1 /* Blinking */
|
||||
#define STATUS_LED_PERIOD (500/CONFIG_SYS_NIOS_TMRMS) /* Every 500 msec */
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* ETHERNET -- The header file for the SMC91111 driver hurts my eyes ...
|
||||
* and really doesn't need any additional clutter. So I choose the lazy
|
||||
* way out to avoid changes there -- define the base address to ensure
|
||||
* cache bypass so there's no need to monkey with inx/outx macros.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111 */
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
|
||||
|
||||
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
|
||||
#define CONFIG_NETMASK 255.255.255.0
|
||||
#define CONFIG_IPADDR 192.168.2.21
|
||||
#define CONFIG_SERVERIP 192.168.2.16
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#define CONFIG_CMD_BDI
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_ECHO
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_IMI
|
||||
#define CONFIG_CMD_IRQ
|
||||
#define CONFIG_CMD_LOADS
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_MISC
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_RUN
|
||||
#define CONFIG_CMD_SAVES
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------
|
||||
* MISC
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_LONGHELP /* Provide extended help*/
|
||||
#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* Max command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buf size */
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* Default load address */
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* Start addr for test */
|
||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_INIT_SP - 0x00020000
|
||||
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue