lcd: Support for LCD frame buffer.
Driver for LCD controller/frame buffer has been provided. Now, it's possible to redirect console output to LCD screen and display logo/splash screen on LCD. The driver has been tested with ILI9325 and ILI9331 chip drivers. Signed-off-by: Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
This commit is contained in:
Marcin Mielczarczyk
parent
2677c839bb
commit
9fa90e119d
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@ -25,7 +25,10 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(SOC).o
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COBJS = timer.o reset.o
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COBJS-y = timer.o reset.o
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COBJS-$(CONFIG_MTK_LCD) += lcd_backlight.o
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COBJS := $(COBJS-y)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj),$(SOBJS))
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@ -0,0 +1,65 @@
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/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch-mtk/system.h>
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#include <asm/arch-mtk/pwm.h>
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#include <asm/arch-mtk/gpio.h>
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#define BACK_PWM4_CON_H_L_DURATION 0x3F79
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#define BACK_PWM4_CON_CLKDIV 3
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#define BACK_PWM4_CON_STOP_BITPOS 1
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#define BACK_PWM4_SEND_DATA0 1
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/*
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* Turns on LCD backlight.
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*/
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void lcd_backlight_on(void)
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{
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/* Turn on the PWM block. */
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writew(PDN_CON0_PWM, MTK_CONFG_PDN_CLR0);
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/* Choose alternative function for GPIO40 - PWM output. */
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writew((readw(MTK_GPIO_MODE6) & (~MTK_GPIO_MODE6_GPIO40_ALT3)) |
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MTK_GPIO_MODE6_GPIO40_ALT1, MTK_GPIO_MODE6);
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/* Set periodical mode. */
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writew(BACK_PWM4_CON_CLKDIV | (BACK_PWM4_CON_STOP_BITPOS <<
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PWM_CON_STOP_BITPOS), PWM_PWM4_CON);
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writew(BACK_PWM4_CON_H_L_DURATION, PWM_PWM4_HDURATION);
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writew(BACK_PWM4_CON_H_L_DURATION, PWM_PWM4_LDURATION);
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writew(BACK_PWM4_SEND_DATA0, PWM_PWM4_SEND_DATA0);
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/* Enable PWM4. */
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writew(readw(PWM_ENABLE) | PWM_ENABLE_PWM4_EN, PWM_ENABLE);
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}
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/*
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* Turns off LCD backlight.
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*/
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void lcd_backlight_off(void)
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{
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/* Enable PWM4. */
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writew(readw(PWM_ENABLE) & (~PWM_ENABLE_PWM4_EN), PWM_ENABLE);
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}
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@ -82,7 +82,48 @@
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#define MTK_GPIO_CLK_OUT9 (MTK_GPIO_BASE + 0x3800)
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#define MTK_GPIO_CLK_OUT10 (MTK_GPIO_BASE + 0x3900)
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/* MTK_GPIO_MODE_9 bit field definitions */
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/* MTK_GPIO_MODE_4 bit field definitions. */
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#define MTK_GPIO_MODE4_GPIO24 0
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#define MTK_GPIO_MODE4_GPIO24_ALT1 1
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#define MTK_GPIO_MODE4_GPIO24_ALT2 2
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#define MTK_GPIO_MODE4_GPIO24_ALT3 3
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#define MTK_GPIO_MODE4_GPIO25 (0 << 2)
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#define MTK_GPIO_MODE4_GPIO25_ALT1 (1 << 2)
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#define MTK_GPIO_MODE4_GPIO25_ALT2 (2 << 2)
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#define MTK_GPIO_MODE4_GPIO25_ALT3 (3 << 2)
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#define MTK_GPIO_MODE4_GPIO26 (0 << 4)
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#define MTK_GPIO_MODE4_GPIO26_ALT1 (1 << 4)
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#define MTK_GPIO_MODE4_GPIO26_ALT2 (2 << 4)
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#define MTK_GPIO_MODE4_GPIO26_ALT3 (3 << 4)
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#define MTK_GPIO_MODE4_GPIO27 (0 << 6)
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#define MTK_GPIO_MODE4_GPIO27_ALT1 (1 << 6)
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#define MTK_GPIO_MODE4_GPIO27_ALT2 (2 << 6)
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#define MTK_GPIO_MODE4_GPIO27_ALT3 (3 << 6)
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#define MTK_GPIO_MODE4_GPIO28 (0 << 8)
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#define MTK_GPIO_MODE4_GPIO28_ALT1 (1 << 8)
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#define MTK_GPIO_MODE4_GPIO28_ALT2 (2 << 8)
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#define MTK_GPIO_MODE4_GPIO28_ALT3 (3 << 8)
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#define MTK_GPIO_MODE4_GPIO29 (0 << 10)
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#define MTK_GPIO_MODE4_GPIO29_ALT1 (1 << 10)
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#define MTK_GPIO_MODE4_GPIO29_ALT2 (2 << 10)
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#define MTK_GPIO_MODE4_GPIO29_ALT3 (3 << 10)
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#define MTK_GPIO_MODE4_GPIO30 (0 << 12)
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#define MTK_GPIO_MODE4_GPIO30_ALT1 (1 << 12)
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#define MTK_GPIO_MODE4_GPIO30_ALT2 (2 << 12)
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#define MTK_GPIO_MODE4_GPIO30_ALT3 (3 << 12)
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#define MTK_GPIO_MODE4_GPIO31 (0 << 14)
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#define MTK_GPIO_MODE4_GPIO31_ALT1 (1 << 14)
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#define MTK_GPIO_MODE4_GPIO31_ALT2 (2 << 14)
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#define MTK_GPIO_MODE4_GPIO31_ALT3 (3 << 14)
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/* MTK_GPIO_MODE_9 bit field definitions. */
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#define MTK_GPIO_MODE9_GPIO64 0
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#define MTK_GPIO_MODE9_GPIO64_ALT1 1
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#define MTK_GPIO_MODE9_GPIO64_ALT2 2
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@ -143,4 +184,10 @@
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#define MTK_GPIO_MODEA_GPIO75_ALT2 (2 << 6)
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#define MTK_GPIO_MODEA_GPIO75_ALT3 (3 << 6)
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/* MTK_GPIO_MODE6 bit field definitions. */
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#define MTK_GPIO_MODE6_GPIO40 0
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#define MTK_GPIO_MODE6_GPIO40_ALT1 1
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#define MTK_GPIO_MODE6_GPIO40_ALT2 3
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#define MTK_GPIO_MODE6_GPIO40_ALT3 4
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#endif
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@ -0,0 +1,36 @@
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/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __LCD_BACKLIGHT_H
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#define __LCD_BACKLIGHT_H
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/*
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* Turns on LCD backlight.
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*/
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void lcd_backlight_on(void);
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/*
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* Turns off LCD backlight.
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*/
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void lcd_backlight_off(void);
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#endif /* __LCD_BACKLIGHT_H */
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@ -22,6 +22,8 @@
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#ifndef __MT6235_H
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#define __MT6235_H
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/* Internal bank addresses */
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#define MTK_LCD_BASE 0x90000000
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/* Peripheral base addresses */
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#define MTK_EFUSE_BASE 0x80000000
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@ -0,0 +1,209 @@
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/*
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* (C) 2010 by Tieto <www.tieto.com>
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* Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __MTK_LCD_H
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#define __MTK_LCD_H
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/* LCD controller registry definitions. */
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#define LCD_STA (MTK_LCD_BASE + 0x0000)
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#define LCD_INTEN (MTK_LCD_BASE + 0x0004)
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#define LCD_INTSTA (MTK_LCD_BASE + 0x0008)
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#define LCD_START (MTK_LCD_BASE + 0x000c)
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#define LCD_RSTB (MTK_LCD_BASE + 0x0010)
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#define LCD_SCNF (MTK_LCD_BASE + 0x0014)
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#define LCD_PCNF0 (MTK_LCD_BASE + 0x0018)
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#define LCD_PCNF1 (MTK_LCD_BASE + 0x001c)
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#define LCD_PCNF2 (MTK_LCD_BASE + 0x0020)
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#define LCD_TECON (MTK_LCD_BASE + 0x0024)
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#define LCD_MWINSIZE (MTK_LCD_BASE + 0x0040)
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#define LCD_WROI_W2MOFS (MTK_LCD_BASE + 0x0044)
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#define LCD_WROI_W2MCON (MTK_LCD_BASE + 0x0048)
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#define LCD_WROI_W2MADD (MTK_LCD_BASE + 0x004c)
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#define LCD_WROICON (MTK_LCD_BASE + 0x0050)
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#define LCD_WROIOFS (MTK_LCD_BASE + 0x0054)
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#define LCD_WROICADD (MTK_LCD_BASE + 0x0058)
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#define LCD_WROIDADD (MTK_LCD_BASE + 0x005c)
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#define LCD_WROISIZE (MTK_LCD_BASE + 0x0060)
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#define LCD_WROI_HWREF (MTK_LCD_BASE + 0x0064)
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#define LCD_WROI_DC (MTK_LCD_BASE + 0x0068)
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#define LCD_WROI_BGCLR (MTK_LCD_BASE + 0x006C)
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#define LCD_L0WINCON (MTK_LCD_BASE + 0x0070)
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#define LCD_L0WINSKEY (MTK_LCD_BASE + 0x0074)
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#define LCD_L0WINOFS (MTK_LCD_BASE + 0x0078)
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#define LCD_L0WINADD (MTK_LCD_BASE + 0x007c)
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#define LCD_L0WINSIZE (MTK_LCD_BASE + 0x0080)
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#define LCD_L1WINCON (MTK_LCD_BASE + 0x0090)
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#define LCD_L1WINSKEY (MTK_LCD_BASE + 0x0094)
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#define LCD_L1WINOFS (MTK_LCD_BASE + 0x0098)
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#define LCD_L1WINADD (MTK_LCD_BASE + 0x009c)
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#define LCD_L1WINSIZE (MTK_LCD_BASE + 0x00a0)
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#define LCD_L2WINCON (MTK_LCD_BASE + 0x00b0)
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#define LCD_L2WINSKEY (MTK_LCD_BASE + 0x00b4)
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#define LCD_L2WINOFS (MTK_LCD_BASE + 0x00b8)
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#define LCD_L2WINADD (MTK_LCD_BASE + 0x00bc)
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#define LCD_L2WINSIZE (MTK_LCD_BASE + 0x00c0)
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#define LCD_L3WINCON (MTK_LCD_BASE + 0x00d0)
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#define LCD_L3WINSKEY (MTK_LCD_BASE + 0x00d4)
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#define LCD_L3WINOFS (MTK_LCD_BASE + 0x00d8)
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#define LCD_L3WINADD (MTK_LCD_BASE + 0x00dc)
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#define LCD_L3WINSIZE (MTK_LCD_BASE + 0x00e0)
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#define LCD_L4WINCON (MTK_LCD_BASE + 0x00f0)
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#define LCD_L4WINSKEY (MTK_LCD_BASE + 0x00f4)
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#define LCD_L4WINOFS (MTK_LCD_BASE + 0x00f8)
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#define LCD_L4WINADD (MTK_LCD_BASE + 0x00fc)
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#define LCD_L4WINSIZE (MTK_LCD_BASE + 0x0100)
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#define LCD_L5WINCON (MTK_LCD_BASE + 0x0110)
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#define LCD_L5WINSKEY (MTK_LCD_BASE + 0x0114)
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#define LCD_L5WINOFS (MTK_LCD_BASE + 0x0118)
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#define LCD_L5WINADD (MTK_LCD_BASE + 0x011c)
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#define LCD_L5WINSIZE (MTK_LCD_BASE + 0x0120)
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#define LCD_PDAT0 (MTK_LCD_BASE + 0x4000)
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#define LCD_PCMD0 (MTK_LCD_BASE + 0x4100)
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#define LCD_PDAT1 (MTK_LCD_BASE + 0x5000)
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#define LCD_PCMD1 (MTK_LCD_BASE + 0x5100)
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#define LCD_PDAT2 (MTK_LCD_BASE + 0x6000)
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#define LCD_PCMD2 (MTK_LCD_BASE + 0x6100)
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#define LCD_SDAT1 (MTK_LCD_BASE + 0x8000)
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#define LCD_SCMD1 (MTK_LCD_BASE + 0x8100)
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#define LCD_SDAT0 (MTK_LCD_BASE + 0x9000)
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#define LCD_SCMD0 (MTK_LCD_BASE + 0x9100)
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#define LCD_GAMMA (MTK_LCD_BASE + 0xc000)
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#define LCD_PAL (MTK_LCD_BASE + 0xc400)
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#define LCD_COMD0 (MTK_LCD_BASE + 0xc800)
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#define LCD_COMD1 (MTK_LCD_BASE + 0xc880)
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/* Bit field definitions for LCD_START register. */
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#define LCD_START_START (1 << 15)
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/* Bit field definitions for LCD_PCNF0. */
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#define LCD_PCNF0_RLT 0
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#define LCD_PCNF0_WST 8
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#define LCD_PCNF0_26M (1 << 14)
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#define LCD_PCNF0_52M (1 << 15)
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#define LCD_PCNF0_DW 16
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#define LCD_PCNF0_GAMMA_ID_B 18
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#define LCD_PCNF0_GAMMA_ID_G 20
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#define LCD_PCNF0_GAMMA_ID_R 22
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#define LCD_PCNF0_C2RS 24
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#define LCD_PCNF0_C2WH 28
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#define LCD_PCNF0_C2WS 30
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/* Definition of LCD_PCNF0 field values. */
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#define LCD_PCNF0_DW_8BIT 0
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#define LCD_PCNF0_DW_9BIT 1
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#define LCD_PCNF0_DW_16BIT 2
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#define LCD_PCNF0_DW_18BIT 3
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#define LCD_PCNF0_GAMMA_ID_X_TABLE_0 0
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#define LCD_PCNF0_GAMMA_ID_X_TABLE_1 1
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#define LCD_PCNF0_GAMMA_ID_X_TABLE_2 2
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#define LCD_PCNF0_GAMMA_ID_X_NO_TABLE 3
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/* Bit field definitions for LCD_TECON register. */
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#define LCD_TECON_TE_EN (1 << 0)
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#define LCD_TECON_TE_EDGE_SEL (1 << 1)
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/* Definition of LCD_MWINSIZE field values. */
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#define LCD_MWINSIZE_ROW 16
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/* Bit field definitions for LCD_RSTB register. */
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#define LCD_RSTB_RSTB (1 << 0)
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/* Bit field definitions for W2MCON register. */
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#define LCD_WROI_W2MCON_W2LCM (1 << 0)
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#define LCD_WROI_W2MCON_W2M_FORMAT 1
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#define LCD_WROI_W2MCON_DISCON (1 << 3)
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#define LCD_WROI_W2MCON_ADDINC_DISABLE (1 << 4)
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#define LCD_WROI_W2MCON_DC_OUT_EN (1 << 5)
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#define LCD_WROI_W2MCON_OUTPUT_ALPHA 8
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/* Definition of LCD_WROI_W2MCON field values. */
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#define LCD_WROI_W2MCON_W2M_FORMAT_RGB565 0
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#define LCD_WROI_W2MCON_W2M_FORMAT_RGB888 1
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#define LCD_WROI_W2MCON_W2M_FORMAT_RGB8888 2
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/* Bit field definitions for LCD_WROICON register. */
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#define LCD_WROICON_COMMAND 8
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#define LCD_WROICON_COM_SEL (1 << 13)
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#define LCD_WROICON_W2M (1 << 14)
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#define LCD_WROICON_ENC (1 << 15)
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#define LCD_WROICON_PERIOD 16
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#define LCD_WROICON_EN5 (1 << 26)
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#define LCD_WROICON_EN4 (1 << 27)
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#define LCD_WROICON_EN3 (1 << 28)
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#define LCD_WROICON_EN2 (1 << 29)
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#define LCD_WROICON_EN1 (1 << 30)
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#define LCD_WROICON_EN0 (1 << 31)
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/* Bit field definitions for LCD_WROI_W2MOFS register. */
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#define LCD_WROI_W2MOFS_Y_OFFSET 16
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/* Bit field definitions for LCD_WROI_BGCLR register. */
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#define LCD_WROI_BGCLR_BLUE 0
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#define LCD_WROI_BGCLR_GREEN 8
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#define LCD_WROI_BGCLR_RED 16
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/* Bit field definitions for LCD_WROI_HWREF register. */
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#define LCD_WROI_HWREF_HWREF (1 << 0)
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#define LCD_WROI_HWREF_HWEN (1 << 7)
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#define LCD_WROI_HWREF_SEL 16
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#define LCD_WROI_HWREF_EN5 (1 << 26)
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#define LCD_WROI_HWREF_EN4 (1 << 27)
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#define LCD_WROI_HWREF_EN3 (1 << 28)
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#define LCD_WROI_HWREF_EN2 (1 << 29)
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#define LCD_WROI_HWREF_EN1 (1 << 30)
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||||
#define LCD_WROI_HWREF_EN0 (1 << 31)
|
||||
|
||||
/* Definition of LCD_WROI_HWREF field values. */
|
||||
#define LCD_WROI_HWREF_SEL_IRT1 0
|
||||
#define LCD_WROI_HWREF_SEL_IBW1 1
|
||||
#define LCD_WROI_HWREF_SEL_IRT2 2
|
||||
#define LCD_WROI_HWREF_SEL_IBW2 3
|
||||
|
||||
/* Bit field definitions for LCD_L0WINCON register. */
|
||||
#define LCD_L0WINCON_OPA_EN (1 << 8)
|
||||
#define LCD_L0WINCON_CLRDPT 9
|
||||
#define LCD_L0WINCON_ROTATE 11
|
||||
#define LCD_L0WINCON_KEYEN (1 << 14)
|
||||
#define LCD_L0WINCON_SRC (1 << 15)
|
||||
#define LCD_L0WINCON_SWP (1 << 16)
|
||||
#define LCD_L0WINCON_READ_CACHE_DIS (1 << 20)
|
||||
|
||||
/* Definition of LCD_WROI_HWREF field values. */
|
||||
#define LCD_L0WINCON_CLRDPT_8BPP 0
|
||||
#define LCD_L0WINCON_CLRDPT_RGB565 1
|
||||
#define LCD_L0WINCON_CLRDPT_ARGB8888 2
|
||||
#define LCD_L0WINCON_CLRDPT_RGB888 3
|
||||
|
||||
/* Bit field definitions for LCD_L0WINSIZE register. */
|
||||
#define LCD_L0WINSIZE_COLUMN 0
|
||||
#define LCD_L0WINSIZE_ROW 16
|
||||
|
||||
/* Bit field definitions for LCD_WROISIZE register. */
|
||||
#define LCD_WROISIZE_COLUMN 0
|
||||
#define LCD_WROISIZE_ROW 16
|
||||
|
||||
/* Bit field definitions for LCD_WROIOFS register. */
|
||||
#define LCD_WROIFS_X_OFFSET 0
|
||||
#define LCD_WROIFS_Y_OFFSET 16
|
||||
|
||||
#endif /* __MTK_LCD_H */
|
||||
|
|
@ -0,0 +1,101 @@
|
|||
/*
|
||||
* (C) 2010 by Tieto <www.tieto.com>
|
||||
* Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
|
||||
*
|
||||
* All Rights Reserved
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __PWM_H
|
||||
#define __PWM_H
|
||||
|
||||
/* PWM registry addresses. */
|
||||
#define PWM_ENABLE (MTK_PWM_BASE + 0x0000)
|
||||
#define PWM_PWM4_DELAY (MTK_PWM_BASE + 0x0004)
|
||||
#define PWM_PWM5_DELAY (MTK_PWM_BASE + 0x0008)
|
||||
#define PWM_PWM6_DELAY (MTK_PWM_BASE + 0x000C)
|
||||
#define PWM_PWM1_CON (MTK_PWM_BASE + 0x0010)
|
||||
#define PWM_PWM1_HDURATION (MTK_PWM_BASE + 0x0014)
|
||||
#define PWM_PWM1_LDURATION (MTK_PWM_BASE + 0x0018)
|
||||
#define PWM_PWM1_GDURATION (MTK_PWM_BASE + 0x001C)
|
||||
#define PWM_PWM1_BUF0_BASE_ADDR (MTK_PWM_BASE + 0x0020)
|
||||
#define PWM_PWM1_BUF0_SIZE (MTK_PWM_BASE + 0x0024)
|
||||
#define PWM_PWM1_BUF1_BASE_ADDR (MTK_PWM_BASE + 0x0028)
|
||||
#define PWM_PWM1_BUF1_SIZE (MTK_PWM_BASE + 0x002C)
|
||||
#define PWM_PWM1_SEND_DATA0 (MTK_PWM_BASE + 0x0030)
|
||||
#define PWM_PWM1_SEND_DATA1 (MTK_PWM_BASE + 0x0034)
|
||||
#define PWM_PWM1_WAVE_NUM (MTK_PWM_BASE + 0x0038)
|
||||
#define PWM_PWM1_DATA_WIDTH (MTK_PWM_BASE + 0x003C)
|
||||
#define PWM_PWM1_THRESH (MTK_PWM_BASE + 0x0040)
|
||||
#define PWM_PWM1_SEND_WAVENUM (MTK_PWM_BASE + 0x0044)
|
||||
#define PWM_PWM1_VALID (MTK_PWM_BASE + 0x0048)
|
||||
#define PWM_PWM2_CON (MTK_PWM_BASE + 0x0050)
|
||||
#define PWM_PWM2_HDURATION (MTK_PWM_BASE + 0x0054)
|
||||
#define PWM_PWM2_LDURATION (MTK_PWM_BASE + 0x0058)
|
||||
#define PWM_PWM2_GDURATION (MTK_PWM_BASE + 0x005C)
|
||||
#define PWM_PWM2_BUF0_BASE_ADDR (MTK_PWM_BASE + 0x0060)
|
||||
#define PWM_PWM2_BUF0_SIZE (MTK_PWM_BASE + 0x0064)
|
||||
#define PWM_PWM2_BUF1_BASE_ADDR (MTK_PWM_BASE + 0x0068)
|
||||
#define PWM_PWM2_BUF1_SIZE (MTK_PWM_BASE + 0x006C)
|
||||
#define PWM_PWM2_SEND_DATA0 (MTK_PWM_BASE + 0x0070)
|
||||
#define PWM_PWM2_SEND_DATA1 (MTK_PWM_BASE + 0x0074)
|
||||
#define PWM_PWM2_WAVE_NUM (MTK_PWM_BASE + 0x0078)
|
||||
#define PWM_PWM2_DATA_WIDTH (MTK_PWM_BASE + 0x007C)
|
||||
#define PWM_PWM2_THRESH (MTK_PWM_BASE + 0x0080)
|
||||
#define PWM_PWM2_SEND_WAVENUM (MTK_PWM_BASE + 0x0084)
|
||||
#define PWM_PWM2_VALID (MTK_PWM_BASE + 0x0088)
|
||||
#define PWM_PWM4_CON (MTK_PWM_BASE + 0x00D0)
|
||||
#define PWM_PWM4_HDURATION (MTK_PWM_BASE + 0x00D4)
|
||||
#define PWM_PWM4_LDURATION (MTK_PWM_BASE + 0x00D8)
|
||||
#define PWM_PWM4_GDURATION (MTK_PWM_BASE + 0x00DC)
|
||||
#define PWM_PWM4_BUF0_BASE_ADDR (MTK_PWM_BASE + 0x00E0)
|
||||
#define PWM_PWM4_BUF0_SIZE (MTK_PWM_BASE + 0x00E4)
|
||||
#define PWM_PWM4_BUF1_BASE_ADDR (MTK_PWM_BASE + 0x00E8)
|
||||
#define PWM_PWM4_BUF1_SIZE (MTK_PWM_BASE + 0x00EC)
|
||||
#define PWM_PWM4_SEND_DATA0 (MTK_PWM_BASE + 0x00F0)
|
||||
#define PWM_PWM4_SEND_DATA1 (MTK_PWM_BASE + 0x00F4)
|
||||
#define PWM_PWM4_WAVE_NUM (MTK_PWM_BASE + 0x00F8)
|
||||
#define PWM_PWM4_SEND_WAVENUM (MTK_PWM_BASE + 0x00FC)
|
||||
#define PWM_PWM4_VALID (MTK_PWM_BASE + 0x0100)
|
||||
|
||||
#define PWM_INT_ENABLE (MTK_PWM_BASE + 0x0190)
|
||||
#define PWM_INT_STATUS (MTK_PWM_BASE + 0x0194)
|
||||
#define PWM_INT_ACK (MTK_PWM_BASE + 0x0198)
|
||||
|
||||
/* Bit field definitions for PWM_ENABLE register. */
|
||||
#define PWM_ENABLE_PWM1_EN (1 << 0)
|
||||
#define PWM_ENABLE_PWM2_EN (1 << 1)
|
||||
#define PWM_ENABLE_PWM3_EN (1 << 2)
|
||||
#define PWM_ENABLE_PWM4_EN (1 << 3)
|
||||
#define PWM_ENABLE_PWM5_EN (1 << 4)
|
||||
#define PWM_ENABLE_PWM6_EN (1 << 5)
|
||||
#define PWM_ENABLE_PWM_SEQ_MODE (1 << 6)
|
||||
#define PWM_ENABLE_PWM_DELAY_FIX_CLK (1 << 7)
|
||||
|
||||
/* Bit field definitions for PWM_PWM1_CON register. */
|
||||
#define PWM_CON_CLKDIV_MASK 7
|
||||
#define PWM_CON_CLKSEL (1 << 3)
|
||||
#define PWM_CON_FIX_CLK_MODE (1 << 4)
|
||||
#define PWM_CON_SRC_SEL (1 << 5)
|
||||
#define PWM_CON_MODE (1 << 6)
|
||||
#define PWM_CON_IDLE_VALUE (1 << 7)
|
||||
#define PWM_CON_GUARD_VALUE (1 << 8)
|
||||
#define PWM_CON_STOP_BITPOS 9
|
||||
#define PWM_CON_STOP_BITPOS_MASK (0x3F << PWM_PWM1_CON_STOP_BITPOS)
|
||||
#define PWM_CON_OLD_PWM_MODE (1 << 15)
|
||||
|
||||
#endif /* __PWM_H */
|
||||
|
|
@ -423,7 +423,7 @@ void board_init_f (ulong bootflag)
|
|||
gd->relocaddr = addr;
|
||||
gd->start_addr_sp = addr_sp;
|
||||
gd->reloc_off = addr - _TEXT_BASE;
|
||||
debug ("relocation Offset is: %08lx\n", gd->reloc_off);
|
||||
printf ("relocation Offset is: %08lx\n", gd->reloc_off);
|
||||
memcpy (id, (void *)gd, sizeof (gd_t));
|
||||
|
||||
relocate_code (addr_sp, id, addr);
|
||||
|
|
|
|||
18
common/lcd.c
18
common/lcd.c
|
|
@ -335,6 +335,7 @@ int drv_lcd_init (void)
|
|||
|
||||
lcd_init (lcd_base); /* LCD initialization */
|
||||
|
||||
#ifdef CONFIG_LCD_CONSOLE
|
||||
/* Device initialization */
|
||||
memset (&lcddev, 0, sizeof (lcddev));
|
||||
|
||||
|
|
@ -345,6 +346,7 @@ int drv_lcd_init (void)
|
|||
lcddev.puts = lcd_puts; /* 'puts' function */
|
||||
|
||||
rc = stdio_register (&lcddev);
|
||||
#endif
|
||||
|
||||
return (rc == 0) ? 1 : rc;
|
||||
}
|
||||
|
|
@ -500,7 +502,11 @@ void bitmap_plot (int x, int y)
|
|||
ushort *cmap;
|
||||
#endif
|
||||
ushort i, j;
|
||||
#if defined CONFIG_BMP_565_RGB
|
||||
ushort *bmap;
|
||||
#else
|
||||
uchar *bmap;
|
||||
#endif
|
||||
uchar *fb;
|
||||
ushort *fb16;
|
||||
#if defined CONFIG_PXA250 || defined CONFIG_PXA27X || defined CONFIG_CPU_MONAHANS
|
||||
|
|
@ -510,9 +516,11 @@ void bitmap_plot (int x, int y)
|
|||
volatile cpm8xx_t *cp = &(immr->im_cpm);
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_BMP_565_RGB
|
||||
debug ("Logo: width %d height %d colors %d cmap %d\n",
|
||||
BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS,
|
||||
(int)(sizeof(bmp_logo_palette)/(sizeof(ushort))));
|
||||
#endif
|
||||
|
||||
bmap = &bmp_logo_bitmap[0];
|
||||
fb = (uchar *)(lcd_base + y * lcd_line_length + x);
|
||||
|
|
@ -570,16 +578,23 @@ void bitmap_plot (int x, int y)
|
|||
}
|
||||
}
|
||||
else { /* true color mode */
|
||||
#ifndef CONFIG_BMP_565_RGB
|
||||
u16 col16;
|
||||
#endif
|
||||
fb16 = (ushort *)(lcd_base + y * lcd_line_length + x);
|
||||
for (i=0; i<BMP_LOGO_HEIGHT; ++i) {
|
||||
for (j=0; j<BMP_LOGO_WIDTH; j++) {
|
||||
#ifdef CONFIG_BMP_565_RGB
|
||||
fb16[j] = bmap[j];
|
||||
#else
|
||||
col16 = bmp_logo_palette[(bmap[j]-16)];
|
||||
fb16[j] =
|
||||
((col16 & 0x000F) << 1) |
|
||||
((col16 & 0x00F0) << 3) |
|
||||
((col16 & 0x0F00) << 4);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
bmap += BMP_LOGO_WIDTH;
|
||||
fb16 += panel_info.vl_col;
|
||||
}
|
||||
|
|
@ -610,6 +625,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
|
|||
uchar *fb;
|
||||
bmp_image_t *bmp=(bmp_image_t *)bmp_image;
|
||||
uchar *bmap;
|
||||
|
||||
ushort padded_line;
|
||||
unsigned long width, height, byte_width;
|
||||
unsigned long pwidth = panel_info.vl_col;
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@ COBJS-$(CONFIG_SED156X) += sed156x.o
|
|||
COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
|
||||
COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
|
||||
COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
|
||||
COBJS-$(CONFIG_MTK_LCD) += mtk_lcd.o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,540 @@
|
|||
/*
|
||||
* (C) 2010 by Tieto <www.tieto.com>
|
||||
* Krzysztof Antonowicz <krzysztof.antonowicz@tieto.com>
|
||||
*
|
||||
* All Rights Reserved
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch-mtk/system.h>
|
||||
#include <asm/arch-mtk/gpio.h>
|
||||
#include <asm/arch-mtk/lcd_backlight.h>
|
||||
#include <asm/arch-mtk/mtk_lcd.h>
|
||||
#include <lcd.h>
|
||||
#include <version.h>
|
||||
|
||||
|
||||
#ifdef CONFIG_MTK_LCD
|
||||
|
||||
#ifdef CONFIG_MTK_LCD_ILI93XX
|
||||
/* 320x240, 16 bit color in RGB565 mode. */
|
||||
|
||||
/* LCD configuration structure for ILI93XX. */
|
||||
vidinfo_t panel_info = {
|
||||
.vl_col = 240,
|
||||
.vl_row = 320,
|
||||
.vl_bpix = LCD_BPP
|
||||
};
|
||||
|
||||
#else
|
||||
#error "LCD module type not defined!"
|
||||
#endif /* CONFIG_MTK_LCD_ILI93XX */
|
||||
#else
|
||||
#error "This file shouldn't be compiled!"
|
||||
#endif /* CONFIG_MTK_LCD */
|
||||
|
||||
#define DRIVER_NAME "mtk_lcd"
|
||||
|
||||
/* Reset timing. */
|
||||
#define LCD_RESET_LOW_LEVEL_WIDTH_US 5000
|
||||
#define LCD_RESET_HIGH_LEVEL_WIDTH_US 50000
|
||||
#define LCD_DISCHARGE_CAPACITOR_TIME_US 200000
|
||||
#define LCD_POWER_PARAM_STABILIZING_TIME_US 50000
|
||||
|
||||
#define LCD_RLT 10
|
||||
#define LCD_WST 3
|
||||
#define LCD_C2WS 2
|
||||
|
||||
#define LCD_WAITING_PERIOD_BETWEEN_TRANSFERS 0x1F
|
||||
|
||||
#define LCD_DEFAULT_WROI_X_OFFSET 0
|
||||
#define LCD_DEFAULT_WROI_Y_OFFSET 0
|
||||
#define LCD_COMMAND_SET_GRAM_ADDRESS 0x00800022
|
||||
|
||||
/* 1 transfer/1 pixel in RGB565 mode. */
|
||||
#define LCD_FORMAT 0x50
|
||||
|
||||
/* RS line low. */
|
||||
#define LCD_WRITE_REGISTER_INDEX(index) writew(index, LCD_PDAT0)
|
||||
|
||||
/* RS line high. */
|
||||
#define LCD_READ_REGISTER_DATA() readw(LCD_PCMD0)
|
||||
#define LCD_WRITE_REGISTER_DATA(data) writew(data, LCD_PCMD0)
|
||||
|
||||
#define LCD_WRITE_CONTROL_REGISTER(index, data) \
|
||||
do { \
|
||||
LCD_WRITE_REGISTER_INDEX(index); \
|
||||
LCD_WRITE_REGISTER_DATA(data); \
|
||||
} while (0)
|
||||
|
||||
/* Printing macros. */
|
||||
#define DEBUG_LINE() do { \
|
||||
debug("%s[%s]: called.\n", DRIVER_NAME, __func__); \
|
||||
} while (0)
|
||||
|
||||
#define DEBUG_MSG(fmt, arg...) do { \
|
||||
debug("%s[%s]: " fmt "\n", DRIVER_NAME, \
|
||||
__func__, ##arg); \
|
||||
} while (0)
|
||||
|
||||
#define ERROR(fmt, arg...) do { \
|
||||
printf("%s[%s] ERROR: " fmt "\n", DRIVER_NAME, \
|
||||
__func__, ##arg); \
|
||||
} while (0)
|
||||
|
||||
#define INFO(fmt, arg...) do { \
|
||||
printf("%s INFO: " fmt "\n", DRIVER_NAME, ##arg); \
|
||||
} while (0)
|
||||
|
||||
#define SEQUENCE_LENGTH(sequence) (sizeof(sequence) / sizeof(*sequence))
|
||||
|
||||
/* Start address of frame buffer memory - layer 0. */
|
||||
void *lcd_base;
|
||||
|
||||
/* Start of console buffer. */
|
||||
void *lcd_console_address;
|
||||
|
||||
int lcd_line_length;
|
||||
int lcd_color_fg;
|
||||
int lcd_color_bg;
|
||||
|
||||
short console_col;
|
||||
short console_row;
|
||||
|
||||
struct register_write_transaction {
|
||||
u8 register_index;
|
||||
u16 register_value;
|
||||
ulong delay_us;
|
||||
};
|
||||
|
||||
struct configuration_sequence {
|
||||
u32 device_code;
|
||||
const struct register_write_transaction * const init_sequence;
|
||||
const u16 init_sequence_length;
|
||||
const struct register_write_transaction * const powerup_sequence;
|
||||
const u16 powerup_sequence_length;
|
||||
};
|
||||
|
||||
/* Device configuration. */
|
||||
struct fb_device_config {
|
||||
u32 device_code;
|
||||
struct configuration_sequence *config_sequence;
|
||||
};
|
||||
|
||||
static const struct register_write_transaction ILI9325_init_sequence[] = {
|
||||
|
||||
/* SS = 1, the shift direction of outputs is from S720 to S1. */
|
||||
{0x01, 0x0100, 0},
|
||||
/* Set line inversion: EOR = 1 and B/C = 1. */
|
||||
{0x02, 0x0700, 0},
|
||||
/* Set BGR = 1 and GRAM access direction. */
|
||||
{0x03, 0x1030, 0},
|
||||
/* Set resizing factor. */
|
||||
{0x04, 0x0000, 0},
|
||||
/* Set number of lines for front porch and back porch. */
|
||||
{0x08, 0x0202, 0},
|
||||
/* Specify scan cycle interval. */
|
||||
{0x09, 0x0000, 0},
|
||||
/* Set the output interval of FMARK signal to 1 frame.
|
||||
Start marking. */
|
||||
{0x0A, 0x0008, 0},
|
||||
/* RIM0 = 1, 16-bit RGB interface (1 transfer/pixel),
|
||||
DB[17:13] and DB[11:1] */
|
||||
{0x0C, 0x0001, 0},
|
||||
/* Set the output position of frame marker (0th line). */
|
||||
{0x0D, 0x0000, 0},
|
||||
/* Set RGB interface polarity. */
|
||||
{0x0F, 0x0000, 0}
|
||||
};
|
||||
|
||||
static const struct register_write_transaction ILI9325_powerup_sequence[] = {
|
||||
|
||||
/* SAP, BT[3:0], AP, DSTB, SLP, STB */
|
||||
{0x10, 0x0000, 0},
|
||||
/* DC1[2:0], DC0[2:0], VC[2:0] */
|
||||
{0x11, 0x0007, 0},
|
||||
/* Set VREG1OUT voltage = HALT. */
|
||||
{0x12, 0x0000, 0},
|
||||
/* Select the factor for VREG1OUT.
|
||||
Discharge capacitor power voltage. */
|
||||
{0x13, 0x0000, LCD_DISCHARGE_CAPACITOR_TIME_US},
|
||||
/* SAP, BT[3:0], AP, DSTB, SLP, STB */
|
||||
{0x10, 0x1690, 0},
|
||||
/* R11h = 0x0221 at VCI = 3.3V, DC1[2:0], DC0[2:0], VC[2:0] */
|
||||
{0x11, 0x0227, LCD_POWER_PARAM_STABILIZING_TIME_US},
|
||||
/* External reference voltage = VCI. */
|
||||
{0x12, 0x001C, LCD_POWER_PARAM_STABILIZING_TIME_US},
|
||||
/* VCOM = VREG1OUT x 1.24 */
|
||||
{0x13, 0x1800, 0},
|
||||
/* VCOMH = VREG1OUT x 0.965 */
|
||||
{0x29, 0x001C, 0},
|
||||
/* Frame rate = 91Hz (default value). */
|
||||
{0x2B, 0x000D, LCD_POWER_PARAM_STABILIZING_TIME_US},
|
||||
/* GRAM horizontal address. */
|
||||
{0x20, 0x0000, 0},
|
||||
/* GRAM vertical address.*/
|
||||
{0x21, 0x0000, 0},
|
||||
/* Adjust the Gamma Curve. */
|
||||
{0x30, 0x0007, 0}, {0x31, 0x0302, 0}, {0x32, 0x0105, 0},
|
||||
{0x35, 0x0206, 0}, {0x36, 0x0808, 0}, {0x37, 0x0206, 0},
|
||||
{0x38, 0x0504, 0}, {0x39, 0x0007, 0}, {0x3C, 0x0105, 0},
|
||||
{0x3D, 0x0808, 0},
|
||||
/* Horizontal GRAM start address. */
|
||||
{0x50, 0x0000, 0},
|
||||
/* Horizontal GRAM end address. */
|
||||
{0x51, 0x00EF, 0},
|
||||
/* Vertical GRAM start address. */
|
||||
{0x52, 0x0000, 0},
|
||||
/* Vertical GRAM end address. */
|
||||
{0x53, 0x013F, 0},
|
||||
/* Gate scan line. */
|
||||
{0x60, 0xA700, 0},
|
||||
/* NDL,VLE, REV */
|
||||
{0x61, 0x0001, 0},
|
||||
/* Set scrolling line. */
|
||||
{0x6A, 0x0000, 0},
|
||||
/* Partial Display Control. */
|
||||
{0x80, 0x0000, 0}, {0x81, 0x0000, 0}, {0x82, 0x0000, 0},
|
||||
{0x83, 0x0000, 0}, {0x84, 0x0000, 0}, {0x85, 0x0000, 0},
|
||||
/* Panel Control. */
|
||||
{0x90, 0x0010, 0}, {0x92, 0x0000, 0}, {0x93, 0x0003, 0},
|
||||
{0x95, 0x0110, 0}, {0x97, 0x0000, 0}, {0x98, 0x0000, 0},
|
||||
/* Set 262K color and turn on the display. */
|
||||
{0x07, 0x0133, 0},
|
||||
};
|
||||
|
||||
static const struct register_write_transaction ILI9331_init_sequence[] = {
|
||||
|
||||
{0x01, 0x0100, 0}, {0x02, 0x0200, 0}, {0x03, 0x1030, 0},
|
||||
{0x04, 0x0000, 0}, {0x08, 0x0202, 0}, {0x09, 0x0000, 0},
|
||||
{0x0A, 0x0008, 0}, {0x0C, 0x0001, 0}, {0x0D, 0x0000, 0},
|
||||
{0x0F, 0x0000, 0}
|
||||
};
|
||||
|
||||
static const struct register_write_transaction ILI9331_powerup_sequence[] = {
|
||||
|
||||
{0x10, 0x0000, 0}, {0x11, 0x0007, 0}, {0x12, 0x0000, 0},
|
||||
{0x13, 0x0000, LCD_DISCHARGE_CAPACITOR_TIME_US},
|
||||
{0x10, 0x1690, 0},
|
||||
{0x11, 0x0227, LCD_POWER_PARAM_STABILIZING_TIME_US},
|
||||
{0x12, 0x000C, LCD_POWER_PARAM_STABILIZING_TIME_US},
|
||||
{0x13, 0x1800, 0}, {0x29, 0x001C, 0},
|
||||
{0x2B, 0x000D, LCD_POWER_PARAM_STABILIZING_TIME_US},
|
||||
{0x20, 0x0000, 0}, {0x21, 0x0000, 0}, {0x30, 0x0007, 0},
|
||||
{0x31, 0x0302, 0}, {0x32, 0x0105, 0}, {0x35, 0x0206, 0},
|
||||
{0x36, 0x0808, 0}, {0x37, 0x0206, 0}, {0x38, 0x0504, 0},
|
||||
{0x39, 0x0007, 0}, {0x3C, 0x0105, 0}, {0x3D, 0x0808, 0},
|
||||
{0x50, 0x0000, 0}, {0x51, 0x00EF, 0}, {0x52, 0x0000, 0},
|
||||
{0x53, 0x013F, 0}, {0x60, 0x2700, 0}, {0x61, 0x0001, 0},
|
||||
{0x6A, 0x0000, 0}, {0x80, 0x0000, 0}, {0x81, 0x0000, 0},
|
||||
{0x82, 0x0000, 0}, {0x83, 0x0000, 0}, {0x84, 0x0000, 0},
|
||||
{0x85, 0x0000, 0}, {0x90, 0x0010, 0}, {0x92, 0x0000, 0},
|
||||
{0x93, 0x0003, 0}, {0x95, 0x0100, 0}, {0x97, 0x0000, 0},
|
||||
{0x98, 0x0000, 0}, {0x07, 0x0133, 0},
|
||||
};
|
||||
|
||||
struct configuration_sequence chip_config_sequences[] = {
|
||||
/* Configuration for ILI9325. */
|
||||
{
|
||||
0x9325,
|
||||
ILI9325_init_sequence,
|
||||
SEQUENCE_LENGTH(ILI9325_init_sequence),
|
||||
ILI9325_powerup_sequence,
|
||||
SEQUENCE_LENGTH(ILI9325_powerup_sequence)
|
||||
},
|
||||
/* Configuration for ILI9328. */
|
||||
{
|
||||
0x9328,
|
||||
ILI9325_init_sequence,
|
||||
SEQUENCE_LENGTH(ILI9325_init_sequence),
|
||||
ILI9325_powerup_sequence,
|
||||
SEQUENCE_LENGTH(ILI9325_powerup_sequence)
|
||||
},
|
||||
|
||||
/* Configuration for ILI9331. */
|
||||
{
|
||||
0x9331,
|
||||
ILI9331_init_sequence,
|
||||
SEQUENCE_LENGTH(ILI9331_init_sequence),
|
||||
ILI9331_powerup_sequence,
|
||||
SEQUENCE_LENGTH(ILI9331_powerup_sequence)
|
||||
},
|
||||
};
|
||||
|
||||
static struct fb_device_config fb_dev_config;
|
||||
|
||||
void lcd_show_board_info(void)
|
||||
{
|
||||
DEBUG_LINE();
|
||||
|
||||
lcd_printf("%s\n", U_BOOT_VERSION);
|
||||
lcd_printf("(C) 2010 Tieto\n");
|
||||
lcd_printf("www.tieto.com\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* Configures GPIO for LCD controller.
|
||||
*/
|
||||
static void lcd_configure_gpio(void)
|
||||
{
|
||||
DEBUG_LINE();
|
||||
|
||||
/* Choose alternative function for GPIO30 to have LPTE working. */
|
||||
writew((readw(MTK_GPIO_MODE4) & (~MTK_GPIO_MODE4_GPIO30_ALT3)) |
|
||||
MTK_GPIO_MODE4_GPIO30_ALT1, MTK_GPIO_MODE4);
|
||||
}
|
||||
|
||||
/*
|
||||
* Performs reset of LCD.
|
||||
*/
|
||||
static void lcd_reset(void)
|
||||
{
|
||||
DEBUG_LINE();
|
||||
|
||||
/* Set RSTB (reset) line low. */
|
||||
writew(readw(LCD_RSTB) & (~LCD_RSTB_RSTB), LCD_RSTB);
|
||||
|
||||
/* Keep RSTB line low at least 1ms. */
|
||||
udelay(LCD_RESET_LOW_LEVEL_WIDTH_US);
|
||||
writew(LCD_RSTB_RSTB, LCD_RSTB);
|
||||
|
||||
/* Keep RSTB line high at least 50ms. */
|
||||
udelay(LCD_RESET_HIGH_LEVEL_WIDTH_US);
|
||||
}
|
||||
|
||||
/*
|
||||
* Reads device code.
|
||||
*/
|
||||
static int lcd_read_device_code(void)
|
||||
{
|
||||
u8 index;
|
||||
u32 device_code;
|
||||
int ret_val = 0;
|
||||
|
||||
DEBUG_LINE();
|
||||
|
||||
LCD_WRITE_REGISTER_INDEX(0x00);
|
||||
device_code = LCD_READ_REGISTER_DATA();
|
||||
|
||||
INFO("Read LCD device code: %x.", device_code);
|
||||
|
||||
fb_dev_config.device_code = 0;
|
||||
|
||||
/* Check if the device is supported. */
|
||||
for (index = 0; index < SEQUENCE_LENGTH(chip_config_sequences);
|
||||
index++) {
|
||||
if (device_code == chip_config_sequences[index].device_code) {
|
||||
fb_dev_config.device_code = device_code;
|
||||
fb_dev_config.config_sequence =
|
||||
&chip_config_sequences[index];
|
||||
DEBUG_MSG("Configuration found for %x.", device_code);
|
||||
}
|
||||
}
|
||||
|
||||
if (!fb_dev_config.device_code) {
|
||||
ERROR("Device configuration unknown for %x!", device_code);
|
||||
ret_val = -ENODEV;
|
||||
}
|
||||
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
/*
|
||||
* Performs initial sequence of LCD module.
|
||||
*/
|
||||
static void lcd_perform_sequence(
|
||||
const struct register_write_transaction *trans,
|
||||
const u32 sequence_length)
|
||||
{
|
||||
u8 trans_index;
|
||||
|
||||
DEBUG_LINE();
|
||||
DEBUG_MSG("Performing sequence %d elements long...", sequence_length);
|
||||
|
||||
/* Run the sequence. */
|
||||
for (trans_index = 0; trans_index < sequence_length; trans_index++) {
|
||||
|
||||
LCD_WRITE_CONTROL_REGISTER(trans->register_index,
|
||||
trans->register_value);
|
||||
|
||||
if (trans->delay_us)
|
||||
udelay(trans->delay_us);
|
||||
|
||||
trans++;
|
||||
}
|
||||
}
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* Calculate frame buffer size.
|
||||
*/
|
||||
u32 calc_fbsize(void)
|
||||
{
|
||||
u32 size;
|
||||
|
||||
u16 line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
|
||||
size = line_length * panel_info.vl_row;
|
||||
|
||||
return size;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* LCD initialization.
|
||||
*/
|
||||
void lcd_ctrl_init(void *lcdbase)
|
||||
{
|
||||
DEBUG_LINE();
|
||||
DEBUG_MSG("Initializing LCD...");
|
||||
|
||||
lcd_configure_gpio();
|
||||
|
||||
/* Turn on the LCD block in MTK. */
|
||||
writew(PDN_CON1_LCD, MTK_CONFG_PDN_CLR1);
|
||||
|
||||
/* Configure parallel interface:
|
||||
- 52MHz clock
|
||||
- 16-bits data width */
|
||||
writel(LCD_RLT | (LCD_WST << LCD_PCNF0_WST) |
|
||||
(LCD_C2WS << LCD_PCNF0_C2WS) | LCD_PCNF0_52M |
|
||||
(LCD_PCNF0_DW_16BIT << LCD_PCNF0_DW) |
|
||||
(LCD_PCNF0_GAMMA_ID_X_NO_TABLE << LCD_PCNF0_GAMMA_ID_B) |
|
||||
(LCD_PCNF0_GAMMA_ID_X_NO_TABLE << LCD_PCNF0_GAMMA_ID_G) |
|
||||
(LCD_PCNF0_GAMMA_ID_X_NO_TABLE << LCD_PCNF0_GAMMA_ID_R),
|
||||
LCD_PCNF0);
|
||||
|
||||
/* Enable tearing control. LCD controller will synchronize
|
||||
LCM refresh timing to rising edge on FMARK line. */
|
||||
writew(LCD_TECON_TE_EN, LCD_TECON);
|
||||
|
||||
/* Set window size. */
|
||||
writel(panel_info.vl_col | (panel_info.vl_row << LCD_MWINSIZE_ROW),
|
||||
LCD_MWINSIZE);
|
||||
|
||||
/* Choose 1 transfer/pixel in RGB565 mode. */
|
||||
writel(LCD_FORMAT |
|
||||
(LCD_WAITING_PERIOD_BETWEEN_TRANSFERS << LCD_WROICON_PERIOD),
|
||||
LCD_WROICON);
|
||||
|
||||
/* Set region of interest (ROI) size. */
|
||||
writel(panel_info.vl_col | (panel_info.vl_row << LCD_WROISIZE_ROW),
|
||||
LCD_WROISIZE);
|
||||
|
||||
/* Set ROI offset. */
|
||||
writel(LCD_DEFAULT_WROI_X_OFFSET |
|
||||
(LCD_DEFAULT_WROI_Y_OFFSET << LCD_WROIFS_Y_OFFSET),
|
||||
LCD_WROIOFS);
|
||||
|
||||
/* Addresses of registry for execution commands and data. */
|
||||
writew((u16)(LCD_PDAT0 & 0xFFFF), LCD_WROICADD);
|
||||
writew((u16)(LCD_PCMD0 & 0xFFFF), LCD_WROIDADD);
|
||||
|
||||
writel(0x00, LCD_WROI_HWREF);
|
||||
writel(0x00, LCD_WROI_DC);
|
||||
|
||||
/* Reset LCD module. */
|
||||
lcd_reset();
|
||||
|
||||
/* Turn on backlight. */
|
||||
lcd_backlight_on();
|
||||
|
||||
/* Read device code. */
|
||||
if (lcd_read_device_code()) {
|
||||
ERROR("LCD initialization failed!");
|
||||
memset(&fb_dev_config, 0, sizeof(fb_dev_config));
|
||||
return;
|
||||
}
|
||||
|
||||
DEBUG_MSG("Start initial sequence.");
|
||||
|
||||
/* Perform LCD initial sequence. */
|
||||
lcd_perform_sequence(fb_dev_config.config_sequence->init_sequence,
|
||||
fb_dev_config.config_sequence->init_sequence_length);
|
||||
|
||||
DEBUG_MSG("Start power-up sequence.");
|
||||
|
||||
/* Perform LCD power-up sequence. */
|
||||
lcd_perform_sequence(fb_dev_config.config_sequence->powerup_sequence,
|
||||
fb_dev_config.config_sequence->powerup_sequence_length);
|
||||
|
||||
/* Set up layer 0 for frame buffer. */
|
||||
writel(readl(LCD_WROICON) | LCD_WROICON_EN0, LCD_WROICON);
|
||||
writel((LCD_L0WINCON_CLRDPT_RGB565 << LCD_L0WINCON_CLRDPT),
|
||||
LCD_L0WINCON);
|
||||
|
||||
if (!lcd_base) {
|
||||
ERROR("lcd_base is NULL!");
|
||||
|
||||
/* Turn off the LCD block in MTK. */
|
||||
writew(PDN_CON1_LCD, MTK_CONFG_PDN_SET1);
|
||||
return;
|
||||
} else
|
||||
DEBUG_MSG("lcd_base: %p.", lcd_base);
|
||||
|
||||
writel((u32)lcd_base, LCD_L0WINADD);
|
||||
|
||||
writel(panel_info.vl_col | (panel_info.vl_row << LCD_L0WINSIZE_ROW),
|
||||
LCD_L0WINSIZE);
|
||||
|
||||
writel(0, LCD_L0WINSKEY);
|
||||
writel(0, LCD_L0WINOFS);
|
||||
|
||||
/* Setup 1 (COMMAND field = 0) command: 0x0022 (GRAM access port). */
|
||||
writel(readl(LCD_WROICON) | LCD_WROICON_ENC, LCD_WROICON);
|
||||
|
||||
/* Store register address to send in commands queue. */
|
||||
writel(LCD_COMMAND_SET_GRAM_ADDRESS, LCD_COMD0);
|
||||
|
||||
/* Turn off the LCD block in MTK. */
|
||||
writew(PDN_CON1_LCD, MTK_CONFG_PDN_SET1);
|
||||
}
|
||||
|
||||
/*
|
||||
* Enables LCD.
|
||||
*/
|
||||
void lcd_enable(void)
|
||||
{
|
||||
DEBUG_LINE();
|
||||
|
||||
/* Turn on the LCD block in MTK. */
|
||||
writew(PDN_CON1_LCD, MTK_CONFG_PDN_CLR1);
|
||||
|
||||
/* Wait for LCD block stabilization */
|
||||
udelay(1);
|
||||
|
||||
/* Start control of LCD frame transfer. */
|
||||
writew(LCD_START_START, LCD_START);
|
||||
|
||||
udelay(LCD_POWER_PARAM_STABILIZING_TIME_US);
|
||||
}
|
||||
|
||||
/*
|
||||
* Disables LCD.
|
||||
*/
|
||||
void lcd_disable(void)
|
||||
{
|
||||
DEBUG_LINE();
|
||||
|
||||
/* Stop control of LCD frame transfer. */
|
||||
writew(LCD_START_START, (~LCD_START));
|
||||
|
||||
/* Turn off the LCD block in MTK. */
|
||||
writew(PDN_CON1_LCD, MTK_CONFG_PDN_SET1);
|
||||
}
|
||||
|
|
@ -149,29 +149,48 @@
|
|||
//#define MT62XX_NAND_BBT_IN_NAND
|
||||
|
||||
/* Enable support for mmc. */
|
||||
#define CONFIG_MMC 1
|
||||
#define CONFIG_MMC
|
||||
/* Enable LCD frame buffer facility. */
|
||||
#define CONFIG_LCD
|
||||
|
||||
#ifdef CONFIG_MMC
|
||||
|
||||
/*
|
||||
* The MMC/SD support for is done through the Generic MMC framework
|
||||
* of u-boot. Following options shall be enabled in the default configuration
|
||||
* to include MMC/SD support.
|
||||
*/
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_MTK_MMC
|
||||
/*
|
||||
* The MMC/SD support for is done through the Generic MMC framework
|
||||
* of u-boot. Following options shall be enabled in the default configuration
|
||||
* to include MMC/SD support.
|
||||
*/
|
||||
#define CONFIG_GENERIC_MMC
|
||||
#define CONFIG_CMD_MMC
|
||||
#define CONFIG_MTK_MMC
|
||||
|
||||
/*
|
||||
* To include File system support for MMC, following configuration options
|
||||
* shall be enabled
|
||||
*/
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
/*
|
||||
* To include File system support for MMC, following configuration options
|
||||
* shall be enabled
|
||||
*/
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
|
||||
#endif /* CONFIG_MMC */
|
||||
|
||||
#ifdef CONFIG_LCD
|
||||
|
||||
#define CONFIG_LCD_LOGO
|
||||
// #define CONFIG_LCD_INFO
|
||||
// #define CONFIG_LCD_CONSOLE
|
||||
#define CONFIG_SYS_BLACK_ON_WHITE
|
||||
|
||||
#define CONFIG_MTK_LCD
|
||||
|
||||
/* Choose LCD module controller. */
|
||||
#define CONFIG_MTK_LCD_ILI93XX
|
||||
|
||||
#ifdef CONFIG_MTK_LCD_ILI93XX
|
||||
#define LCD_BPP LCD_COLOR16
|
||||
#endif /* CONFIG_MTK_LCD_ILI93XX */
|
||||
#endif /* CONFIG_LCD */
|
||||
|
||||
#else /* CONFIG_PRELOADER */
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
|
|
@ -125,6 +126,10 @@ endif
|
|||
ifeq ($(VENDOR),syteco)
|
||||
LOGO_BMP= logos/syteco.bmp
|
||||
endif
|
||||
ifeq ($(VENDOR),mtk)
|
||||
LOGO_BMP= logos/osmocom.bmp
|
||||
#LOGO_MODE= -rgb565
|
||||
endif
|
||||
|
||||
# now $(obj) is defined
|
||||
HOSTSRCS += $(addprefix $(SRCTREE)/,$(EXT_OBJ_FILES-y:.o=.c))
|
||||
|
|
@ -223,7 +228,11 @@ else
|
|||
endif
|
||||
|
||||
$(LOGO_H): $(obj)bmp_logo $(LOGO_BMP)
|
||||
ifeq ($(VENDOR),mtk)
|
||||
$(obj)./bmp_logo $(LOGO_BMP) $(LOGO_MODE) >$@
|
||||
else
|
||||
$(obj)./bmp_logo $(LOGO_BMP) >$@
|
||||
endif
|
||||
|
||||
#########################################################################
|
||||
|
||||
|
|
|
|||
173
tools/bmp_logo.c
173
tools/bmp_logo.c
|
|
@ -1,10 +1,15 @@
|
|||
#include "compiler.h"
|
||||
|
||||
union data_types {
|
||||
uint8_t *data8;
|
||||
uint16_t *data16;
|
||||
};
|
||||
|
||||
typedef struct bitmap_s { /* bitmap description */
|
||||
uint16_t width;
|
||||
uint16_t height;
|
||||
uint8_t palette[256*3];
|
||||
uint8_t *data;
|
||||
uint16_t width;
|
||||
uint16_t height;
|
||||
uint8_t palette[256 * 3];
|
||||
union data_types data;
|
||||
} bitmap_t;
|
||||
|
||||
#define DEFAULT_CMAP_SIZE 16 /* size of default color map */
|
||||
|
|
@ -46,37 +51,47 @@ int main (int argc, char *argv[])
|
|||
bitmap_t bmp;
|
||||
bitmap_t *b = &bmp;
|
||||
uint16_t data_offset, n_colors;
|
||||
int rgb565_mode = 0;
|
||||
|
||||
if (argc < 2) {
|
||||
fprintf (stderr, "Usage: %s file\n", argv[0]);
|
||||
fprintf(stderr, "Usage: %s file [-rgb565]\n", argv[0]);
|
||||
exit(EXIT_FAILURE);
|
||||
}
|
||||
|
||||
if (argc > 2) {
|
||||
if (!strcmp("-rgb565", argv[2])) {
|
||||
rgb565_mode = 1;
|
||||
fprintf(stderr, "RGB565 mode chosen.\n");
|
||||
}
|
||||
}
|
||||
|
||||
fp = fopen(argv[1], "rb");
|
||||
|
||||
if (fp == NULL) {
|
||||
perror(argv[1]);
|
||||
exit (EXIT_FAILURE);
|
||||
}
|
||||
|
||||
if ((fp = fopen (argv[1], "rb")) == NULL) {
|
||||
perror (argv[1]);
|
||||
exit (EXIT_FAILURE);
|
||||
}
|
||||
|
||||
if (fgetc (fp) != 'B' || fgetc (fp) != 'M')
|
||||
error ("Input file is not a bitmap", fp);
|
||||
if (fgetc(fp) != 'B' || fgetc(fp) != 'M')
|
||||
error("Input file is not a bitmap", fp);
|
||||
|
||||
/*
|
||||
* read width and height of the image, and the number of colors used;
|
||||
* ignore the rest
|
||||
*/
|
||||
skip_bytes (fp, 8);
|
||||
if (fread (&data_offset, sizeof (uint16_t), 1, fp) != 1)
|
||||
error ("Couldn't read bitmap data offset", fp);
|
||||
skip_bytes (fp, 6);
|
||||
if (fread (&b->width, sizeof (uint16_t), 1, fp) != 1)
|
||||
error ("Couldn't read bitmap width", fp);
|
||||
skip_bytes (fp, 2);
|
||||
if (fread (&b->height, sizeof (uint16_t), 1, fp) != 1)
|
||||
error ("Couldn't read bitmap height", fp);
|
||||
skip_bytes (fp, 22);
|
||||
if (fread (&n_colors, sizeof (uint16_t), 1, fp) != 1)
|
||||
error ("Couldn't read bitmap colors", fp);
|
||||
skip_bytes (fp, 6);
|
||||
skip_bytes(fp, 8);
|
||||
if (fread(&data_offset, sizeof(uint16_t), 1, fp) != 1)
|
||||
error("Couldn't read bitmap data offset", fp);
|
||||
skip_bytes(fp, 6);
|
||||
if (fread(&b->width, sizeof(uint16_t), 1, fp) != 1)
|
||||
error("Couldn't read bitmap width", fp);
|
||||
skip_bytes(fp, 2);
|
||||
if (fread(&b->height, sizeof(uint16_t), 1, fp) != 1)
|
||||
error("Couldn't read bitmap height", fp);
|
||||
skip_bytes(fp, 22);
|
||||
if (fread(&n_colors, sizeof(uint16_t), 1, fp) != 1)
|
||||
error("Couldn't read bitmap colors", fp);
|
||||
skip_bytes(fp, 6);
|
||||
|
||||
/*
|
||||
* Repair endianess.
|
||||
|
|
@ -87,12 +102,14 @@ int main (int argc, char *argv[])
|
|||
n_colors = le_short(n_colors);
|
||||
|
||||
/* assume we are working with an 8-bit file */
|
||||
if ((n_colors == 0) || (n_colors > 256 - DEFAULT_CMAP_SIZE)) {
|
||||
/* reserve DEFAULT_CMAP_SIZE color map entries for default map */
|
||||
if ((!rgb565_mode) && ((n_colors == 0) ||
|
||||
(n_colors > 256 - DEFAULT_CMAP_SIZE))) {
|
||||
/* reserve DEFAULT_CMAP_SIZE color map entries for
|
||||
default map */
|
||||
n_colors = 256 - DEFAULT_CMAP_SIZE;
|
||||
}
|
||||
|
||||
printf ("/*\n"
|
||||
printf("/*\n"
|
||||
" * Automatically generated by \"tools/bmp_logo\"\n"
|
||||
" *\n"
|
||||
" * DO NOT EDIT\n"
|
||||
|
|
@ -108,25 +125,30 @@ int main (int argc, char *argv[])
|
|||
b->width, b->height, n_colors,
|
||||
DEFAULT_CMAP_SIZE);
|
||||
|
||||
if (rgb565_mode)
|
||||
goto rgb565_start;
|
||||
|
||||
/* allocate memory */
|
||||
if ((b->data = (uint8_t *)malloc(b->width * b->height)) == NULL)
|
||||
b->data.data8 = (uint8_t *)malloc(b->width * b->height);
|
||||
|
||||
if (b->data.data8 == NULL)
|
||||
error ("Error allocating memory for file", fp);
|
||||
|
||||
/* read and print the palette information */
|
||||
printf ("unsigned short bmp_logo_palette[] = {\n");
|
||||
printf("unsigned short bmp_logo_palette[] = {\n");
|
||||
|
||||
for (i=0; i<n_colors; ++i) {
|
||||
b->palette[(int)(i*3+2)] = fgetc(fp);
|
||||
b->palette[(int)(i*3+1)] = fgetc(fp);
|
||||
b->palette[(int)(i*3+0)] = fgetc(fp);
|
||||
for (i = 0; i < n_colors; ++i) {
|
||||
b->palette[(int)(i * 3 + 2)] = fgetc(fp);
|
||||
b->palette[(int)(i * 3 + 1)] = fgetc(fp);
|
||||
b->palette[(int)(i * 3 + 0)] = fgetc(fp);
|
||||
x=fgetc(fp);
|
||||
|
||||
printf ("%s0x0%X%X%X,%s",
|
||||
((i%8) == 0) ? "\t" : " ",
|
||||
(b->palette[(int)(i*3+0)] >> 4) & 0x0F,
|
||||
(b->palette[(int)(i*3+1)] >> 4) & 0x0F,
|
||||
(b->palette[(int)(i*3+2)] >> 4) & 0x0F,
|
||||
((i%8) == 7) ? "\n" : ""
|
||||
printf("%s0x0%X%X%X,%s",
|
||||
((i % 8) == 0) ? "\t" : " ",
|
||||
(b->palette[(int)(i * 3 + 0)] >> 4) & 0x0F,
|
||||
(b->palette[(int)(i * 3 + 1)] >> 4) & 0x0F,
|
||||
(b->palette[(int)(i * 3 + 2)] >> 4) & 0x0F,
|
||||
((i % 8) == 7) ? "\n" : ""
|
||||
);
|
||||
}
|
||||
|
||||
|
|
@ -134,33 +156,74 @@ int main (int argc, char *argv[])
|
|||
fseek(fp, (long)data_offset, SEEK_SET);
|
||||
|
||||
/* read the bitmap; leave room for default color map */
|
||||
printf ("\n");
|
||||
printf ("};\n");
|
||||
printf ("\n");
|
||||
printf ("unsigned char bmp_logo_bitmap[] = {\n");
|
||||
printf("\n");
|
||||
printf("};\n");
|
||||
printf("\n");
|
||||
printf("unsigned char bmp_logo_bitmap[] = {\n");
|
||||
/* check if there will be any padding bytes in bitmap */
|
||||
padding = (b->width % 4) ? (4 - (b->width % 4)) : 0;
|
||||
|
||||
for (i=(b->height-1)*b->width; i>=0; i-=b->width) {
|
||||
for (i = (b->height - 1) * b->width; i >= 0; i -= b->width) {
|
||||
for (x = 0; x < b->width; x++) {
|
||||
b->data[i + x] = (uint8_t) fgetc (fp) \
|
||||
+ DEFAULT_CMAP_SIZE;
|
||||
b->data.data8[i + x] = (uint8_t)fgetc(fp) +
|
||||
DEFAULT_CMAP_SIZE;
|
||||
}
|
||||
for (x = 0; x < padding; ++x)
|
||||
/* read padding bytes if any */
|
||||
fgetc(fp);
|
||||
}
|
||||
fclose (fp);
|
||||
fclose(fp);
|
||||
|
||||
for (i=0; i<(b->height*b->width); ++i) {
|
||||
if ((i%8) == 0)
|
||||
for (i = 0; i < (b->height * b->width); ++i) {
|
||||
if ((i % 8) == 0)
|
||||
putchar ('\t');
|
||||
printf ("0x%02X,%c",
|
||||
b->data[i],
|
||||
((i%8) == 7) ? '\n' : ' '
|
||||
);
|
||||
printf("0x%02X,%c",
|
||||
b->data.data8[i],
|
||||
((i % 8) == 7) ? '\n' : ' ');
|
||||
}
|
||||
printf ("\n"
|
||||
printf("\n"
|
||||
"};\n\n"
|
||||
"#endif /* __BMP_LOGO_H__ */\n"
|
||||
);
|
||||
|
||||
return 0;
|
||||
|
||||
rgb565_start:
|
||||
|
||||
/* Allocate memory */
|
||||
b->data.data16 =
|
||||
(uint16_t *)malloc(b->width * b->height * sizeof(uint16_t));
|
||||
|
||||
if (NULL == b->data.data16)
|
||||
error("Error allocating memory for file", fp);
|
||||
|
||||
/* read and print the palette information */
|
||||
printf("unsigned short bmp_logo_palette[1] = { 0x00 };\n");
|
||||
|
||||
/* seek to offset indicated by file header */
|
||||
fseek(fp, (long)data_offset, SEEK_SET);
|
||||
|
||||
printf("\n");
|
||||
printf("unsigned short bmp_logo_bitmap[] = {\n");
|
||||
|
||||
for (i = (b->height - 1) * b->width ; i >= 0; i -= b->width) {
|
||||
for (x = 0; x < b->width; x++) {
|
||||
b->data.data16[(uint16_t) i + x] =
|
||||
(uint16_t)(fgetc(fp) | (fgetc(fp) << 8));
|
||||
}
|
||||
}
|
||||
|
||||
fclose(fp);
|
||||
|
||||
for (i = 0; i < (b->height * b->width); i++) {
|
||||
|
||||
if ((i % 8) == 0)
|
||||
putchar ('\t');
|
||||
|
||||
printf("0x%04X,%c", b->data.data16[i],
|
||||
((i % 8) == 7) ? '\n' : ' ');
|
||||
}
|
||||
printf("\n"
|
||||
"};\n\n"
|
||||
"#endif /* __BMP_LOGO_H__ */\n"
|
||||
);
|
||||
|
|
|
|||
Loading…
Reference in New Issue