[PATCH] Add support for Prodrive SCPU (PDNB3 variant) board
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese
parent
0057d758e3
commit
9d8d5a5bfb
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@ -465,6 +465,7 @@ Stefan Roese <sr@denx.de>
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ixdpg425 xscale
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pdnb3 xscale
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scpu xscale
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Robert Schwebel <r.schwebel@pengutronix.de>
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2
MAKEALL
2
MAKEALL
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@ -225,7 +225,7 @@ LIST_pxa=" \
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xsengine zylonite \
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"
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LIST_ixp="ixdp425 ixdpg425 pdnb3"
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LIST_ixp="ixdp425 ixdpg425 pdnb3 scpu"
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LIST_arm=" \
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11
Makefile
11
Makefile
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@ -2066,8 +2066,15 @@ pleb2_config : unconfig
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logodl_config : unconfig
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@$(MKCONFIG) $(@:_config=) arm pxa logodl
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pdnb3_config : unconfig
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@$(MKCONFIG) $(@:_config=) arm ixp pdnb3 prodrive
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pdnb3_config \
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scpu_config: unconfig
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@if [ "$(findstring scpu_,$@)" ] ; then \
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echo "#define CONFIG_SCPU" >>include/config.h ; \
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echo "... on SCPU board variant" ; \
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else \
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>include/config.h ; \
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fi
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@$(MKCONFIG) -a pdnb3 arm ixp pdnb3 prodrive
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pxa255_idp_config: unconfig
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@$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp
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@ -24,6 +24,8 @@
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#include <common.h>
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#include <asm/arch/ixp425.h>
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#if !defined(CFG_FLASH_CFI_DRIVER)
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/*
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* include common flash code (for esd boards)
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*/
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@ -83,3 +85,5 @@ unsigned long flash_init(void)
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return size;
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}
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#endif /* CFG_FLASH_CFI_DRIVER */
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@ -71,12 +71,18 @@
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#define CONFIG_BAUDRATE 115200
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#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
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#if defined(CONFIG_SCPU)
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#define CMD_NAND_ADD 0
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#else
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#define CMD_NAND_ADD CFG_CMD_NAND
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#endif
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
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CFG_CMD_DHCP | \
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CFG_CMD_DATE | \
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CFG_CMD_NET | \
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CFG_CMD_MII | \
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CFG_CMD_NAND | \
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CMD_NAND_ADD | \
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CFG_CMD_I2C | \
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CFG_CMD_ELF | \
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CFG_CMD_PING)
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@ -176,12 +182,20 @@
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#define CFG_FLASH_BASE 0x50000000
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#define CFG_MONITOR_BASE CFG_FLASH_BASE
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#if defined(CONFIG_SCPU)
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#define CFG_MONITOR_LEN (384 << 10) /* Reserve 512 kB for Monitor */
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#else
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#define CFG_MONITOR_LEN (504 << 10) /* Reserve 512 kB for Monitor */
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#endif
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/*
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* Expansion bus settings
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*/
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#if defined(CONFIG_SCPU)
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#define CFG_EXP_CS0 0x94d23C42 /* 8bit, max size */
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#else
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#define CFG_EXP_CS0 0x94913C43 /* 8bit, max size */
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#endif
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#define CFG_EXP_CS1 0x85000043 /* 8bit, 512bytes */
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/*
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@ -194,6 +208,12 @@
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/*
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* FLASH and environment organization
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*/
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#if defined(CONFIG_SCPU)
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#define CFG_FLASH_CFI /* The flash is CFI compatible */
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#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
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#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
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#endif
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#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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@ -217,20 +237,27 @@
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#define CFG_ENV_IS_IN_FLASH 1
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#if defined(CONFIG_SCPU)
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#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
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#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
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#else
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#define CFG_ENV_SECT_SIZE 0x1000 /* size of one complete sector */
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
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#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
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#endif
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#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
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/* Address and size of Redundant Environment Sector */
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#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
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#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
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#if !defined(CONFIG_SCPU)
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/*
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* NAND-FLASH stuff
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*/
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#define CFG_MAX_NAND_DEVICE 1
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#define NAND_MAX_CHIPS 1
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#define CFG_NAND_BASE 0x51000000 /* NAND FLASH Base Address */
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#endif
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/*
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* GPIO settings
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@ -284,9 +311,15 @@
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/*
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* I2C RTC
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*/
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#if 0 /* test-only */
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#define CONFIG_RTC_DS1340 1
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#define CFG_I2C_RTC_ADDR 0x68
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#else
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/* M41T11 Serial Access Timekeeper(R) SRAM */
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#define CONFIG_RTC_M41T11 1
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#define CFG_I2C_RTC_ADDR 0x68
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#define CFG_M41T11_BASE_YEAR 1900 /* play along with the linux driver */
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#endif
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/*
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* Spartan3 FPGA configuration support
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