Add I2C support to TQM8540 and TQM8560 boards (EEPROM, RTC, LM75-DTT).
Removed CFG_CMD_DISPLAY from default commands. Fixed compiler warning in net.c. Patch by Stefan Roese, 31 Aug 2005
This commit is contained in:
parent
77f6580cc0
commit
9d2a873bdf
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@ -2,6 +2,11 @@
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Changes for U-Boot 1.1.4:
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Changes for U-Boot 1.1.4:
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======================================================================
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======================================================================
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* Add I2C support to TQM8540 and TQM8560 boards (EEPROM, RTC, LM75-DTT).
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Removed CFG_CMD_DISPLAY from default commands.
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Fixed compiler warning in net.c.
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Patch by Stefan Roese, 31 Aug 2005
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* Fix problems with ld version 2.16 (dot outside sections problem)
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* Fix problems with ld version 2.16 (dot outside sections problem)
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Pointed out by Gerhard Jaeger, 31 Aug 2005;
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Pointed out by Gerhard Jaeger, 31 Aug 2005;
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cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html
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cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html
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1
MAKEALL
1
MAKEALL
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@ -126,6 +126,7 @@ LIST_85xx=" \
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MPC8540ADS MPC8540EVAL MPC8541CDS MPC8548CDS \
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MPC8540ADS MPC8540EVAL MPC8541CDS MPC8548CDS \
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MPC8555CDS MPC8560ADS PM854 PM856 \
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MPC8555CDS MPC8560ADS PM854 PM856 \
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sbc8540 sbc8560 stxgp3 TQM8540 \
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sbc8540 sbc8560 stxgp3 TQM8540 \
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TQM8560 \
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"
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"
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#########################################################################
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#########################################################################
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@ -74,15 +74,26 @@ long int initdram (int board_type)
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#if defined(CONFIG_DDR_DLL)
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#if defined(CONFIG_DDR_DLL)
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{
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{
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volatile ccsr_gur_t *gur = &immap->im_gur;
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volatile ccsr_gur_t *gur= &immap->im_gur;
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uint temp_ddrdll = 0;
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int i,x;
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x = 10;
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/*
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/*
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* Work around to stabilize DDR DLL
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* Work around to stabilize DDR DLL
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*/
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*/
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temp_ddrdll = gur->ddrdllcr;
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gur->ddrdllcr = 0x81000000;
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gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
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asm("sync;isync;msync");
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asm ("sync;isync;msync");
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udelay (200);
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while (gur->ddrdllcr != 0x81000100) {
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gur->devdisr = gur->devdisr | 0x00010000;
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asm("sync;isync;msync");
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for (i=0; i<x; i++)
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;
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gur->devdisr = gur->devdisr & 0xfff7ffff;
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asm("sync;isync;msync");
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x++;
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}
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}
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}
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#endif
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#endif
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@ -229,15 +229,26 @@ long int initdram (int board_type)
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#if defined(CONFIG_DDR_DLL)
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#if defined(CONFIG_DDR_DLL)
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{
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{
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volatile ccsr_gur_t *gur = &immap->im_gur;
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volatile ccsr_gur_t *gur= &immap->im_gur;
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uint temp_ddrdll = 0;
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int i,x;
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x = 10;
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/*
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/*
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* Work around to stabilize DDR DLL
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* Work around to stabilize DDR DLL
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*/
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*/
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temp_ddrdll = gur->ddrdllcr;
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gur->ddrdllcr = 0x81000000;
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gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000;
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asm("sync;isync;msync");
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asm ("sync;isync;msync");
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udelay (200);
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while (gur->ddrdllcr != 0x81000100) {
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gur->devdisr = gur->devdisr | 0x00010000;
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asm("sync;isync;msync");
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for (i=0; i<x; i++)
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;
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gur->devdisr = gur->devdisr & 0xfff7ffff;
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asm("sync;isync;msync");
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x++;
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}
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}
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}
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#endif
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#endif
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@ -109,6 +109,7 @@
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CFG_CMD_DATE | \
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CFG_CMD_DATE | \
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CFG_CMD_DHCP | \
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CFG_CMD_DHCP | \
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CFG_CMD_DIAG | \
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CFG_CMD_DIAG | \
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CFG_CMD_DISPLAY | \
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CFG_CMD_DOC | \
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CFG_CMD_DOC | \
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CFG_CMD_DTT | \
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CFG_CMD_DTT | \
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CFG_CMD_ECHO | \
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CFG_CMD_ECHO | \
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@ -230,11 +230,33 @@
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#endif
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#endif
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/* I2C */
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/* I2C */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CFG_I2C_NOPROBES {0x48} /* Don't probe these addrs */
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/* I2C RTC */
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#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */
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#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
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/* I2C EEPROM */
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/*
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* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work also).
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*/
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#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
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#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
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/* I2C SYSMON (LM75) */
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#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
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#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
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#define CFG_DTT_MAX_TEMP 70
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#define CFG_DTT_LOW_TEMP -30
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#define CFG_DTT_HYSTERESIS 3
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/* RapidIO MMU */
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/* RapidIO MMU */
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#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
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#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
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@ -301,7 +323,6 @@
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#endif /* CONFIG_TSEC_ENET */
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#endif /* CONFIG_TSEC_ENET */
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/*
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/*
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* Environment
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* Environment
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*/
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*/
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@ -342,6 +363,9 @@
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#define CONFIG_COMMANDS (CONFIG_CMD_PRIV | \
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#define CONFIG_COMMANDS (CONFIG_CMD_PRIV | \
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ADD_PCI_CMD | \
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ADD_PCI_CMD | \
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CFG_CMD_I2C | \
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CFG_CMD_I2C | \
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CFG_CMD_DATE | \
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CFG_CMD_EEPROM | \
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CFG_CMD_DTT | \
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CFG_CMD_PING )
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CFG_CMD_PING )
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#include <cmd_confdefs.h>
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#include <cmd_confdefs.h>
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"bootfile=/tftpboot/tqm8540/uImage\0" \
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"bootfile=/tftpboot/tqm8540/uImage\0" \
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"kernel_addr=FE000000\0" \
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"kernel_addr=FE000000\0" \
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"ramdisk_addr=FE100000\0" \
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"ramdisk_addr=FE100000\0" \
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"load=tftp 100000 /tftpboot/tqm8540/u-boot.bin\0" \
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"update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
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"cp.b 100000 fffc0000 40000;" \
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"setenv filesize;saveenv\0" \
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"upd=run load;run update\0" \
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""
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""
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#define CONFIG_BOOTCOMMAND "run flash_self"
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#define CONFIG_BOOTCOMMAND "run flash_self"
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#define CONFIG_BOOKE 1 /* BOOKE */
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#define CONFIG_BOOKE 1 /* BOOKE */
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#define CONFIG_E500 1 /* BOOKE e500 family */
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#define CONFIG_E500 1 /* BOOKE e500 family */
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#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
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#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
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#define CONFIG_CPM2 1 /* has CPM2 */
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#define CONFIG_MPC8560 1 /* MPC8560 specific */
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#define CONFIG_MPC8560 1 /* MPC8560 specific */
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#define CONFIG_TQM8560 1 /* TQM8560 board specific */
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#define CONFIG_TQM8560 1 /* TQM8560 board specific */
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@ -226,11 +227,33 @@
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#endif
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#endif
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/* I2C */
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/* I2C */
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#define CONFIG_HARD_I2C /* I2C with hardware support*/
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#define CONFIG_HARD_I2C /* I2C with hardware support */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_SLAVE 0x7F
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#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
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#define CFG_I2C_NOPROBES {0x48} /* Don't probe these addrs */
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/* I2C RTC */
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#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */
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#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
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/* I2C EEPROM */
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/*
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* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work also).
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*/
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#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
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#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
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/* I2C SYSMON (LM75) */
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#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
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#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
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#define CFG_DTT_MAX_TEMP 70
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#define CFG_DTT_LOW_TEMP -30
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#define CFG_DTT_HYSTERESIS 3
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/* RapidIO MMU */
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/* RapidIO MMU */
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#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
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#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
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@ -331,6 +354,9 @@
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#define CONFIG_COMMANDS (CONFIG_CMD_PRIV | \
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#define CONFIG_COMMANDS (CONFIG_CMD_PRIV | \
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ADD_PCI_CMD | \
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ADD_PCI_CMD | \
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CFG_CMD_I2C | \
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CFG_CMD_I2C | \
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CFG_CMD_DATE | \
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CFG_CMD_EEPROM | \
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CFG_CMD_DTT | \
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CFG_CMD_PING )
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CFG_CMD_PING )
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#include <cmd_confdefs.h>
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#include <cmd_confdefs.h>
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@ -415,6 +441,11 @@
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"bootfile=/tftpboot/tqm8560/uImage\0" \
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"bootfile=/tftpboot/tqm8560/uImage\0" \
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"kernel_addr=FE000000\0" \
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"kernel_addr=FE000000\0" \
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"ramdisk_addr=FE100000\0" \
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"ramdisk_addr=FE100000\0" \
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"load=tftp 100000 /tftpboot/tqm8560/u-boot.bin\0" \
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"update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
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"cp.b 100000 fffc0000 40000;" \
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"setenv filesize;saveenv\0" \
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"upd=run load;run update\0" \
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""
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""
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#define CONFIG_BOOTCOMMAND "run flash_self"
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#define CONFIG_BOOTCOMMAND "run flash_self"
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