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Merge branch 'next' of ../master

This commit is contained in:
Wolfgang Denk 2009-06-14 22:05:42 +02:00
parent 6b1f78ae6a 388517e4b7
commit 92afd368bb
686 changed files with 15006 additions and 17283 deletions
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7
MAINTAINERS
View File

@ -28,6 +28,7 @@ Pantelis Antoniou <panto@intracom.gr>
Reinhard Arlt <reinhard.arlt@esd-electronics.com> Reinhard Arlt <reinhard.arlt@esd-electronics.com>
cpci5200 MPC5200 cpci5200 MPC5200
mecp5123 MPC5121
mecp5200 MPC5200 mecp5200 MPC5200
pf5200 MPC5200 pf5200 MPC5200
@ -75,6 +76,8 @@ Wolfgang Denk <wd@denx.de>
IceCube_5100 MGT5100 IceCube_5100 MGT5100
IceCube_5200 MPC5200 IceCube_5200 MPC5200
ARIA MPC5121e
AMX860 MPC860 AMX860 MPC860
ETX094 MPC850 ETX094 MPC850
FPS850L MPC850 FPS850L MPC850
@ -610,6 +613,10 @@ Stelian Pop <stelian.pop@leadtechdesign.com>
at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9263ek ARM926EJS (AT91SAM9263 SoC)
at91sam9rlek ARM926EJS (AT91SAM9RL SoC) at91sam9rlek ARM926EJS (AT91SAM9RL SoC)
Tom Rix <Tom.Rix@windriver.com>
omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC)
Stefan Roese <sr@denx.de> Stefan Roese <sr@denx.de>
ixdpg425 xscale ixdpg425 xscale

8
MAKEALL
View File

@ -77,7 +77,9 @@ LIST_5xxx=" \
######################################################################### #########################################################################
LIST_512x=" \ LIST_512x=" \
ads5121 \ aria \
mecp5123 \
mpc5121ads \
" "
######################################################################### #########################################################################
@ -380,6 +382,8 @@ LIST_85xx=" \
MPC8569MDS \ MPC8569MDS \
MPC8572DS \ MPC8572DS \
MPC8572DS_36BIT \ MPC8572DS_36BIT \
P2020DS \
P2020DS_36BIT \
PM854 \ PM854 \
PM856 \ PM856 \
sbc8540 \ sbc8540 \
@ -528,6 +532,7 @@ LIST_ARM9=" \
davinci_schmoogie \ davinci_schmoogie \
davinci_sffsdr \ davinci_sffsdr \
davinci_sonata \ davinci_sonata \
davinci_dm355evm \
" "
######################################################################### #########################################################################
@ -562,6 +567,7 @@ LIST_ARM_CORTEX_A8=" \
omap3_evm \ omap3_evm \
omap3_pandora \ omap3_pandora \
omap3_zoom1 \ omap3_zoom1 \
omap3_zoom2 \
" "
######################################################################### #########################################################################

56
Makefile
View File

@ -344,12 +344,19 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin
$(obj)u-boot.dis: $(obj)u-boot $(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $< > $@ $(OBJDUMP) -d $< > $@
$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) GEN_UBOOT = \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \ UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\ sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \ --start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-Map u-boot.map -o u-boot -Map u-boot.map -o u-boot
$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT)
$(GEN_UBOOT)
ifeq ($(CONFIG_KALLSYMS),y)
smap=`$(call SYSTEM_MAP,u-boot) | awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\0"}'` ; \
$(CC) $(CFLAGS) -DSYSTEM_MAP="\"$${smap}\"" -c common/system_map.c -o $(obj)common/system_map.o
$(GEN_UBOOT) $(obj)common/system_map.o
endif
$(OBJS): depend $(OBJS): depend
$(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@)) $(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
@ -448,10 +455,12 @@ cscope:
> cscope.files > cscope.files
cscope -b -q -k cscope -b -q -k
$(obj)System.map: $(obj)u-boot SYSTEM_MAP = \
@$(NM) $< | \ $(NM) $1 | \
grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
sort > $(obj)System.map LC_ALL=C sort
$(obj)System.map: $(obj)u-boot
@$(call SYSTEM_MAP,$<) > $(obj)System.map
# #
# Auto-generate the autoconf.mk file (which is included by all makefiles) # Auto-generate the autoconf.mk file (which is included by all makefiles)
@ -812,15 +821,20 @@ v38b_config: unconfig
## MPC512x Systems ## MPC512x Systems
######################################################################### #########################################################################
ads5121_config \ aria_config: unconfig
ads5121_rev2_config \ @$(MKCONFIG) -a aria ppc mpc512x aria davedenx
mecp5123_config: unconfig
@$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd
mpc5121ads_config \
mpc5121ads_rev2_config \
: unconfig : unconfig
@mkdir -p $(obj)include @mkdir -p $(obj)include
@if [ "$(findstring rev2,$@)" ] ; then \ @if [ "$(findstring rev2,$@)" ] ; then \
echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \ echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
fi fi
@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121 @$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale
######################################################################### #########################################################################
## MPC8xx Systems ## MPC8xx Systems
@ -1533,6 +1547,17 @@ rainier_nand_config: unconfig
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
sequoia_ramboot_config \
rainier_ramboot_config: unconfig
@mkdir -p $(obj)include $(obj)board/amcc/sequoia
@echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
@$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \
$(obj)board/amcc/sequoia/config.tmp
taihu_config: unconfig taihu_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc @$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
@ -2456,6 +2481,15 @@ MPC8572DS_config: unconfig
fi fi
@$(MKCONFIG) -a MPC8572DS ppc mpc85xx mpc8572ds freescale @$(MKCONFIG) -a MPC8572DS ppc mpc85xx mpc8572ds freescale
P2020DS_36BIT_config \
P2020DS_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _36BIT_,$@)" ] ; then \
echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \
$(XECHO) "... enabling 36-bit physical addressing." ; \
fi
@$(MKCONFIG) -a P2020DS ppc mpc85xx p2020ds freescale
PM854_config: unconfig PM854_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx pm854 @$(MKCONFIG) $(@:_config=) ppc mpc85xx pm854
@ -2790,6 +2824,9 @@ davinci_sffsdr_config : unconfig
davinci_sonata_config : unconfig davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
davinci_dm355evm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dm355evm davinci davinci
lpd7a400_config \ lpd7a400_config \
lpd7a404_config: unconfig lpd7a404_config: unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
@ -2983,6 +3020,9 @@ omap3_pandora_config : unconfig
omap3_zoom1_config : unconfig omap3_zoom1_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3 @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3
omap3_zoom2_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 omap3 omap3
######################################################################### #########################################################################
## XScale Systems ## XScale Systems
######################################################################### #########################################################################

31
README
View File

@ -1315,11 +1315,6 @@ The following options need to be configured:
clock chips. See common/cmd_i2c.c for a description of the clock chips. See common/cmd_i2c.c for a description of the
command line interface. command line interface.
CONFIG_I2C_CMD_TREE is a recommended option that places
all I2C commands under a single 'i2c' root command. The
older 'imm', 'imd', 'iprobe' etc. commands are considered
deprecated and may disappear in the future.
CONFIG_HARD_I2C selects a hardware I2C controller. CONFIG_HARD_I2C selects a hardware I2C controller.
CONFIG_SOFT_I2C configures u-boot to use a software (aka CONFIG_SOFT_I2C configures u-boot to use a software (aka
@ -1435,9 +1430,9 @@ The following options need to be configured:
CONFIG_SYS_I2C_NOPROBES CONFIG_SYS_I2C_NOPROBES
This option specifies a list of I2C devices that will be skipped This option specifies a list of I2C devices that will be skipped
when the 'i2c probe' command is issued (or 'iprobe' using the legacy when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
command). If CONFIG_I2C_MULTI_BUS is set, specify a list of bus-device is set, specify a list of bus-device pairs. Otherwise, specify
pairs. Otherwise, specify a 1D array of device addresses a 1D array of device addresses
e.g. e.g.
#undef CONFIG_I2C_MULTI_BUS #undef CONFIG_I2C_MULTI_BUS
@ -1851,6 +1846,17 @@ The following options need to be configured:
These options enable and control the auto-update feature; These options enable and control the auto-update feature;
for a more detailed description refer to doc/README.update. for a more detailed description refer to doc/README.update.
- MTD Support (mtdparts command, UBI support)
CONFIG_MTD_DEVICE
Adds the MTD device infrastructure from the Linux kernel.
Needed for mtdparts command support.
CONFIG_MTD_PARTITIONS
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
Legacy uImage format: Legacy uImage format:
Arg Where When Arg Where When
@ -2871,14 +2877,7 @@ mw - memory write (fill)
cp - memory copy cp - memory copy
cmp - memory compare cmp - memory compare
crc32 - checksum calculation crc32 - checksum calculation
imd - i2c memory display i2c - I2C sub-system
imm - i2c memory modify (auto-incrementing)
inm - i2c memory modify (constant address)
imw - i2c memory write (fill)
icrc32 - i2c checksum calculation
iprobe - probe to discover valid I2C chip addresses
iloop - infinite loop on address range
isdram - print SDRAM configuration information
sspi - SPI utility commands sspi - SPI utility commands
base - print or set address offset base - print or set address offset
printenv- print environment variables printenv- print environment variables

2
api/api_platform-ppc.c
View File

@ -53,7 +53,7 @@ int platform_sys_info(struct sys_info *si)
#define bi_bar bi_immr_base #define bi_bar bi_immr_base
#elif defined(CONFIG_MPC5xxx) #elif defined(CONFIG_MPC5xxx)
#define bi_bar bi_mbar_base #define bi_bar bi_mbar_base
#elif defined(CONFIG_MPC83XX) #elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar #define bi_bar bi_immrbar
#elif defined(CONFIG_MPC8220) #elif defined(CONFIG_MPC8220)
#define bi_bar bi_mbar_base #define bi_bar bi_mbar_base

2
arm_config.mk
View File

@ -22,3 +22,5 @@
# #
PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
LDSCRIPT := $(SRCTREE)/cpu/$(CPU)/u-boot.lds

2
board/BuS/EB+MCF-EV123/EB+MCF-EV123.c
View File

@ -156,7 +156,7 @@ int do_vcimage (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
vcimage, 2, 0, do_vcimage, vcimage, 2, 0, do_vcimage,
"loads an image to Display", "loads an image to Display",
"vcimage addr\n" "vcimage addr"
); );
/* EOF EB+MCF-EV123c */ /* EOF EB+MCF-EV123c */

19
board/Marvell/common/i2c.c
View File

@ -26,6 +26,7 @@
#include <common.h> #include <common.h>
#include <mpc8xx.h> #include <mpc8xx.h>
#include <malloc.h> #include <malloc.h>
#include <i2c.h>
#include "../include/mv_gen_reg.h" #include "../include/mv_gen_reg.h"
#include "../include/core.h" #include "../include/core.h"
@ -42,7 +43,7 @@
/* Assuming that there is only one master on the bus (us) */ /* Assuming that there is only one master on the bus (us) */
static void i2c_init (int speed, int slaveaddr) void i2c_init (int speed, int slaveaddr)
{ {
unsigned int n, m, freq, margin, power; unsigned int n, m, freq, margin, power;
unsigned int actualN = 0, actualM = 0; unsigned int actualN = 0, actualM = 0;
@ -367,7 +368,7 @@ i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
return 0; /* sucessful completion */ return 0; /* sucessful completion */
} }
uchar int
i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
int len) int len)
{ {
@ -376,7 +377,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
DP (puts ("i2c_read\n")); DP (puts ("i2c_read\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */ /* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start (); status = i2c_start ();
@ -396,7 +398,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
return status; return status;
} }
i2c_init (i2cFreq, 0); /* set the i2c frequency again */ /* set the i2c frequency again */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start (); status = i2c_start ();
if (status) { if (status) {
@ -442,7 +445,7 @@ void i2c_stop (void)
/* */ /* */
/* returns 0 = succesful */ /* returns 0 = succesful */
/* anything but zero is failure */ /* anything but zero is failure */
uchar int
i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data, i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
int len) int len)
{ {
@ -451,7 +454,8 @@ i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
DP (puts ("i2c_write\n")); DP (puts ("i2c_write\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */ /* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start (); /* send a start bit */ status = i2c_start (); /* send a start bit */
@ -504,7 +508,8 @@ int i2c_probe (uchar chip)
DP (puts ("i2c_probe\n")); DP (puts ("i2c_probe\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */ /* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start (); /* send a start bit */ status = i2c_start (); /* send a start bit */

2
board/actux1/config.mk
View File

@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000
# include NPE ethernet driver # include NPE ethernet driver
BOARDLIBS = cpu/ixp/npe/libnpe.a BOARDLIBS = cpu/ixp/npe/libnpe.a
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

2
board/actux2/config.mk
View File

@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000
# include NPE ethernet driver # include NPE ethernet driver
BOARDLIBS = cpu/ixp/npe/libnpe.a BOARDLIBS = cpu/ixp/npe/libnpe.a
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

2
board/actux3/config.mk
View File

@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000
# include NPE ethernet driver # include NPE ethernet driver
BOARDLIBS = cpu/ixp/npe/libnpe.a BOARDLIBS = cpu/ixp/npe/libnpe.a
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

66
board/actux4/u-boot.lds
View File

@ -1,66 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT ("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
OUTPUT_ARCH (arm)
ENTRY (_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN (4);
.text : {
cpu/ixp/start.o(.text)
*(.text)
}
. = ALIGN (4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
. = ALIGN (4);
.data : {
*(.data)
}
. = ALIGN (4);
.got : {
*(.got)
}
. =.;
__u_boot_cmd_start =.;
.u_boot_cmd : {
*(.u_boot_cmd)
}
__u_boot_cmd_end =.;
. = ALIGN (4);
__bss_start =.;
.bss (NOLOAD): {
*(.bss)
. = ALIGN(4);
}
_end =.;
}

432
board/ads5121/ads5121.c
View File

@ -1,432 +0,0 @@
/*
* (C) Copyright 2007 DENX Software Engineering
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <mpc512x.h>
#include <asm/bitops.h>
#include <command.h>
#include <asm/processor.h>
#include <fdt_support.h>
#ifdef CONFIG_MISC_INIT_R
#include <i2c.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
/* Clocks in use */
#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
CLOCK_SCCR1_LPC_EN | \
CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
CLOCK_SCCR1_PSCFIFO_EN | \
CLOCK_SCCR1_DDR_EN | \
CLOCK_SCCR1_FEC_EN | \
CLOCK_SCCR1_PATA_EN | \
CLOCK_SCCR1_PCI_EN | \
CLOCK_SCCR1_TPR_EN)
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
CLOCK_SCCR2_SPDIF_EN | \
CLOCK_SCCR2_DIU_EN | \
CLOCK_SCCR2_I2C_EN)
#define CSAW_START(start) ((start) & 0xFFFF0000)
#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16)
long int fixed_sdram(void);
int board_early_init_f (void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
u32 lpcaw;
/*
* Initialize Local Window for the CPLD registers access (CS2 selects
* the CPLD chip)
*/
im->sysconf.lpcs2aw = CSAW_START(CONFIG_SYS_CPLD_BASE) |
CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE);
im->lpc.cs_cfg[2] = CONFIG_SYS_CS2_CFG;
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
lpcaw = im->sysconf.lpcs2aw;
__asm__ __volatile__ ("isync");
/*
* Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
*
* Without this the flash identification routine fails, as it needs to issue
* write commands in order to establish the device ID.
*/
#ifdef CONFIG_ADS5121_REV2
*((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0xC1;
#else
if (*((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) {
*((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0xC1;
} else {
/* running from Backup flash */
*((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0x32;
}
#endif
/*
* Configure Flash Speed
*/
*((volatile u32 *)(CONFIG_SYS_IMMR + LPC_OFFSET + CS0_CONFIG)) = CONFIG_SYS_CS0_CFG;
if (SVR_MJREV (im->sysconf.spridr) >= 2) {
*((volatile u32 *)(CONFIG_SYS_IMMR + LPC_OFFSET + CS_ALE_TIMING_CONFIG)) = CONFIG_SYS_CS_ALETIMING;
}
/*
* Enable clocks
*/
im->clk.sccr[0] = SCCR1_CLOCKS_EN;
im->clk.sccr[1] = SCCR2_CLOCKS_EN;
#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
im->clk.sccr[1] |= CLOCK_SCCR2_IIM_EN;
#endif
return 0;
}
phys_size_t initdram (int board_type)
{
u32 msize = 0;
msize = fixed_sdram ();
return msize;
}
/*
* fixed sdram init -- the board doesn't use memory modules that have serial presence
* detect or similar mechanism for discovery of the DRAM settings
*/
long int fixed_sdram (void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
u32 msize_log2 = __ilog2 (msize);
u32 i;
/* Initialize IO Control */
im->io_ctrl.regs[IOCTL_MEM/4] = IOCTRL_MUX_DDR;
/* Initialize DDR Local Window */
im->sysconf.ddrlaw.bar = CONFIG_SYS_DDR_BASE & 0xFFFFF000;
im->sysconf.ddrlaw.ar = msize_log2 - 1;
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
i = im->sysconf.ddrlaw.ar;
__asm__ __volatile__ ("isync");
/* Enable DDR */
im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG_EN;
/* Initialize DDR Priority Manager */
im->mddrc.prioman_config1 = CONFIG_SYS_MDDRCGRP_PM_CFG1;
im->mddrc.prioman_config2 = CONFIG_SYS_MDDRCGRP_PM_CFG2;
im->mddrc.hiprio_config = CONFIG_SYS_MDDRCGRP_HIPRIO_CFG;
im->mddrc.lut_table0_main_upper = CONFIG_SYS_MDDRCGRP_LUT0_MU;
im->mddrc.lut_table0_main_lower = CONFIG_SYS_MDDRCGRP_LUT0_ML;
im->mddrc.lut_table1_main_upper = CONFIG_SYS_MDDRCGRP_LUT1_MU;
im->mddrc.lut_table1_main_lower = CONFIG_SYS_MDDRCGRP_LUT1_ML;
im->mddrc.lut_table2_main_upper = CONFIG_SYS_MDDRCGRP_LUT2_MU;
im->mddrc.lut_table2_main_lower = CONFIG_SYS_MDDRCGRP_LUT2_ML;
im->mddrc.lut_table3_main_upper = CONFIG_SYS_MDDRCGRP_LUT3_MU;
im->mddrc.lut_table3_main_lower = CONFIG_SYS_MDDRCGRP_LUT3_ML;
im->mddrc.lut_table4_main_upper = CONFIG_SYS_MDDRCGRP_LUT4_MU;
im->mddrc.lut_table4_main_lower = CONFIG_SYS_MDDRCGRP_LUT4_ML;
im->mddrc.lut_table0_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT0_AU;
im->mddrc.lut_table0_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT0_AL;
im->mddrc.lut_table1_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT1_AU;
im->mddrc.lut_table1_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT1_AL;
im->mddrc.lut_table2_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT2_AU;
im->mddrc.lut_table2_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT2_AL;
im->mddrc.lut_table3_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT3_AU;
im->mddrc.lut_table3_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT3_AL;
im->mddrc.lut_table4_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT4_AU;
im->mddrc.lut_table4_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT4_AL;
/* Initialize MDDRC */
im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG;
im->mddrc.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0;
im->mddrc.ddr_time_config1 = CONFIG_SYS_MDDRC_TIME_CFG1;
im->mddrc.ddr_time_config2 = CONFIG_SYS_MDDRC_TIME_CFG2;
/* Initialize DDR */
for (i = 0; i < 10; i++)
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM2;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM2;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM3;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EN_DLL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_OCD_DEFAULT;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
/* Start MDDRC */
im->mddrc.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0_RUN;
im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG_RUN;
return msize;
}
int misc_init_r(void)
{
u8 tmp_val;
extern int ads5121_diu_init(void);
/* Using this for DIU init before the driver in linux takes over
* Enable the TFP410 Encoder (I2C address 0x38)
*/
i2c_set_bus_num(2);
tmp_val = 0xBF;
i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
/* Verify if enabled */
tmp_val = 0;
i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
tmp_val = 0x10;
i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
/* Verify if enabled */
tmp_val = 0;
i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
#ifdef CONFIG_FSL_DIU_FB
#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
ads5121_diu_init();
#endif
#endif
return 0;
}
static iopin_t ioregs_init[] = {
/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
{
IOCTL_SPDIF_TXCLK, 3, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* Set highest Slew on 9 PATA pins */
{
IOCTL_PATA_CE1, 9, 1,
IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC1=FEC_COL Sets Next 15 to FEC pads */
{
IOCTL_PSC0_0, 15, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC1=SPDIF_TXCLK */
{
IOCTL_LPC_CS1, 1, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
{
IOCTL_I2C1_SCL, 2, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=DIU CLK */
{
IOCTL_PSC6_0, 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=DIU_HSYNC */
{
IOCTL_PSC6_1, 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
{
IOCTL_PSC6_4, 26, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
}
};
static iopin_t rev2_silicon_pci_ioregs_init[] = {
/* FUNC0=PCI Sets next 54 to PCI pads */
{
IOCTL_PCI_AD31, 54, 0,
IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_DS(0)
}
};
int checkboard (void)
{
ushort brd_rev = *(vu_short *) (CONFIG_SYS_CPLD_BASE + 0x00);
uchar cpld_rev = *(vu_char *) (CONFIG_SYS_CPLD_BASE + 0x02);
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
brd_rev, cpld_rev);
/* initialize function mux & slew rate IO inter alia on IO Pins */
iopin_initialize(ioregs_init, sizeof(ioregs_init) / sizeof(ioregs_init[0]));
if (SVR_MJREV (im->sysconf.spridr) >= 2) {
iopin_initialize(rev2_silicon_pci_ioregs_init, 1);
}
return 0;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("init_ide_reset\n");
/*
* Clear the reset bit to reset the interface
* cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
*/
immr->pata.pata_ata_control = 0;
udelay(100);
/* Assert the reset bit to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
void ide_set_reset (int idereset)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("ide_set_reset(%d)\n", idereset);
if (idereset) {
immr->pata.pata_ata_control = 0;
udelay(100);
} else {
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
}
#define CALC_TIMING(t) (t + period - 1) / period
int ide_preinit (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
long t;
const struct {
short t0;
short t1;
short t2_8;
short t2_16;
short t2i;
short t4;
short t9;
short tA;
} pio_specs = {
.t0 = 600,
.t1 = 70,
.t2_8 = 290,
.t2_16 = 165,
.t2i = 0,
.t4 = 30,
.t9 = 20,
.tA = 50,
};
union {
u32 config;
struct {
u8 field1;
u8 field2;
u8 field3;
u8 field4;
}bytes;
}cfg;
debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
(u32)&immr->pata);
/* Set the reset bit to 1 to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
/* Init timings : we use PIO mode 0 timings */
t = 1000000000 / gd->ips_clk; /* period in ns */
cfg.bytes.field1 = 3;
cfg.bytes.field2 = 3;
cfg.bytes.field3 = (pio_specs.t1 + t) / t;
cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
immr->pata.pata_time1 = cfg.config;
cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
cfg.bytes.field3 = 1;
cfg.bytes.field4 = (pio_specs.t4 + t) / t;
immr->pata.pata_time2 = cfg.config;
cfg.config = immr->pata.pata_time3;
cfg.bytes.field1 = (pio_specs.t9 + t) / t;
immr->pata.pata_time3 = cfg.config;
debug ("PATA preinit complete.\n");
return 0;
}
#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */

2
board/amcc/acadia/cmd_acadia.c
View File

@ -97,5 +97,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
bootstrap, 3, 0, do_bootstrap, bootstrap, 3, 0, do_bootstrap,
"program the I2C bootstrap EEPROM", "program the I2C bootstrap EEPROM",
"<cpu-freq> <nor|nand> - program the I2C bootstrap EEPROM\n" "<cpu-freq> <nor|nand> - program the I2C bootstrap EEPROM"
); );

2
board/amcc/canyonlands/bootstrap.c
View File

@ -191,5 +191,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
bootstrap, 2, 0, do_bootstrap, bootstrap, 2, 0, do_bootstrap,
"program the I2C bootstrap EEPROM", "program the I2C bootstrap EEPROM",
"<nand|nor> - strap to boot from NAND or NOR flash\n" "<nand|nor> - strap to boot from NAND or NOR flash"
); );

2
board/amcc/katmai/cmd_katmai.c
View File

@ -214,5 +214,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
bootstrap, 3, 1, do_bootstrap, bootstrap, 3, 1, do_bootstrap,
"program the serial device strap", "program the serial device strap",
"wrclk [prom0|prom1] - program the serial device strap\n" "wrclk [prom0|prom1] - program the serial device strap"
); );

2
board/amcc/kilauea/cmd_pll.c
View File

@ -291,7 +291,7 @@ U_BOOT_CMD(
RCONF: Read current eeprom configuration. \n\ RCONF: Read current eeprom configuration. \n\
-----------------------------------------------\n\ -----------------------------------------------\n\
WTEST: Test EEPROM write with predefined values\n\ WTEST: Test EEPROM write with predefined values\n\
-----------------------------------------------\n" -----------------------------------------------"
); );
#endif /* CONFIG_CMD_EEPROM */ #endif /* CONFIG_CMD_EEPROM */

2
board/amcc/luan/luan.c
View File

@ -331,5 +331,5 @@ U_BOOT_CMD(
l2cache, 2, 1, do_l2cache, l2cache, 2, 1, do_l2cache,
"enable or disable L2 cache", "enable or disable L2 cache",
"[on, off]\n" "[on, off]\n"
" - enable or disable L2 cache\n" " - enable or disable L2 cache"
); );

2
board/amcc/makalu/cmd_pll.c
View File

@ -291,7 +291,7 @@ U_BOOT_CMD(
RCONF: Read current eeprom configuration. \n\ RCONF: Read current eeprom configuration. \n\
-----------------------------------------------\n\ -----------------------------------------------\n\
WTEST: Test EEPROM write with predefined values\n\ WTEST: Test EEPROM write with predefined values\n\
-----------------------------------------------\n" -----------------------------------------------"
); );
#endif /* CONFIG_CMD_EEPROM */ #endif /* CONFIG_CMD_EEPROM */

2
board/amcc/sequoia/cmd_sequoia.c
View File

@ -227,5 +227,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
bootstrap, 2, 0, do_bootstrap, bootstrap, 2, 0, do_bootstrap,
"program the I2C bootstrap EEPROM", "program the I2C bootstrap EEPROM",
"<nand|nor> - strap to boot from NAND or NOR flash\n" "<nand|nor> - strap to boot from NAND or NOR flash"
); );

7
board/amcc/sequoia/init.S
View File

@ -43,12 +43,19 @@ tlbtab:
/* vxWorks needs this as first entry for the Machine Check interrupt */ /* vxWorks needs this as first entry for the Machine Check interrupt */
tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
/*
* The RAM-boot version skips the SDRAM TLB (identified by EPN=0). This
* entry is already configured for SDRAM via the JTAG debugger and mustn't
* be re-initialized by this RAM-booting U-Boot version.
*/
#ifndef CONFIG_SYS_RAMBOOT
/* TLB-entry for DDR SDRAM (Up to 2GB) */ /* TLB-entry for DDR SDRAM (Up to 2GB) */
#ifdef CONFIG_4xx_DCACHE #ifdef CONFIG_4xx_DCACHE
tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G) tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G)
#else #else
tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
#endif #endif
#endif /* CONFIG_SYS_RAMBOOT */
/* TLB-entry for EBC */ /* TLB-entry for EBC */
tlbentry( CONFIG_SYS_BCSR_BASE, SZ_256M, CONFIG_SYS_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) tlbentry( CONFIG_SYS_BCSR_BASE, SZ_256M, CONFIG_SYS_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I )

3
board/amcc/sequoia/sdram.c
View File

@ -54,7 +54,8 @@ extern void denali_core_search_data_eye(void);
************************************************************************/ ************************************************************************/
phys_size_t initdram (int board_type) phys_size_t initdram (int board_type)
{ {
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) #if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)) || \
defined(CONFIG_NAND_SPL)
ulong speed = get_bus_freq(0); ulong speed = get_bus_freq(0);
mtsdram(DDR0_02, 0x00000000); mtsdram(DDR0_02, 0x00000000);

10
board/amcc/sequoia/sequoia.c
View File

@ -33,7 +33,9 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SYS_NO_FLASH)
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
#endif
extern void __ft_board_setup(void *blob, bd_t *bd); extern void __ft_board_setup(void *blob, bd_t *bd);
ulong flash_get_size(ulong base, int banknum); ulong flash_get_size(ulong base, int banknum);
@ -122,16 +124,19 @@ int board_early_init_f(void)
int misc_init_r(void) int misc_init_r(void)
{ {
#if !defined(CONFIG_SYS_NO_FLASH)
uint pbcr; uint pbcr;
int size_val = 0; int size_val = 0;
u32 reg; #endif
#ifdef CONFIG_440EPX #ifdef CONFIG_440EPX
unsigned long usb2d0cr = 0; unsigned long usb2d0cr = 0;
unsigned long usb2phy0cr, usb2h0cr = 0; unsigned long usb2phy0cr, usb2h0cr = 0;
unsigned long sdr0_pfc1; unsigned long sdr0_pfc1;
char *act = getenv("usbact"); char *act = getenv("usbact");
#endif #endif
u32 reg;
#if !defined(CONFIG_SYS_NO_FLASH)
/* Re-do flash sizing to get full correct info */ /* Re-do flash sizing to get full correct info */
/* adjust flash start and offset */ /* adjust flash start and offset */
@ -171,6 +176,7 @@ int misc_init_r(void)
CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1, CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
&flash_info[0]); &flash_info[0]);
#endif #endif
#endif /* CONFIG_SYS_NO_FLASH */
/* /*
* USB suff... * USB suff...
@ -515,7 +521,7 @@ int post_hotkeys_pressed(void)
} }
#endif /* CONFIG_POST */ #endif /* CONFIG_POST */
#if defined(CONFIG_NAND_U_BOOT) #if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)
/* /*
* On NAND-booting sequoia, we need to patch the chips select numbers * On NAND-booting sequoia, we need to patch the chips select numbers
* in the dtb (CS0 - NAND, CS3 - NOR) * in the dtb (CS0 - NAND, CS3 - NOR)

126
board/amcc/sequoia/u-boot-ram.lds Normal file
View File

@ -0,0 +1,126 @@
/*
* (C) Copyright 2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

8
board/amcc/taihu/lcd.c
View File

@ -233,19 +233,19 @@ static int do_lcd_cur (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
lcd_cls, 1, 1, do_lcd_clear, lcd_cls, 1, 1, do_lcd_clear,
"lcd clear display", "lcd clear display",
NULL ""
); );
U_BOOT_CMD( U_BOOT_CMD(
lcd_puts, 2, 1, do_lcd_puts, lcd_puts, 2, 1, do_lcd_puts,
"display string on lcd", "display string on lcd",
"<string> - <string> to be displayed\n" "<string> - <string> to be displayed"
); );
U_BOOT_CMD( U_BOOT_CMD(
lcd_putc, 2, 1, do_lcd_putc, lcd_putc, 2, 1, do_lcd_putc,
"display char on lcd", "display char on lcd",
"<char> - <char> to be displayed\n" "<char> - <char> to be displayed"
); );
U_BOOT_CMD( U_BOOT_CMD(
@ -253,5 +253,5 @@ U_BOOT_CMD(
"shift cursor on lcd", "shift cursor on lcd",
"<count> <dir> - shift cursor on lcd <count> times, direction is <dir> \n" "<count> <dir> - shift cursor on lcd <count> times, direction is <dir> \n"
" <count> - 0..31\n" " <count> - 0..31\n"
" <dir> - 0=backward 1=forward\n" " <dir> - 0=backward 1=forward"
); );

4
board/amcc/taihu/taihu.c
View File

@ -94,7 +94,7 @@ static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
U_BOOT_CMD ( U_BOOT_CMD (
sw2_stat, 1, 1, do_sw_stat, sw2_stat, 1, 1, do_sw_stat,
"show status of switch 2", "show status of switch 2",
NULL ""
); );
static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[]) static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
@ -134,7 +134,7 @@ U_BOOT_CMD (
led_ctl, 3, 1, do_led_ctl, led_ctl, 3, 1, do_led_ctl,
"make led 1 or 2 on or off", "make led 1 or 2 on or off",
"<led_no> <on/off> - make led <led_no> on/off,\n" "<led_no> <on/off> - make led <led_no> on/off,\n"
"\tled_no is 1 or 2\t" "\tled_no is 1 or 2"
); );
#define SPI_CS_GPIO0 0 #define SPI_CS_GPIO0 0

2
board/amcc/taihu/update.c
View File

@ -128,5 +128,5 @@ static int update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char *argv[]
U_BOOT_CMD ( U_BOOT_CMD (
update_boot_eeprom, 1, 1, update_boot_eeprom, update_boot_eeprom, 1, 1, update_boot_eeprom,
"update boot eeprom content", "update boot eeprom content",
NULL ""
); );

14
board/amcc/taishan/lcd.c
View File

@ -254,18 +254,18 @@ static int do_lcd_cur(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
return 0; return 0;
} }
U_BOOT_CMD(lcd_test, 1, 1, do_lcd_test, "lcd test display", NULL); U_BOOT_CMD(lcd_test, 1, 1, do_lcd_test, "lcd test display", "");
U_BOOT_CMD(lcd_cls, 1, 1, do_lcd_clear, "lcd clear display", NULL); U_BOOT_CMD(lcd_cls, 1, 1, do_lcd_clear, "lcd clear display", "");
U_BOOT_CMD(lcd_puts, 2, 1, do_lcd_puts, U_BOOT_CMD(lcd_puts, 2, 1, do_lcd_puts,
"display string on lcd", "display string on lcd",
"<string> - <string> to be displayed\n"); "<string> - <string> to be displayed");
U_BOOT_CMD(lcd_putc, 2, 1, do_lcd_putc, U_BOOT_CMD(lcd_putc, 2, 1, do_lcd_putc,
"display char on lcd", "display char on lcd",
"<char> - <char> to be displayed\n"); "<char> - <char> to be displayed");
U_BOOT_CMD(lcd_cur, 3, 1, do_lcd_cur, U_BOOT_CMD(lcd_cur, 3, 1, do_lcd_cur,
"shift cursor on lcd", "shift cursor on lcd",
"<count> <dir>- shift cursor on lcd <count> times, direction is <dir> \n" "<count> <dir>- shift cursor on lcd <count> times, direction is <dir> \n"
" <count> - 0~31\n" " <dir> - 0,backward; 1, forward\n"); " <count> - 0~31\n" " <dir> - 0,backward; 1, forward");
#if 0 /* test-only */ #if 0 /* test-only */
void set_phy_loopback_mode(void) void set_phy_loopback_mode(void)
@ -373,8 +373,8 @@ static int do_led_test_on(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
} }
U_BOOT_CMD(ledon, 1, 1, do_led_test_on, U_BOOT_CMD(ledon, 1, 1, do_led_test_on,
"led test light on", NULL); "led test light on", "");
U_BOOT_CMD(ledoff, 1, 1, do_led_test_off, U_BOOT_CMD(ledoff, 1, 1, do_led_test_off,
"led test light off", NULL); "led test light off", "");
#endif #endif

6
board/amcc/taishan/showinfo.c
View File

@ -168,7 +168,7 @@ int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
} }
U_BOOT_CMD(xbriinfo, 1, 1, do_show_xbridge_info, U_BOOT_CMD(xbriinfo, 1, 1, do_show_xbridge_info,
"Show PCIX bridge info", NULL); "Show PCIX bridge info", "");
#define TAISHAN_PCI_DEV_ID0 0x800 #define TAISHAN_PCI_DEV_ID0 0x800
#define TAISHAN_PCI_DEV_ID1 0x1000 #define TAISHAN_PCI_DEV_ID1 0x1000
@ -222,7 +222,7 @@ int do_show_pcix_device_info(cmd_tbl_t * cmdtp, int flag, int argc,
} }
U_BOOT_CMD(xdevinfo, 1, 1, do_show_pcix_device_info, U_BOOT_CMD(xdevinfo, 1, 1, do_show_pcix_device_info,
"Show PCIX Device info", NULL); "Show PCIX Device info", "");
extern void show_reset_reg(void); extern void show_reset_reg(void);
@ -233,4 +233,4 @@ int do_show_reset_reg_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
} }
U_BOOT_CMD(resetinfo, 1, 1, do_show_reset_reg_info, U_BOOT_CMD(resetinfo, 1, 1, do_show_reset_reg_info,
"Show Reset REG info", NULL); "Show Reset REG info", "");

2
board/amcc/taishan/update.c
View File

@ -74,5 +74,5 @@ int do_update_boot_eeprom(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
} }
U_BOOT_CMD(update_boot_eeprom, 1, 1, do_update_boot_eeprom, U_BOOT_CMD(update_boot_eeprom, 1, 1, do_update_boot_eeprom,
"update bootstrap eeprom content", NULL); "update bootstrap eeprom content", "");
#endif #endif

2
board/amcc/yucca/cmd_yucca.c
View File

@ -282,5 +282,5 @@ static int setBootStrapClock(cmd_tbl_t *cmdtp, int incrflag, int flag,
U_BOOT_CMD( U_BOOT_CMD(
evb440spe, 3, 1, do_evb440spe, evb440spe, 3, 1, do_evb440spe,
"program the serial device strap", "program the serial device strap",
"wrclk [prom0|prom1] - program the serial device strap\n" "wrclk [prom0|prom1] - program the serial device strap"
); );

10
board/amirix/ap1000/ap1000.c
View File

@ -670,14 +670,14 @@ U_BOOT_CMD (temp, 6, 0, do_temp_sensor,
" - Set config options.\n" " - Set config options.\n"
"\n" "\n"
"All values can be decimal or hex (hex preceded with 0x).\n" "All values can be decimal or hex (hex preceded with 0x).\n"
"Only whole numbers are supported for external limits.\n"); "Only whole numbers are supported for external limits.");
#if 0 #if 0
U_BOOT_CMD (loadace, 2, 0, do_loadace, U_BOOT_CMD (loadace, 2, 0, do_loadace,
"load fpga configuration from System ACE compact flash", "load fpga configuration from System ACE compact flash",
"N\n" "N\n"
" - Load configuration N (0-7) from System ACE compact flash\n" " - Load configuration N (0-7) from System ACE compact flash\n"
"loadace\n" " - loads default configuration\n"); "loadace\n" " - loads default configuration");
#endif #endif
U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte, U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte,
@ -685,19 +685,19 @@ U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte,
"N [ADDRESS]\n" "N [ADDRESS]\n"
" - set software configuration byte to N, optionally use ADDRESS as\n" " - set software configuration byte to N, optionally use ADDRESS as\n"
" location of buffer for flash copy\n" " location of buffer for flash copy\n"
"swconfig\n" " - display software configuration byte\n"); "swconfig\n" " - display software configuration byte");
U_BOOT_CMD (pause, 2, 0, do_pause, U_BOOT_CMD (pause, 2, 0, do_pause,
"sleep processor until any key is pressed with poll time of N seconds", "sleep processor until any key is pressed with poll time of N seconds",
"N\n" "N\n"
" - sleep processor until any key is pressed with poll time of N seconds\n" " - sleep processor until any key is pressed with poll time of N seconds\n"
"pause\n" "pause\n"
" - sleep processor until any key is pressed with poll time of 1 second\n"); " - sleep processor until any key is pressed with poll time of 1 second");
U_BOOT_CMD (swrecon, 1, 0, do_swreconfig, U_BOOT_CMD (swrecon, 1, 0, do_swreconfig,
"trigger a board reconfigure to the software selected configuration", "trigger a board reconfigure to the software selected configuration",
"\n" "\n"
" - trigger a board reconfigure to the software selected configuration\n"); " - trigger a board reconfigure to the software selected configuration");
int board_eth_init(bd_t *bis) int board_eth_init(bd_t *bis)
{ {

2
board/amirix/ap1000/powerspan.c
View File

@ -487,7 +487,7 @@ U_BOOT_CMD (eeprom, 4, 0, do_eeprom,
" - store contents of eeprom at address ADD\n" " - store contents of eeprom at address ADD\n"
"eeprom p ADD\n" "eeprom p ADD\n"
" - put data stored at address ADD into the eeprom\n" " - put data stored at address ADD into the eeprom\n"
"eeprom d\n" " - return eeprom to default contents\n"); "eeprom d\n" " - return eeprom to default contents");
unsigned int PowerSpanRead (unsigned int theOffset) unsigned int PowerSpanRead (unsigned int theOffset)
{ {

55
board/armadillo/u-boot.lds
View File

@ -1,55 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm720t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

6
board/armltd/integratorap/config.mk
View File

@ -3,9 +3,3 @@
# #
TEXT_BASE = 0x01000000 TEXT_BASE = 0x01000000
ifneq ($(OBJTREE),$(SRCTREE))
# We are building u-boot in a separate directory, use generated
# .lds script from OBJTREE directory.
LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds
endif

2
board/armltd/integratorap/integratorap.c
View File

@ -540,7 +540,7 @@ static ulong div_timer = 1; /* Divisor to convert timer reading
* - the Integrator/AP timer issues an interrupt * - the Integrator/AP timer issues an interrupt
* each time it reaches zero * each time it reaches zero
*/ */
int interrupt_init (void) int timer_init (void)
{ {
/* Load timer with initial value */ /* Load timer with initial value */
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL;

4
board/armltd/integratorap/split_by_variant.sh
View File

@ -120,10 +120,6 @@ mkdir -p ${obj}include
mkdir -p ${obj}board/armltd/integratorap mkdir -p ${obj}board/armltd/integratorap
mv tmp.fil ${obj}include/config.h mv tmp.fil ${obj}include/config.h
# --------------------------------------------------------- # ---------------------------------------------------------
# Ensure correct core object loaded first in U-Boot image
# ---------------------------------------------------------
sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' ${src}board/armltd/integratorap/u-boot.lds.template > ${obj}board/armltd/integratorap/u-boot.lds
# ---------------------------------------------------------
# Complete the configuration # Complete the configuration
# --------------------------------------------------------- # ---------------------------------------------------------
$MKCONFIG -a integratorap arm $cpu integratorap armltd; $MKCONFIG -a integratorap arm $cpu integratorap armltd;

53
board/armltd/integratorap/u-boot.lds.template
View File

@ -1,53 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
# Template used during configuration to emsure the core module processor code,
# from CPU_FILE, is placed at the start of the image */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
CPU_FILE (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

6
board/armltd/integratorcp/config.mk
View File

@ -3,9 +3,3 @@
# #
TEXT_BASE = 0x01000000 TEXT_BASE = 0x01000000
ifneq ($(OBJTREE),$(SRCTREE))
# We are building u-boot in a separate directory, use generated
# .lds script from OBJTREE directory.
LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds
endif

2
board/armltd/integratorcp/integratorcp.c
View File

@ -163,7 +163,7 @@ static ulong timestamp; /* U-Boot ticks since startup */
/* starts up a counter /* starts up a counter
* - the Integrator/CP timer can be set up to issue an interrupt */ * - the Integrator/CP timer can be set up to issue an interrupt */
int interrupt_init (void) int timer_init (void)
{ {
/* Load timer with initial value */ /* Load timer with initial value */
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL;

4
board/armltd/integratorcp/split_by_variant.sh
View File

@ -103,10 +103,6 @@ mkdir -p ${obj}include
mkdir -p ${obj}board/armltd/integratorcp mkdir -p ${obj}board/armltd/integratorcp
mv tmp.fil ${obj}include/config.h mv tmp.fil ${obj}include/config.h
# --------------------------------------------------------- # ---------------------------------------------------------
# Ensure correct core object loaded first in U-Boot image
# ---------------------------------------------------------
sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' ${src}board/armltd/integratorcp/u-boot.lds.template > ${obj}board/armltd/integratorcp/u-boot.lds
# ---------------------------------------------------------
# Complete the configuration # Complete the configuration
# --------------------------------------------------------- # ---------------------------------------------------------
$MKCONFIG -a integratorcp arm $cpu integratorcp armltd; $MKCONFIG -a integratorcp arm $cpu integratorcp armltd;

53
board/armltd/integratorcp/u-boot.lds.template
View File

@ -1,53 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
# Template used during configuration to emsure the core module processor code,
# from CPU_FILE, is placed at the start of the image */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
CPU_FILE (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

51
board/armltd/versatile/u-boot.lds
View File

@ -1,51 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

1
board/atmel/at91cap9adk/at91cap9adk.c
View File

@ -61,7 +61,6 @@ static void at91cap9_slowclock_hw_init(void)
if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) { if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) {
unsigned i, tmp = at91_sys_read(AT91_SCKCR); unsigned i, tmp = at91_sys_read(AT91_SCKCR);
if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) { if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) {
extern void timer_init(void);
timer_init(); timer_init();
tmp |= AT91CAP9_SCKCR_OSC32EN; tmp |= AT91CAP9_SCKCR_OSC32EN;
at91_sys_write(AT91_SCKCR, tmp); at91_sys_write(AT91_SCKCR, tmp);

57
board/atmel/at91rm9200dk/u-boot.lds
View File

@ -1,57 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm920t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

56
board/atmel/at91rm9200ek/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm920t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

6
board/barco/barco.c
View File

@ -307,19 +307,19 @@ int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD ( U_BOOT_CMD (
try_working, 1, 1, barcobcd_boot_image, try_working, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image", "check flash value and boot the appropriate image",
"\n" ""
); );
U_BOOT_CMD ( U_BOOT_CMD (
boot_working, 1, 1, barcobcd_boot_image, boot_working, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image", "check flash value and boot the appropriate image",
"\n" ""
); );
U_BOOT_CMD ( U_BOOT_CMD (
boot_default, 1, 1, barcobcd_boot_image, boot_default, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image", "check flash value and boot the appropriate image",
"\n" ""
); );
/* /*
* We are not using serial communication, so just provide empty functions * We are not using serial communication, so just provide empty functions

15
board/bc3450/cmd_bc3450.c
View File

@ -198,7 +198,7 @@ U_BOOT_CMD (dip, 1, 1, cmd_dip,
"\n" "\n"
" - prints the state of the dip switch and/or\n" " - prints the state of the dip switch and/or\n"
" external configuration inputs as hex value.\n" " external configuration inputs as hex value.\n"
" - \"Config 1\" is the LSB\n"); " - \"Config 1\" is the LSB");
/* /*
@ -229,7 +229,7 @@ static int cmd_buz (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD (buz, 2, 1, cmd_buz, U_BOOT_CMD (buz, 2, 1, cmd_buz,
"turns buzzer on/off", "turns buzzer on/off",
"\n" "buz <on/off>\n" " - turns the buzzer on or off\n"); "\n" "buz <on/off>\n" " - turns the buzzer on or off");
#endif /* CONFIG_BC3450_BUZZER */ #endif /* CONFIG_BC3450_BUZZER */
@ -326,14 +326,14 @@ U_BOOT_CMD (fp, 3, 1, cmd_fp,
"\n" "\n"
"fp bl <on/off>\n" "fp bl <on/off>\n"
" - turns the CCFL backlight of the display on/off\n" " - turns the CCFL backlight of the display on/off\n"
"fp <on/off>\n" " - turns the whole display on/off\n" "fp <on/off>\n" " - turns the whole display on/off"
#ifdef CONFIG_BC3450_CRT #ifdef CONFIG_BC3450_CRT
"\n"
"fp crt <on/off>\n" "fp crt <on/off>\n"
" - enables/disables the crt output (debug only)\n" " - enables/disables the crt output (debug only)"
#endif /* CONFIG_BC3450_CRT */ #endif /* CONFIG_BC3450_CRT */
); );
/* /*
* temp - DS1620 thermometer * temp - DS1620 thermometer
*/ */
@ -524,7 +524,7 @@ static int cmd_temp (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD (temp, 3, 1, cmd_temp, U_BOOT_CMD (temp, 3, 1, cmd_temp,
"print current temperature", "print current temperature",
"\n" "temp\n" " - print current temperature\n"); "\n" "temp\n" " - print current temperature");
#ifdef CONFIG_BC3450_CAN #ifdef CONFIG_BC3450_CAN
/* /*
@ -823,5 +823,6 @@ U_BOOT_CMD (test, 2, 1, cmd_test, "unit test routines", "\n"
#endif /* CONFIG_BC3450_CAN */ #endif /* CONFIG_BC3450_CAN */
"test unit-off\n" "test unit-off\n"
" - turns off the BC3450 unit\n" " - turns off the BC3450 unit\n"
" WARNING: Unsaved environment variables will be lost!\n"); " WARNING: Unsaved environment variables will be lost!"
);
#endif #endif

4
board/bf537-stamp/cmd_bf537led.c
View File

@ -33,7 +33,7 @@
"led <number> <action>\n" \ "led <number> <action>\n" \
" <number> - Index (0-5) of LED to change, or \"all\"\n" \ " <number> - Index (0-5) of LED to change, or \"all\"\n" \
" <action> - Must be one of:\n" \ " <action> - Must be one of:\n" \
" on off toggle\n" " on off toggle"
/* Number of LEDs supported by the board */ /* Number of LEDs supported by the board */
#define NUMBER_LEDS 6 #define NUMBER_LEDS 6
@ -191,7 +191,7 @@ void set_led_state(int index, int state)
/* Display usage information */ /* Display usage information */
void show_cmd_usage() void show_cmd_usage()
{ {
printf("Usage:\n%s", USAGE_LONG); printf("Usage:\n%s\n", USAGE_LONG);
} }
/* Register information for u-boot to find this command */ /* Register information for u-boot to find this command */

56
board/cerf250/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/pxa/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

56
board/cm41xx/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm920t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

20
board/cm5200/cmd_cm5200.c
View File

@ -29,7 +29,7 @@
#ifdef CONFIG_CMD_BSP #ifdef CONFIG_CMD_BSP
int do_i2c(char *argv[]) static int do_i2c_test(char *argv[])
{ {
unsigned char temp, temp1; unsigned char temp, temp1;
@ -57,7 +57,7 @@ int do_i2c(char *argv[])
return 0; return 0;
} }
int do_usbtest(char *argv[]) static int do_usb_test(char *argv[])
{ {
int i; int i;
static int usb_stor_curr_dev = -1; /* current device */ static int usb_stor_curr_dev = -1; /* current device */
@ -90,7 +90,7 @@ int do_usbtest(char *argv[])
return 0; return 0;
} }
int do_led(char *argv[]) static int do_led_test(char *argv[])
{ {
int i = 0; int i = 0;
struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT; struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
@ -134,7 +134,7 @@ int do_led(char *argv[])
return 0; return 0;
} }
int do_rs232(char *argv[]) static int do_rs232_test(char *argv[])
{ {
int error_status = 0; int error_status = 0;
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO; struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
@ -397,22 +397,22 @@ int do_rs232(char *argv[])
return error_status; return error_status;
} }
int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) static int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{ {
int rcode = -1; int rcode = -1;
switch (argc) { switch (argc) {
case 2: case 2:
if (strncmp(argv[1], "i2c", 3) == 0) if (strncmp(argv[1], "i2c", 3) == 0)
rcode = do_i2c(argv); rcode = do_i2c_test(argv);
else if (strncmp(argv[1], "led", 3) == 0) else if (strncmp(argv[1], "led", 3) == 0)
rcode = do_led(argv); rcode = do_led_test(argv);
else if (strncmp(argv[1], "usb", 3) == 0) else if (strncmp(argv[1], "usb", 3) == 0)
rcode = do_usbtest(argv); rcode = do_usb_test(argv);
break; break;
case 3: case 3:
if (strncmp(argv[1], "rs232", 3) == 0) if (strncmp(argv[1], "rs232", 3) == 0)
rcode = do_rs232(argv); rcode = do_rs232_test(argv);
break; break;
} }
@ -443,6 +443,6 @@ U_BOOT_CMD(
"fkt rs232 number\n" "fkt rs232 number\n"
" - Test RS232 (loopback plug(s) for RS232 required)\n" " - Test RS232 (loopback plug(s) for RS232 required)\n"
"fkt usb\n" "fkt usb\n"
" - Test USB communication\n" " - Test USB communication"
); );
#endif /* CONFIG_CMD_BSP */ #endif /* CONFIG_CMD_BSP */

57
board/cmc_pu2/u-boot.lds
View File

@ -1,57 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm920t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

56
board/cradle/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/pxa/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

56
board/csb226/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/pxa/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

56
board/csb637/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm920t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

58
board/dave/B2/u-boot.lds
View File

@ -1,58 +0,0 @@
/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/s3c44b0/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
armboot_end_data = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

50
board/davedenx/aria/Makefile Normal file
View File

@ -0,0 +1,50 @@
#
# (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y := $(BOARD).o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

316
board/davedenx/aria/aria.c Normal file
View File

@ -0,0 +1,316 @@
/*
* (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
* (C) Copyright 2009 Dave Srl www.dave.eu
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/bitops.h>
#include <command.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <fdt_support.h>
#ifdef CONFIG_MISC_INIT_R
#include <i2c.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
extern int mpc5121_diu_init(void);
extern void ide_set_reset(int idereset);
/* Clocks in use */
#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
CLOCK_SCCR1_LPC_EN | \
CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
CLOCK_SCCR1_PSCFIFO_EN | \
CLOCK_SCCR1_DDR_EN | \
CLOCK_SCCR1_FEC_EN | \
CLOCK_SCCR1_PATA_EN | \
CLOCK_SCCR1_PCI_EN | \
CLOCK_SCCR1_TPR_EN)
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
CLOCK_SCCR2_SPDIF_EN | \
CLOCK_SCCR2_DIU_EN | \
CLOCK_SCCR2_I2C_EN)
#define CSAW_START(start) ((start) & 0xFFFF0000)
#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16)
long int fixed_sdram(void);
int board_early_init_f(void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
u32 spridr;
/*
* Initialize Local Window for the On Board FPGA access
*/
out_be32(&im->sysconf.lpcs2aw,
CSAW_START(CONFIG_SYS_ARIA_FPGA_BASE) |
CSAW_STOP(CONFIG_SYS_ARIA_FPGA_BASE, CONFIG_SYS_ARIA_FPGA_SIZE)
);
out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG);
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
in_be32(&im->sysconf.lpcs2aw);
__asm__ __volatile__ ("isync");
/*
* Initialize Local Window for the On Board SRAM access
*/
out_be32(&im->sysconf.lpcs6aw,
CSAW_START(CONFIG_SYS_ARIA_SRAM_BASE) |
CSAW_STOP(CONFIG_SYS_ARIA_SRAM_BASE, CONFIG_SYS_ARIA_SRAM_SIZE)
);
out_be32(&im->lpc.cs_cfg[6], CONFIG_SYS_CS6_CFG);
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
in_be32(&im->sysconf.lpcs6aw);
__asm__ __volatile__ ("isync");
/*
* Configure Flash Speed
*/
out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG);
spridr = in_be32(&im->sysconf.spridr);
if (SVR_MJREV(spridr) >= 2)
out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING);
/*
* Enable clocks
*/
out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
#endif
return 0;
}
phys_size_t initdram (int board_type)
{
return fixed_sdram();
}
/*
* fixed sdram init:
* The board doesn't use memory modules that have serial presence
* detect or similar mechanism for discovery of the DRAM settings
*/
long int fixed_sdram (void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
u32 msize_log2 = __ilog2(msize);
u32 i;
/* Initialize IO Control */
out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR);
/* Initialize DDR Local Window */
out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000);
out_be32(&im->sysconf.ddrlaw.ar, msize_log2 - 1);
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
in_be32(&im->sysconf.ddrlaw.ar);
__asm__ __volatile__ ("isync");
/* Enable DDR */
out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_EN);
/* Initialize DDR Priority Manager */
out_be32(&im->mddrc.prioman_config1, CONFIG_SYS_MDDRCGRP_PM_CFG1);
out_be32(&im->mddrc.prioman_config2, CONFIG_SYS_MDDRCGRP_PM_CFG2);
out_be32(&im->mddrc.hiprio_config, CONFIG_SYS_MDDRCGRP_HIPRIO_CFG);
out_be32(&im->mddrc.lut_table0_main_upper, CONFIG_SYS_MDDRCGRP_LUT0_MU);
out_be32(&im->mddrc.lut_table0_main_lower, CONFIG_SYS_MDDRCGRP_LUT0_ML);
out_be32(&im->mddrc.lut_table1_main_upper, CONFIG_SYS_MDDRCGRP_LUT1_MU);
out_be32(&im->mddrc.lut_table1_main_lower, CONFIG_SYS_MDDRCGRP_LUT1_ML);
out_be32(&im->mddrc.lut_table2_main_upper, CONFIG_SYS_MDDRCGRP_LUT2_MU);
out_be32(&im->mddrc.lut_table2_main_lower, CONFIG_SYS_MDDRCGRP_LUT2_ML);
out_be32(&im->mddrc.lut_table3_main_upper, CONFIG_SYS_MDDRCGRP_LUT3_MU);
out_be32(&im->mddrc.lut_table3_main_lower, CONFIG_SYS_MDDRCGRP_LUT3_ML);
out_be32(&im->mddrc.lut_table4_main_upper, CONFIG_SYS_MDDRCGRP_LUT4_MU);
out_be32(&im->mddrc.lut_table4_main_lower, CONFIG_SYS_MDDRCGRP_LUT4_ML);
out_be32(&im->mddrc.lut_table0_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT0_AU);
out_be32(&im->mddrc.lut_table0_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT0_AL);
out_be32(&im->mddrc.lut_table1_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT1_AU);
out_be32(&im->mddrc.lut_table1_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT1_AL);
out_be32(&im->mddrc.lut_table2_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT2_AU);
out_be32(&im->mddrc.lut_table2_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT2_AL);
out_be32(&im->mddrc.lut_table3_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT3_AU);
out_be32(&im->mddrc.lut_table3_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT3_AL);
out_be32(&im->mddrc.lut_table4_alternate_upper, CONFIG_SYS_MDDRCGRP_LUT4_AU);
out_be32(&im->mddrc.lut_table4_alternate_lower, CONFIG_SYS_MDDRCGRP_LUT4_AL);
/* Initialize MDDRC */
out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG);
out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0);
out_be32(&im->mddrc.ddr_time_config1, CONFIG_SYS_MDDRC_TIME_CFG1);
out_be32(&im->mddrc.ddr_time_config2, CONFIG_SYS_MDDRC_TIME_CFG2);
/* Initialize DDR */
for (i = 0; i < 10; i++)
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM2);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EM3);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_EN_DLL);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_RFSH);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_INIT_DEV_OP);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_OCD_DEFAULT);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_PCHG_ALL);
out_be32(&im->mddrc.ddr_command, CONFIG_SYS_MICRON_NOP);
/* Start MDDRC */
out_be32(&im->mddrc.ddr_time_config0, CONFIG_SYS_MDDRC_TIME_CFG0_RUN);
out_be32(&im->mddrc.ddr_sys_config, CONFIG_SYS_MDDRC_SYS_CFG_RUN);
return msize;
}
int misc_init_r(void)
{
u32 tmp;
/* we use I2C-2 for on-board eeprom */
i2c_set_bus_num(2);
tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE);
printf("FPGA: %u-%u.%u.%u\n",
(tmp & 0xFF000000) >> 24,
(tmp & 0x00FF0000) >> 16,
(tmp & 0x0000FF00) >> 8,
tmp & 0x000000FF
);
#ifdef CONFIG_FSL_DIU_FB
# if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
mpc5121_diu_init();
# endif
#endif
return 0;
}
static iopin_t ioregs_init[] = {
/*
* FEC
*/
/* FEC on PSCx_x*/
{
offsetof(struct ioctrl512x, io_control_psc0_0), 5, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
{
offsetof(struct ioctrl512x, io_control_psc1_0), 10, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
{
offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/*
* DIU
*/
/* FUNC2=DIU CLK */
{
offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=DIU_HSYNC */
{
offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
{
offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/*
* On board SRAM
*/
/* FUNC2=/LPC CS6 */
{
offsetof(struct ioctrl512x, io_control_j1850_rx), 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
};
int checkboard (void)
{
puts("Board: ARIA\n");
/* initialize function mux & slew rate IO inter alia on IO Pins */
iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
return 0;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

23
board/davedenx/aria/config.mk Normal file
View File

@ -0,0 +1,23 @@
#
# (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
TEXT_BASE = 0xFFF00000

58
board/davedenx/qong/u-boot.lds
View File

@ -1,58 +0,0 @@
/*
* (C) Copyright 2009
* Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm1136/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

2
board/davinci/common/Makefile
View File

@ -29,7 +29,7 @@ endif
LIB = $(obj)lib$(VENDOR).a LIB = $(obj)lib$(VENDOR).a
COBJS := psc.o misc.o COBJS := misc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS)) OBJS := $(addprefix $(obj),$(COBJS))

45
board/davinci/common/misc.c
View File

@ -25,8 +25,10 @@
#include <common.h> #include <common.h>
#include <i2c.h> #include <i2c.h>
#include <net.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
int dram_init(void) int dram_init(void)
@ -37,17 +39,7 @@ int dram_init(void)
return(0); return(0);
} }
static int dv_get_pllm_output(uint32_t pllm) #ifdef CONFIG_DRIVER_TI_EMAC
{
return (pllm + 1) * (CONFIG_SYS_HZ_CLOCK / 1000000);
}
void dv_display_clk_infos(void)
{
printf("ARM Clock: %dMHz\n", dv_get_pllm_output(REG(PLL1_PLLM)) / 2);
printf("DDR Clock: %dMHz\n", dv_get_pllm_output(REG(PLL2_PLLM)) /
((REG(PLL2_DIV2) & 0x1f) + 1) / 2);
}
/* Read ethernet MAC address from EEPROM for DVEVM compatible boards. /* Read ethernet MAC address from EEPROM for DVEVM compatible boards.
* Returns 1 if found, 0 otherwise. * Returns 1 if found, 0 otherwise.
@ -60,8 +52,8 @@ int dvevm_read_mac_address(uint8_t *buf)
(uint8_t *) &buf[0], 6)) (uint8_t *) &buf[0], 6))
goto i2cerr; goto i2cerr;
/* Check that MAC address is not null. */ /* Check that MAC address is valid. */
if (memcmp(buf, "\0\0\0\0\0\0", 6) == 0) if (!is_valid_ether_addr(buf))
goto err; goto err;
return 1; /* Found */ return 1; /* Found */
@ -75,11 +67,11 @@ err:
} }
/* If there is a MAC address in the environment, and if it is not identical to /* If there is a MAC address in the environment, and if it is not identical to
* the MAC address in the ROM, then a warning is printed and the MAC address * the MAC address in the EEPROM, then a warning is printed and the MAC address
* from the environment is used. * from the environment is used.
* *
* If there is no MAC address in the environment, then it will be initialized * If there is no MAC address in the environment, then it will be initialized
* (silently) from the value in the ROM. * (silently) from the value in the EEPROM.
*/ */
void dv_configure_mac_address(uint8_t *rom_enetaddr) void dv_configure_mac_address(uint8_t *rom_enetaddr)
{ {
@ -96,31 +88,24 @@ void dv_configure_mac_address(uint8_t *rom_enetaddr)
tmp = (*end) ? end+1 : end; tmp = (*end) ? end+1 : end;
} }
/* Check if ROM and U-Boot environment MAC addresses match. */ /* Check if EEPROM and U-Boot environment MAC addresses match. */
if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
memcmp(env_enetaddr, rom_enetaddr, 6) != 0) { memcmp(env_enetaddr, rom_enetaddr, 6) != 0) {
printf("Warning: MAC addresses don't match:\n"); printf("Warning: MAC addresses don't match:\n");
printf(" ROM MAC address: %02X:%02X:%02X:%02X:%02X:%02X\n", printf(" EEPROM MAC address: %pM\n", rom_enetaddr);
rom_enetaddr[0], rom_enetaddr[1], printf(" \"ethaddr\" value: %pM\n", env_enetaddr) ;
rom_enetaddr[2], rom_enetaddr[3],
rom_enetaddr[4], rom_enetaddr[5]);
printf(" \"ethaddr\" value: %02X:%02X:%02X:%02X:%02X:%02X\n",
env_enetaddr[0], env_enetaddr[1],
env_enetaddr[2], env_enetaddr[3],
env_enetaddr[4], env_enetaddr[5]) ;
debug("### Using MAC address from environment\n"); debug("### Using MAC address from environment\n");
} }
if (!tmp) { if (!tmp) {
char ethaddr[20]; char ethaddr[20];
/* There is no MAC address in the environment, so we initialize /* There is no MAC address in the environment, so we initialize
* it from the value in the ROM. */ * it from the value in the EEPROM. */
sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", sprintf(ethaddr, "%pM", rom_enetaddr) ;
rom_enetaddr[0], rom_enetaddr[1], debug("### Setting environment from EEPROM MAC address = \"%s\"\n",
rom_enetaddr[2], rom_enetaddr[3],
rom_enetaddr[4], rom_enetaddr[5]) ;
debug("### Setting environment from ROM MAC address = \"%s\"\n",
ethaddr); ethaddr);
setenv("ethaddr", ethaddr); setenv("ethaddr", ethaddr);
} }
} }
#endif /* DAVINCI_EMAC */

2
board/davinci/common/misc.h
View File

@ -22,10 +22,8 @@
#ifndef __MISC_H #ifndef __MISC_H
#define __MISC_H #define __MISC_H
extern void timer_init(void);
extern int eth_hw_init(void); extern int eth_hw_init(void);
void dv_display_clk_infos(void);
int dvevm_read_mac_address(uint8_t *buf); int dvevm_read_mac_address(uint8_t *buf);
void dv_configure_mac_address(uint8_t *rom_enetaddr); void dv_configure_mac_address(uint8_t *rom_enetaddr);

52
board/davinci/dm355evm/Makefile Normal file
View File

@ -0,0 +1,52 @@
#
# (C) Copyright 2000, 2001, 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o
SOBJS :=
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# This is for $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

11
board/davinci/dm355evm/config.mk Normal file
View File

@ -0,0 +1,11 @@
#
# Spectrum Digital DM355 EVM board
# dm355evm board has 1 bank of 128 MB DDR RAM
# Physical Address: 8000'0000 to 8800'0000
#
# Linux Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
#
#Provide at least 16MB spacing between us and the Linux Kernel image
TEXT_BASE = 0x81080000

108
board/davinci/dm355evm/dm355evm.c Normal file
View File

@ -0,0 +1,108 @@
/*
* Copyright (C) 2009 David Brownell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <common.h>
#include <nand.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/emif_defs.h>
#include <asm/arch/nand_defs.h>
#include "../common/misc.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* With the DM355 EVM, u-boot is *always* a third stage loader,
* unless a JTAG debugger handles the first two stages:
*
* - 1st stage is ROM Boot Loader (RBL), which searches for a
* second stage loader in one of three places based on SW7:
* NAND (with MMC/SD fallback), MMC/SD, or UART.
*
* - 2nd stage is User Boot Loader (UBL), using at most 30KB
* of on-chip SRAM, responsible for lowlevel init, and for
* loading the third stage loader into DRAM.
*
* - 3rd stage, that's us!
*/
int board_init(void)
{
gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DM355_EVM;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
/* We expect the UBL to have handled "lowlevel init", which
* involves setting up at least:
* - clocks
* + PLL1 (for ARM and peripherals) and PLL2 (for DDR)
* + clock divisors for those PLLs
* + LPSC_DDR module enabled
* + LPSC_TIMER0 module (still) enabled
* - EMIF
* + DDR init and timings
* + AEMIF timings (for NAND and DM9000)
* - pinmux
*
* Some of that is repeated here, mostly as a precaution.
*/
/* AEMIF: Some "address" lines are available as GPIOs. A3..A13
* could be too if we used A12 as a GPIO during NAND chipselect
* (and Linux did too), letting us control the LED on A7/GPIO61.
*/
REG(PINMUX2) = 0x0c08;
/* UART0 may still be in SyncReset if we didn't boot from UART */
davinci_enable_uart0();
/* EDMA may be in SyncReset too; turn it on, Linux won't (yet) */
lpsc_on(DAVINCI_LPSC_TPCC);
lpsc_on(DAVINCI_LPSC_TPTC0);
lpsc_on(DAVINCI_LPSC_TPTC1);
return 0;
}
#ifdef CONFIG_NAND_DAVINCI
static void nand_dm355evm_select_chip(struct mtd_info *mtd, int chip)
{
struct nand_chip *this = mtd->priv;
u32 wbase = (u32) this->IO_ADDR_W;
u32 rbase = (u32) this->IO_ADDR_R;
if (chip == 1) {
__set_bit(14, &wbase);
__set_bit(14, &rbase);
} else {
__clear_bit(14, &wbase);
__clear_bit(14, &rbase);
}
this->IO_ADDR_W = (void *)wbase;
this->IO_ADDR_R = (void *)rbase;
}
int board_nand_init(struct nand_chip *nand)
{
davinci_nand_init(nand);
nand->select_chip = nand_dm355evm_select_chip;
return 0;
}
#endif

3
board/davinci/dvevm/dvevm.c
View File

@ -27,7 +27,6 @@
#include <common.h> #include <common.h>
#include <i2c.h> #include <i2c.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include "../common/psc.h"
#include "../common/misc.h" #include "../common/misc.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -70,8 +69,6 @@ int misc_init_r(void)
uint8_t video_mode; uint8_t video_mode;
uint8_t eeprom_enetaddr[6]; uint8_t eeprom_enetaddr[6];
dv_display_clk_infos();
/* Read Ethernet MAC address from EEPROM if available. */ /* Read Ethernet MAC address from EEPROM if available. */
if (dvevm_read_mac_address(eeprom_enetaddr)) if (dvevm_read_mac_address(eeprom_enetaddr))
dv_configure_mac_address(eeprom_enetaddr); dv_configure_mac_address(eeprom_enetaddr);

52
board/davinci/dvevm/u-boot.lds
View File

@ -1,52 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

3
board/davinci/schmoogie/schmoogie.c
View File

@ -27,7 +27,6 @@
#include <common.h> #include <common.h>
#include <i2c.h> #include <i2c.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include "../common/psc.h"
#include "../common/misc.h" #include "../common/misc.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -105,8 +104,6 @@ int misc_init_r(void)
0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35 0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35
}; };
dv_display_clk_infos();
/* Set serial number from UID chip */ /* Set serial number from UID chip */
if (i2c_read(CONFIG_SYS_UID_ADDR, 0, 1, buf, 8)) { if (i2c_read(CONFIG_SYS_UID_ADDR, 0, 1, buf, 8)) {
printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR); printf("\nUID @ 0x%02x read FAILED!!!\n", CONFIG_SYS_UID_ADDR);

3
board/davinci/sffsdr/sffsdr.c
View File

@ -30,7 +30,6 @@
#include <common.h> #include <common.h>
#include <i2c.h> #include <i2c.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include "../common/psc.h"
#include "../common/misc.h" #include "../common/misc.h"
#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ #define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */
@ -132,8 +131,6 @@ int misc_init_r(void)
/* EMIF-A CS3 configuration for FPGA. */ /* EMIF-A CS3 configuration for FPGA. */
REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
dv_display_clk_infos();
/* Configure I2C switch (PCA9543) to enable channel 0. */ /* Configure I2C switch (PCA9543) to enable channel 0. */
i2cbuf = CONFIG_SYS_I2C_PCA9543_ENABLE_CH0; i2cbuf = CONFIG_SYS_I2C_PCA9543_ENABLE_CH0;
if (i2c_write(CONFIG_SYS_I2C_PCA9543_ADDR, 0, if (i2c_write(CONFIG_SYS_I2C_PCA9543_ADDR, 0,

52
board/davinci/sffsdr/u-boot.lds
View File

@ -1,52 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

3
board/davinci/sonata/sonata.c
View File

@ -26,7 +26,6 @@
#include <common.h> #include <common.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include "../common/psc.h"
#include "../common/misc.h" #include "../common/misc.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -67,8 +66,6 @@ int misc_init_r(void)
{ {
uint8_t eeprom_enetaddr[6]; uint8_t eeprom_enetaddr[6];
dv_display_clk_infos();
/* Read Ethernet MAC address from EEPROM if available. */ /* Read Ethernet MAC address from EEPROM if available. */
if (dvevm_read_mac_address(eeprom_enetaddr)) if (dvevm_read_mac_address(eeprom_enetaddr))
dv_configure_mac_address(eeprom_enetaddr); dv_configure_mac_address(eeprom_enetaddr);

2
board/delta/delta.c
View File

@ -260,7 +260,7 @@ int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
kbd, 1, 1, do_kbd, kbd, 1, 1, do_kbd,
"read keyboard status", "read keyboard status",
NULL ""
); );
#endif /* DELTA_CHECK_KEYBD */ #endif /* DELTA_CHECK_KEYBD */

56
board/delta/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/pxa/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

56
board/dnp1110/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/sa1100/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

56
board/ep7312/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm720t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

7
board/esd/ar405/ar405.c
View File

@ -247,10 +247,9 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
digtest, 3, 1, do_digtest, digtest, 3, 1, do_digtest,
"Test digital in-/output", "Test digital in-/output",
NULL ""
); );
#define ERROR_DELTA 256 #define ERROR_DELTA 256
struct io { struct io {
@ -341,7 +340,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
anatest, 2, 1, do_anatest, anatest, 2, 1, do_anatest,
"Test analog in-/output", "Test analog in-/output",
NULL ""
); );
@ -408,6 +407,6 @@ int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
inctest, 3, 1, do_inctest, inctest, 3, 1, do_inctest,
"Test incremental encoder inputs", "Test incremental encoder inputs",
NULL ""
); );
#endif #endif

11
board/esd/cms700/cms700.c
View File

@ -31,14 +31,6 @@ DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void); extern void lxt971_no_sleep(void);
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
#include "fpgadata.c"
};
int filesize = sizeof(fpgadata);
int board_early_init_f (void) int board_early_init_f (void)
{ {
/* /*
@ -198,7 +190,8 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
"Enable / disable / query EEPROM write access", "Enable / disable / query EEPROM write access",
NULL); ""
);
#endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */

7
board/esd/cms700/config.mk
View File

@ -20,9 +20,4 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston, # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA # MA 02111-1307 USA
# #
TEXT_BASE = 0xFFFC8000
#
# esd CMS405 boards
#
TEXT_BASE = 0xFFFC0000

1812
board/esd/cms700/fpgadata.c
View File

File diff suppressed because it is too large Load Diff

2
board/esd/common/auto_update.c
View File

@ -551,6 +551,6 @@ int auto_update(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
autoupd, 1, 1, auto_update, autoupd, 1, 1, auto_update,
"Automatically update images", "Automatically update images",
NULL ""
); );
#endif /* CONFIG_AUTO_UPDATE */ #endif /* CONFIG_AUTO_UPDATE */

2
board/esd/common/cmd_loadpci.c
View File

@ -124,7 +124,7 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
loadpci, 1, 1, do_loadpci, loadpci, 1, 1, do_loadpci,
"Wait for pci bootcmd and boot it", "Wait for pci bootcmd and boot it",
NULL ""
); );
#endif #endif

2
board/esd/common/lcd.c
View File

@ -373,5 +373,5 @@ int do_esdbmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
esdbmp, 2, 1, do_esdbmp, esdbmp, 2, 1, do_esdbmp,
"display BMP image", "display BMP image",
"<imageAddr> - display image\n" "<imageAddr> - display image"
); );

24
board/esd/common/xilinx_jtag/micro.c
View File

@ -66,10 +66,7 @@
#include "lenval.h" #include "lenval.h"
#include "ports.h" #include "ports.h"
const unsigned char *xsvfdata;
extern const unsigned char fpgadata[];
extern int filesize;
/*============================================================================ /*============================================================================
* XSVF #define * XSVF #define
@ -1838,12 +1835,23 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
unsigned long duration; unsigned long duration;
unsigned long long startClock, endClock; unsigned long long startClock, endClock;
if (argc == 2)
xsvfdata = (unsigned char *)simple_strtoul(argv[1], NULL, 16);
else {
#ifdef CONFIG_SYS_XSVF_DEFAULT_ADDR
xsvfdata = (unsigned char *)CONFIG_SYS_XSVF_DEFAULT_ADDR;
#else
printf("Usage:\ncpld %s\n", cmdtp->help);
return -1;
#endif
}
iErrorCode = XSVF_ERRORCODE( XSVF_ERROR_NONE ); iErrorCode = XSVF_ERRORCODE( XSVF_ERROR_NONE );
pzXsvfFileName = 0; pzXsvfFileName = 0;
xsvf_iDebugLevel = 0; xsvf_iDebugLevel = 0;
printf("XSVF Player v%s, Xilinx, Inc.\n", XSVF_VERSION); printf("XSVF Player v%s, Xilinx, Inc.\n", XSVF_VERSION);
printf("XSVF Filesize = %d bytes\n", filesize); printf("Reading XSVF data @ %p\n", xsvfdata);
/* Initialize the I/O. SetPort initializes I/O on first call */ /* Initialize the I/O. SetPort initializes I/O on first call */
setPort( TMS, 1 ); setPort( TMS, 1 );
@ -1858,7 +1866,7 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
return( iErrorCode ); return( iErrorCode );
} }
U_BOOT_CMD( U_BOOT_CMD(
cpld, 1, 1, do_cpld, cpld, 2, 1, do_cpld,
"Program onboard CPLD", "program onboard CPLD",
NULL "<xsvf-addr>"
); );

10
board/esd/common/xilinx_jtag/ports.c
View File

@ -42,9 +42,7 @@ static int oldstate = 0;
static int newstate = 0; static int newstate = 0;
static int readptr = 0; static int readptr = 0;
extern long filesize; extern const unsigned char *xsvfdata;
extern const unsigned char fpgadata[];
/* if in debugging mode, then just set the variables */ /* if in debugging mode, then just set the variables */
void setPort(short p,short val) void setPort(short p,short val)
@ -86,10 +84,10 @@ void pulseClock(void)
void readByte(unsigned char *data) void readByte(unsigned char *data)
{ {
/* pretend reading using a file */ /* pretend reading using a file */
*data = fpgadata[readptr++]; *data = xsvfdata[readptr++];
newstate = (100 * filepos++) / filesize; newstate = filepos++ >> 10;
if (newstate != oldstate) { if (newstate != oldstate) {
printf("%4d\r\r\r\r", newstate); printf("%4d kB\r\r\r\r", newstate);
oldstate = newstate; oldstate = newstate;
} }
} }

2
board/esd/cpci2dp/cpci2dp.c
View File

@ -183,6 +183,6 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
eepwren, 2, 0, do_eep_wren, eepwren, 2, 0, do_eep_wren,
"Enable / disable / query EEPROM write access", "Enable / disable / query EEPROM write access",
NULL ""
); );
#endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */

6
board/esd/cpci405/cpci405.c
View File

@ -690,7 +690,7 @@ int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
onewire, 1, 1, do_onewire, onewire, 1, 1, do_onewire,
"Read 1-write ID", "Read 1-write ID",
NULL ""
); );
#define CONFIG_SYS_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT24WC32 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT24WC32 */
@ -751,7 +751,7 @@ int do_get_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
getbpip, 1, 1, do_get_bpip, getbpip, 1, 1, do_get_bpip,
"Update IP-Address with Backplane IP-Address", "Update IP-Address with Backplane IP-Address",
NULL ""
); );
/* /*
@ -787,7 +787,7 @@ int do_set_bpip(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
setbpip, 2, 1, do_set_bpip, setbpip, 2, 1, do_set_bpip,
"Write Backplane IP-Address", "Write Backplane IP-Address",
NULL ""
); );
#endif /* CONFIG_CPCI405AB */ #endif /* CONFIG_CPCI405AB */

4
board/esd/cpci5200/cpci5200.c
View File

@ -295,4 +295,6 @@ int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(writepci, 3, 1, do_writepci, U_BOOT_CMD(writepci, 3, 1, do_writepci,
"Write some data to pcibus", "Write some data to pcibus",
"<addr> <size>\n" " - Write some data to pcibus.\n"); "<addr> <size>\n"
""
);

104
board/esd/cpci750/cpci750.c
View File

@ -122,6 +122,9 @@ static char show_config_tab[][15] = {{"PCI0DLL_2 "}, /* 31 */
extern flash_info_t flash_info[]; extern flash_info_t flash_info[];
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
extern int do_bootvx (cmd_tbl_t *, int, int, char *[]);
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */
/* this is the current GT register space location */ /* this is the current GT register space location */
@ -137,6 +140,15 @@ void board_prebootm_init (void);
unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS; unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS;
int display_mem_map (void); int display_mem_map (void);
/*
* Skip video initialization on slave variant.
* This function will overwrite the weak default in cfb_console.c
*/
int board_video_skip(void)
{
return CPCI750_SLAVE_TEST;
}
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */
/* /*
@ -184,6 +196,7 @@ original ppcboot 1.1.6 source end */
static void gt_pci_config (void) static void gt_pci_config (void)
{ {
unsigned int stat; unsigned int stat;
unsigned int data;
unsigned int val = 0x00fff864; /* DINK32: BusNum 23:16, DevNum 15:11, FuncNum 10:8, RegNum 7:2 */ unsigned int val = 0x00fff864; /* DINK32: BusNum 23:16, DevNum 15:11, FuncNum 10:8, RegNum 7:2 */
/* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's /* In PCIX mode devices provide their own bus and device numbers. We query the Discovery II's
@ -251,10 +264,15 @@ static void gt_pci_config (void)
/*ronen update the pci internal registers base address.*/ /*ronen update the pci internal registers base address.*/
#ifdef MAP_PCI #ifdef MAP_PCI
for (stat = 0; stat <= PCI_HOST1; stat++) for (stat = 0; stat <= PCI_HOST1; stat++) {
data = pciReadConfigReg(stat,
PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
SELF);
data = (data & 0x0f) | CONFIG_SYS_GT_REGS;
pciWriteConfigReg (stat, pciWriteConfigReg (stat,
PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS, PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS,
SELF, CONFIG_SYS_GT_REGS); SELF, data);
}
#endif #endif
} }
@ -448,10 +466,13 @@ int misc_init_r ()
void after_reloc (ulong dest_addr, gd_t * gd) void after_reloc (ulong dest_addr, gd_t * gd)
{ {
memoryMapDeviceSpace (BOOT_DEVICE, CONFIG_SYS_BOOT_SPACE,
memoryMapDeviceSpace (BOOT_DEVICE, CONFIG_SYS_BOOT_SPACE, CONFIG_SYS_BOOT_SIZE); CONFIG_SYS_BOOT_SIZE);
display_mem_map (); display_mem_map ();
GT_REG_WRITE (PCI_0BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
GT_REG_WRITE (PCI_1BASE_ADDRESS_REGISTERS_ENABLE, 0xfffffdfe);
/* now, jump to the main ppcboot board init code */ /* now, jump to the main ppcboot board init code */
board_init_r (gd, dest_addr); board_init_r (gd, dest_addr);
/* NOTREACHED */ /* NOTREACHED */
@ -538,6 +559,79 @@ int display_mem_map (void)
return (0); return (0);
} }
/*
* Command loadpci: wait for signal from host and boot image.
*/
int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
volatile unsigned int *ptr;
int count = 0;
int count2 = 0;
int status;
char addr[16];
char str[] = "\\|/-";
char *local_args[2];
/*
* Mark sync address
*/
ptr = 0;
ptr[0] = 0xffffffff;
ptr[1] = 0xffffffff;
puts("\nWaiting for image from pci host -");
/*
* Wait for host to write the start address
*/
while (*ptr == 0xffffffff) {
count++;
if (!(count % 100)) {
count2++;
putc(0x08); /* backspace */
putc(str[count2 % 4]);
}
/* Abort if ctrl-c was pressed */
if (ctrlc()) {
puts("\nAbort\n");
return 0;
}
udelay(1000);
}
sprintf(addr, "%08x", *ptr);
printf("\nBooting Image at addr 0x%s ...\n", addr);
setenv("loadaddr", addr);
switch (ptr[1] == 0) {
case 0:
/*
* Boot image via bootm
*/
local_args[0] = argv[0];
local_args[1] = NULL;
status = do_bootm (cmdtp, 0, 1, local_args);
break;
case 1:
/*
* Boot image via bootvx
*/
local_args[0] = argv[0];
local_args[1] = NULL;
status = do_bootvx (cmdtp, 0, 1, local_args);
break;
}
return 0;
}
U_BOOT_CMD(
loadpci, 1, 1, do_loadpci,
"loadpci - Wait for pci-image and boot it\n",
NULL
);
/* DRAM check routines copied from gw8260 */ /* DRAM check routines copied from gw8260 */
#if defined (CONFIG_SYS_DRAM_TEST) #if defined (CONFIG_SYS_DRAM_TEST)
@ -994,5 +1088,5 @@ int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
show_config, 1, 1, do_show_config, show_config, 1, 1, do_show_config,
"Show Marvell strapping register", "Show Marvell strapping register",
"Show Marvell strapping register (ResetSampleLow ResetSampleHigh)\n" "Show Marvell strapping register (ResetSampleLow ResetSampleHigh)"
); );

16
board/esd/cpci750/i2c.c
View File

@ -27,6 +27,7 @@
#include <common.h> #include <common.h>
#include <mpc8xx.h> #include <mpc8xx.h>
#include <malloc.h> #include <malloc.h>
#include <i2c.h>
#include "../../Marvell/include/mv_gen_reg.h" #include "../../Marvell/include/mv_gen_reg.h"
#include "../../Marvell/include/core.h" #include "../../Marvell/include/core.h"
@ -41,7 +42,7 @@
/* Assuming that there is only one master on the bus (us) */ /* Assuming that there is only one master on the bus (us) */
static void i2c_init (int speed, int slaveaddr) void i2c_init (int speed, int slaveaddr)
{ {
unsigned int n, m, freq, margin, power; unsigned int n, m, freq, margin, power;
unsigned int actualN = 0, actualM = 0; unsigned int actualN = 0, actualM = 0;
@ -375,7 +376,7 @@ i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
return 0; /* sucessful completion */ return 0; /* sucessful completion */
} }
uchar int
i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data, i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
int len) int len)
{ {
@ -384,7 +385,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
DP (puts ("i2c_read\n")); DP (puts ("i2c_read\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */ /* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */ status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
if (status) { if (status) {
@ -423,7 +425,7 @@ void i2c_stop (void)
} }
uchar int
i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data, i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
int len) int len)
{ {
@ -432,7 +434,8 @@ i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
DP (puts ("i2c_write\n")); DP (puts ("i2c_write\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */ /* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */ status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
if (status) { if (status) {
@ -468,7 +471,8 @@ int i2c_probe (uchar chip)
DP (puts ("i2c_probe\n")); DP (puts ("i2c_probe\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */ /* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */ status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */
if (status) { if (status) {

4
board/esd/cpci750/ide.c
View File

@ -39,6 +39,8 @@ int ide_preinit (void)
int l; int l;
status = 1; status = 1;
if (CPCI750_SLAVE_TEST != 0)
return status;
for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) { for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
ide_bus_offset[l] = -ATA_STATUS; ide_bus_offset[l] = -ATA_STATUS;
} }
@ -57,7 +59,7 @@ int ide_preinit (void)
ide_bus_offset[1] &= 0xfffffffe; ide_bus_offset[1] &= 0xfffffffe;
ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE; ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE;
} }
return (status); return status;
} }
void ide_set_reset (int flag) { void ide_set_reset (int flag) {

37
board/esd/cpci750/pci.c
View File

@ -768,11 +768,12 @@ static int gt_read_config_dword (struct pci_controller *hose,
int bus = PCI_BUS (dev); int bus = PCI_BUS (dev);
if ((bus == local_buses[0]) || (bus == local_buses[1])) { if ((bus == local_buses[0]) || (bus == local_buses[1])) {
*value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr, offset, *value = pciReadConfigReg ((PCI_HOST) hose->cfg_addr,
offset | (PCI_FUNC(dev) << 8),
PCI_DEV (dev)); PCI_DEV (dev));
} else { } else {
*value = pciOverBridgeReadConfigReg ((PCI_HOST) hose-> *value = pciOverBridgeReadConfigReg ((PCI_HOST) hose->cfg_addr,
cfg_addr, offset, offset | (PCI_FUNC(dev) << 8),
PCI_DEV (dev), bus); PCI_DEV (dev), bus);
} }
@ -785,11 +786,13 @@ static int gt_write_config_dword (struct pci_controller *hose,
int bus = PCI_BUS (dev); int bus = PCI_BUS (dev);
if ((bus == local_buses[0]) || (bus == local_buses[1])) { if ((bus == local_buses[0]) || (bus == local_buses[1])) {
pciWriteConfigReg ((PCI_HOST) hose->cfg_addr, offset, pciWriteConfigReg ((PCI_HOST) hose->cfg_addr,
offset | (PCI_FUNC(dev) << 8),
PCI_DEV (dev), value); PCI_DEV (dev), value);
} else { } else {
pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr, pciOverBridgeWriteConfigReg ((PCI_HOST) hose->cfg_addr,
offset, PCI_DEV (dev), bus, offset | (PCI_FUNC(dev) << 8),
PCI_DEV (dev), bus,
value); value);
} }
return 0; return 0;
@ -803,6 +806,9 @@ static void gt_setup_ide (struct pci_controller *hose,
u32 bar_response, bar_value; u32 bar_response, bar_value;
int bar; int bar;
if (CPCI750_SLAVE_TEST != 0)
return;
for (bar = 0; bar < 6; bar++) { for (bar = 0; bar < 6; bar++) {
/*ronen different function for 3rd bank. */ /*ronen different function for 3rd bank. */
unsigned int offset = unsigned int offset =
@ -829,6 +835,9 @@ static void gt_setup_cpcidvi (struct pci_controller *hose,
{ {
u32 bar_value, pci_response; u32 bar_value, pci_response;
if (CPCI750_SLAVE_TEST != 0)
return;
pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &pci_response); pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &pci_response);
pci_hose_write_config_dword (hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff); pci_hose_write_config_dword (hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff);
pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pci_response); pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pci_response);
@ -907,6 +916,7 @@ struct pci_controller pci1_hose = {
void pci_init_board (void) void pci_init_board (void)
{ {
unsigned int command; unsigned int command;
unsigned int slave;
#ifdef CONFIG_PCI_PNP #ifdef CONFIG_PCI_PNP
unsigned int bar; unsigned int bar;
#endif #endif
@ -918,6 +928,8 @@ void pci_init_board (void)
gt_cpcidvi_rom.base = 0; gt_cpcidvi_rom.base = 0;
#endif #endif
slave = CPCI750_SLAVE_TEST;
pci0_hose.config_table = gt_config_table; pci0_hose.config_table = gt_config_table;
pci1_hose.config_table = gt_config_table; pci1_hose.config_table = gt_config_table;
@ -953,6 +965,7 @@ void pci_init_board (void)
pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0; pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0;
pci_register_hose (&pci0_hose); pci_register_hose (&pci0_hose);
if (slave == 0) {
pciArbiterEnable (PCI_HOST0); pciArbiterEnable (PCI_HOST0);
pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1); pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF); command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
@ -969,11 +982,23 @@ void pci_init_board (void)
#ifdef CONFIG_PCI_SCAN_SHOW #ifdef CONFIG_PCI_SCAN_SHOW
printf("PCI: Bus Dev VenId DevId Class Int\n"); printf("PCI: Bus Dev VenId DevId Class Int\n");
#endif #endif
pci0_hose.last_busno = pci_hose_scan_bus (&pci0_hose, pci0_hose.first_busno); pci0_hose.last_busno = pci_hose_scan_bus (&pci0_hose,
pci0_hose.first_busno);
#ifdef DEBUG #ifdef DEBUG
gt_pci_bus_mode_display (PCI_HOST1); gt_pci_bus_mode_display (PCI_HOST1);
#endif #endif
} else {
pciArbiterDisable (PCI_HOST0);
pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
command |= PCI_COMMAND_MASTER;
pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
command |= PCI_COMMAND_MEMORY;
pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
pci0_hose.last_busno = pci0_hose.first_busno;
}
pci1_hose.first_busno = pci0_hose.last_busno + 1; pci1_hose.first_busno = pci0_hose.last_busno + 1;
pci1_hose.last_busno = 0xff; pci1_hose.last_busno = 0xff;
pci1_hose.current_busno = pci1_hose.first_busno; pci1_hose.current_busno = pci1_hose.first_busno;

2
board/esd/dasa_sim/cmd_dasa_sim.c
View File

@ -230,7 +230,7 @@ U_BOOT_CMD(
pci9054, 3, 1, do_pci9054, pci9054, 3, 1, do_pci9054,
"PLX PCI9054 EEPROM access", "PLX PCI9054 EEPROM access",
"pci9054 info - print EEPROM values\n" "pci9054 info - print EEPROM values\n"
"pci9054 update - updates EEPROM with default values\n" "pci9054 update - updates EEPROM with default values"
); );
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */

7
board/esd/dp405/config.mk
View File

@ -21,9 +21,4 @@
# MA 02111-1307 USA # MA 02111-1307 USA
# #
# TEXT_BASE = 0xFFFD0000
# esd VOH405 boards
#
TEXT_BASE = 0xFFFC0000
#TEXT_BASE = 0x00FC0000

40
board/esd/dp405/dp405.c
View File

@ -29,14 +29,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
/* fpga configuration data - not compressed, generated by bin2c */
const unsigned char fpgadata[] =
{
#include "fpgadata.c"
};
int filesize = sizeof(fpgadata);
int board_early_init_f (void) int board_early_init_f (void)
{ {
/* /*
@ -97,20 +89,40 @@ int checkboard (void)
int i = getenv_r ("serial#", str, sizeof(str)); int i = getenv_r ("serial#", str, sizeof(str));
unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe, unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf}; 0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
unsigned char id1, id2; unsigned char id1, id2, rev;
puts ("Board: "); puts ("Board: ");
if (i == -1) { if (i == -1)
puts ("### No HW ID - assuming DP405"); puts ("### No HW ID - assuming DP405");
} else { else
puts(str); puts(str);
}
id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f]; id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f];
id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f]; id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f];
printf(" (ID=0x%1X%1X, PLD=0x%02X)\n",
id2, id1, in_8((void *)0xf0001000)); rev = in_8((void *)0xf0001000);
if (rev & 0x10) /* old DP405 compatibility */
rev = in_8((void *)0xf0000800);
switch (rev & 0xc0) {
case 0x00:
puts(" (HW=DP405");
break;
case 0x80:
puts(" (HW=DP405/CO");
break;
case 0xc0:
puts(" (HW=DN405");
break;
}
printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f);
if ((rev & 0xc0) == 0xc0) {
printf(", C5V=%s",
in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on");
}
puts(")\n");
return 0; return 0;
} }

1812
board/esd/dp405/fpgadata.c
View File

File diff suppressed because it is too large Load Diff

17
board/esd/du440/du440.c
View File

@ -607,7 +607,7 @@ int do_dcf77(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
dcf77, 1, 1, do_dcf77, dcf77, 1, 1, do_dcf77,
"Check DCF77 receiver", "Check DCF77 receiver",
NULL ""
); );
/* /*
@ -657,7 +657,7 @@ int do_hubinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
hubinit, 1, 1, do_hubinit, hubinit, 1, 1, do_hubinit,
"Initialize USB hub", "Initialize USB hub",
NULL ""
); );
#endif /* CONFIG_I2C_MULTI_BUS */ #endif /* CONFIG_I2C_MULTI_BUS */
@ -790,7 +790,7 @@ int do_setup_boot_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
sbe, 2, 0, do_setup_boot_eeprom, sbe, 2, 0, do_setup_boot_eeprom,
"setup boot eeprom", "setup boot eeprom",
NULL ""
); );
#if defined(CONFIG_SYS_EEPROM_WREN) #if defined(CONFIG_SYS_EEPROM_WREN)
@ -864,7 +864,8 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
"Enable / disable / query EEPROM write access", "Enable / disable / query EEPROM write access",
NULL); ""
);
#endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */
static int got_pldirq; static int got_pldirq;
@ -916,7 +917,7 @@ int do_waitpwrirq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
wpi, 1, 1, do_waitpwrirq, wpi, 1, 1, do_waitpwrirq,
"Wait for power change interrupt", "Wait for power change interrupt",
NULL ""
); );
/* /*
@ -961,7 +962,7 @@ int do_dviinit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
dviinit, 1, 1, do_dviinit, dviinit, 1, 1, do_dviinit,
"Initialize DVI Panellink transmitter", "Initialize DVI Panellink transmitter",
NULL ""
); );
/* /*
@ -1001,7 +1002,7 @@ int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
time, CONFIG_SYS_MAXARGS, 1, do_time, time, CONFIG_SYS_MAXARGS, 1, do_time,
"run command and output execution time", "run command and output execution time",
NULL ""
); );
extern void video_hw_rectfill ( extern void video_hw_rectfill (
@ -1051,5 +1052,5 @@ int do_gfxdemo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD( U_BOOT_CMD(
gfxdemo, CONFIG_SYS_MAXARGS, 1, do_gfxdemo, gfxdemo, CONFIG_SYS_MAXARGS, 1, do_gfxdemo,
"demo", "demo",
NULL ""
); );

3
board/esd/hh405/hh405.c
View File

@ -770,7 +770,8 @@ int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(eepwren, 2, 0, do_eep_wren, U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
"Enable / disable / query EEPROM write access", "Enable / disable / query EEPROM write access",
NULL); ""
);
#endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */ #endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */

50
board/esd/mecp5123/Makefile Normal file
View File

@ -0,0 +1,50 @@
#
# (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y := $(BOARD).o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

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