Patch by Martin Krause, 27 Oct 2004:
- add support for "STK52xx" board (including PS/2 multiplexer) - add hardware detection for TQM5200
This commit is contained in:
wdenk
parent
25d6712a81
commit
7e6bf358d8
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@ -2,6 +2,10 @@
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Changes since U-Boot 1.1.1:
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======================================================================
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* Patch by Martin Krause, 27 Oct 2004:
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- add support for "STK52xx" board (including PS/2 multiplexer)
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- add hardware detection for TQM5200
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* Clean up CMC PU2 flash driver
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* Update MAINTAINERS file
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5
Makefile
5
Makefile
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@ -307,6 +307,7 @@ Total5200_Rev2_lowboot_config: unconfig
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}
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@./mkconfig -a Total5200 ppc mpc5xxx total5200
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TQM5200_auto_config \
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TQM5200_AA_config \
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TQM5200_AB_config \
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TQM5200_AC_config \
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@ -331,6 +332,10 @@ MiniFAP_config: unconfig
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echo "... with 4 MB Flash, 128 MB SDRAM" ; \
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echo "... with Graphics Controller"; \
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}
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@[ -z "$(findstring auto,$@)" ] || \
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{ echo "#define CONFIG_CS_AUTOCONF" >>include/config.h ; \
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echo "... with automatic CS configuration" ; \
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}
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@./mkconfig -a TQM5200 ppc mpc5xxx tqm5200
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#########################################################################
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@ -25,7 +25,8 @@ include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS := $(BOARD).o flash.o
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#OBJS := $(BOARD).o flash.o
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OBJS := $(BOARD).o
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$(LIB): $(OBJS) $(SOBJS)
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$(AR) crv $@ $(OBJS)
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@ -36,6 +36,9 @@
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#else
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#include "mt48lc16m16a2-75.h"
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#endif
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#ifdef CONFIG_PS2MULT
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void ps2mult_early_init(void);
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#endif
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#ifndef CFG_RAMBOOT
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static void sdram_start (int hi_addr)
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@ -244,13 +247,17 @@ int checkboard (void)
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{
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#if defined (CONFIG_TQM5200_AA)
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puts ("Board: TQM5200-AA (TQ-Systems GmbH)\n");
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#endif
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#if defined (CONFIG_TQM5200_AB)
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#elif defined (CONFIG_TQM5200_AB)
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puts ("Board: TQM5200-AB (TQ-Systems GmbH)\n");
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#endif
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#if defined (CONFIG_TQM5200_AC)
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#elif defined (CONFIG_TQM5200_AC)
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puts ("Board: TQM5200-AC (TQ-Systems GmbH)\n");
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#elif defined (CONFIG_TQM5200)
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puts ("Board: TQM5200 (TQ-Systems GmbH)\n");
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#endif
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#if defined (CONFIG_STK52XX)
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puts (" on a STK52XX baseboard\n");
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#endif
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return 0;
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}
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@ -383,5 +390,114 @@ ulong post_word_load (void)
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return *save_addr;
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}
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#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/
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#ifdef CONFIG_PS2MULT
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#ifdef CONFIG_BOARD_EARLY_INIT_R
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int board_early_init_r (void)
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{
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ps2mult_early_init();
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return (0);
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}
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#endif
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#endif /* CONFIG_PS2MULT */
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#if defined(CONFIG_CS_AUTOCONF)
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int last_stage_init (void)
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{
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/*
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* auto scan for really existing devices and re-set chip select
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* configuration.
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*/
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u16 save, tmp;
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int restore;
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/*
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* Check for SRAM and SRAM size
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*/
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/* save origianl SRAM content */
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save = *(volatile u16 *)CFG_CS2_START;
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restore = 1;
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/* write test pattern to SRAM */
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*(volatile u16 *)CFG_CS2_START = 0xA5A5;
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__asm__ volatile ("sync");
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/*
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* Put a different pattern on the data lines: otherwise they may float
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* long enough to read back what we wrote.
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*/
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tmp = *(volatile u16 *)CFG_FLASH_BASE;
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if (tmp == 0xA5A5)
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puts ("!! possible error in SRAM detection\n");
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if (*(volatile u16 *)CFG_CS2_START != 0xA5A5) {
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/* no SRAM at all, disable cs */
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*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 18);
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*(vu_long *)MPC5XXX_CS2_START = 0x0000FFFF;
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*(vu_long *)MPC5XXX_CS2_STOP = 0x0000FFFF;
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restore = 0;
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__asm__ volatile ("sync");
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}
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else if (*(volatile u16 *)(CFG_CS2_START + (1<<19)) == 0xA5A5) {
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/* make sure that we access a mirrored address */
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*(volatile u16 *)CFG_CS2_START = 0x1111;
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__asm__ volatile ("sync");
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if (*(volatile u16 *)(CFG_CS2_START + (1<<19)) == 0x1111) {
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/* SRAM size = 512 kByte */
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*(vu_long *)MPC5XXX_CS2_STOP = STOP_REG(CFG_CS2_START,
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0x80000);
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__asm__ volatile ("sync");
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puts ("SRAM: 512 kB\n");
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}
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else
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puts ("!! possible error in SRAM detection\n");
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}
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else {
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puts ("SRAM: 1 MB\n");
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}
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/* restore origianl SRAM content */
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if (restore) {
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*(volatile u16 *)CFG_CS2_START = save;
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__asm__ volatile ("sync");
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}
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/*
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* Check for Grafic Controller
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*/
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/* save origianl FB content */
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save = *(volatile u16 *)CFG_CS1_START;
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restore = 1;
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/* write test pattern to FB memory */
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*(volatile u16 *)CFG_CS1_START = 0xA5A5;
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__asm__ volatile ("sync");
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/*
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* Put a different pattern on the data lines: otherwise they may float
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* long enough to read back what we wrote.
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*/
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tmp = *(volatile u16 *)CFG_FLASH_BASE;
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if (tmp == 0xA5A5)
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puts ("!! possible error in grafic controller detection\n");
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if (*(volatile u16 *)CFG_CS1_START != 0xA5A5) {
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/* no grafic controller at all, disable cs */
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*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 17);
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*(vu_long *)MPC5XXX_CS1_START = 0x0000FFFF;
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*(vu_long *)MPC5XXX_CS1_STOP = 0x0000FFFF;
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restore = 0;
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__asm__ volatile ("sync");
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}
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else {
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puts ("VGA: SMI501 (Voyager) with 8 MB\n");
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}
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/* restore origianl FB content */
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if (restore) {
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*(volatile u16 *)CFG_CS1_START = save;
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__asm__ volatile ("sync");
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}
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return 0;
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}
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#endif /* CONFIG_CS_AUTOCONF */
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@ -33,6 +33,10 @@
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#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
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#ifdef CONFIG_MPC5xxx
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int ps2ser_check(void);
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#endif
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static volatile char kbd_buffer[KBD_BUFFER_LEN];
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static volatile int in_pointer = 0;
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static volatile int out_pointer = 0;
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@ -71,6 +75,10 @@ static void kbd_put_queue(char data)
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/* test if a character is in the queue */
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static int kbd_testc(void)
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{
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#ifdef CONFIG_MPC5xxx
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/* no ISR is used, so received chars must be polled */
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ps2ser_check();
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#endif
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if(in_pointer==out_pointer)
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return(0); /* no data */
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else
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@ -81,7 +89,12 @@ static int kbd_testc(void)
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static int kbd_getc(void)
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{
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char c;
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while(in_pointer==out_pointer);
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while(in_pointer==out_pointer) {
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#ifdef CONFIG_MPC5xxx
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/* no ISR is used, so received chars must be polled */
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ps2ser_check();
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#endif
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;}
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if((out_pointer+1)==KBD_BUFFER_LEN)
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out_pointer=0;
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else
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107
drivers/ps2ser.c
107
drivers/ps2ser.c
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@ -25,17 +25,88 @@
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#define PS2SER_BAUD 57600
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#ifdef CONFIG_MPC5xxx
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#if CONFIG_PS2SERIAL == 1
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#define PSC_BASE MPC5XXX_PSC1
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#elif CONFIG_PS2SERIAL == 2
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#define PSC_BASE MPC5XXX_PSC2
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#elif CONFIG_PS2SERIAL == 3
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#define PSC_BASE MPC5XXX_PSC3
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#elif defined(CONFIG_MGT5100)
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#error CONFIG_PS2SERIAL must be in 1, 2 or 3
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#elif CONFIG_PS2SERIAL == 4
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#define PSC_BASE MPC5XXX_PSC4
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#elif CONFIG_PS2SERIAL == 5
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#define PSC_BASE MPC5XXX_PSC5
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#elif CONFIG_PS2SERIAL == 6
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#define PSC_BASE MPC5XXX_PSC6
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#else
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#error CONFIG_PS2SERIAL must be in 1 ... 6
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#endif
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#endif /* CONFIG_MPC5xxx */
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static int ps2ser_getc_hw(void);
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static void ps2ser_interrupt(void *dev_id);
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extern struct serial_state rs_table[]; /* in serial.c */
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#ifndef CONFIG_MPC5xxx
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static struct serial_state *state;
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#endif
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static u_char ps2buf[PS2BUF_SIZE];
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static atomic_t ps2buf_cnt;
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static int ps2buf_in_idx;
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static int ps2buf_out_idx;
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#ifdef CONFIG_MPC5xxx
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int ps2ser_init(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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unsigned long baseclk;
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int div;
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/* reset PSC */
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psc->command = PSC_SEL_MODE_REG_1;
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/* select clock sources */
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#if defined(CONFIG_MGT5100)
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psc->psc_clock_select = 0xdd00;
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baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32;
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#elif defined(CONFIG_MPC5200)
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psc->psc_clock_select = 0;
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baseclk = (gd->ipb_clk + 16) / 32;
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#endif
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/* switch to UART mode */
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psc->sicr = 0;
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/* configure parity, bit length and so on */
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#if defined(CONFIG_MGT5100)
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psc->mode = PSC_MODE_ERR | PSC_MODE_8_BITS | PSC_MODE_PARNONE;
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#elif defined(CONFIG_MPC5200)
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psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
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#endif
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psc->mode = PSC_MODE_ONE_STOP;
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/* set up UART divisor */
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div = (baseclk + (PS2SER_BAUD/2)) / PS2SER_BAUD;
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psc->ctur = (div >> 8) & 0xff;
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psc->ctlr = div & 0xff;
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/* disable all interrupts */
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psc->psc_imr = 0;
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/* reset and enable Rx/Tx */
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psc->command = PSC_RST_RX;
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psc->command = PSC_RST_TX;
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psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE;
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return (0);
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}
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#else /* !CONFIG_MPC5xxx */
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static inline unsigned int ps2ser_in(int offset)
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{
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@ -79,25 +150,44 @@ int ps2ser_init(void)
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return 0;
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}
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#endif /* CONFIG_MPC5xxx */
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void ps2ser_putc(int chr)
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{
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#ifdef CONFIG_MPC5xxx
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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#endif
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#ifdef DEBUG
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printf(">>>> 0x%02x\n", chr);
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#endif
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#ifdef CONFIG_MPC5xxx
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while (!(psc->psc_status & PSC_SR_TXRDY));
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psc->psc_buffer_8 = chr;
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#else
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while (!(ps2ser_in(UART_LSR) & UART_LSR_THRE));
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ps2ser_out(UART_TX, chr);
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#endif
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}
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static int ps2ser_getc_hw(void)
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{
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#ifdef CONFIG_MPC5xxx
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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#endif
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int res = -1;
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#ifdef CONFIG_MPC5xxx
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if (psc->psc_status & PSC_SR_RXRDY) {
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res = (psc->psc_buffer_8);
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}
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#else
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if (ps2ser_in(UART_LSR) & UART_LSR_DR) {
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res = (ps2ser_in(UART_RX));
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}
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#endif
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return res;
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}
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@ -146,12 +236,19 @@ int ps2ser_check(void)
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static void ps2ser_interrupt(void *dev_id)
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{
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#ifdef CONFIG_MPC5xxx
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volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)PSC_BASE;
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#endif
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int chr;
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int iir;
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int status;
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do {
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chr = ps2ser_getc_hw();
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iir = ps2ser_in(UART_IIR);
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#ifdef CONFIG_MPC5xxx
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status = psc->psc_status;
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#else
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status = ps2ser_in(UART_IIR);
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#endif
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if (chr < 0) continue;
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if (atomic_read(&ps2buf_cnt) < PS2BUF_SIZE) {
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@ -161,7 +258,11 @@ static void ps2ser_interrupt(void *dev_id)
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} else {
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printf ("ps2ser.c: buffer overflow\n");
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}
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} while (iir & UART_IIR_RDI);
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#ifdef CONFIG_MPC5xxx
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} while (status & PSC_SR_RXRDY);
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#else
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} while (status & UART_IIR_RDI);
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#endif
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if (atomic_read(&ps2buf_cnt)) {
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ps2mult_callback(atomic_read(&ps2buf_cnt));
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@ -63,6 +63,8 @@ typedef volatile unsigned char vu_char;
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#endif
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#elif defined(CONFIG_5xx)
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#include <asm/5xx_immap.h>
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#elif defined(CONFIG_MPC5xxx)
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#include <mpc5xxx.h>
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#elif defined(CONFIG_MPC8220)
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#include <asm/immap_8220.h>
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#elif defined(CONFIG_8260)
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@ -211,7 +213,6 @@ void inline setenv (char *, char *);
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void setenv (char *, char *);
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#endif /* CONFIG_PPC */
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#ifdef CONFIG_ARM
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# include <asm/mach-types.h>
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# include <asm/setup.h>
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# include <asm/u-boot-arm.h> /* ARM version to be fixed! */
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#endif /* CONFIG_ARM */
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@ -35,6 +35,7 @@
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#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
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#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
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#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
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#define CONFIG_STK52XX 1 /* ... on a STK52XX base board */
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#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
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@ -53,6 +54,13 @@
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#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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#ifdef CONFIG_STK52XX
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#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
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#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
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#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
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#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
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#define CONFIG_BOARD_EARLY_INIT_R
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#endif /* CONFIG_STK52XX */
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#ifdef CONFIG_MPC5200 /* MPC5100 PCI is not supported yet. */
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/*
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@ -60,7 +68,11 @@
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* 0x40000000 - 0x4fffffff - PCI Memory
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* 0x50000000 - 0x50ffffff - PCI IO Space
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*/
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#ifdef CONFIG_STK52XX
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#define CONFIG_PCI 1
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#elif
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#define CONFIG_PCI 0
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#endif
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#define CONFIG_PCI_PNP 1
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/* #define CONFIG_PCI_SCAN_SHOW 1 */
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@ -77,7 +89,11 @@
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#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
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#define CONFIG_NS8382X 1
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#define ADD_PCI_CMD 0 /* CFG_CMD_PCI */
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#ifdef CONFIG_STK52XX
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#define ADD_PCI_CMD CFG_CMD_PCI
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#elif
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#define ADD_PCI_CMD 0
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#endif
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|
||||
#else /* MPC5100 */
|
||||
|
||||
|
|
@ -92,9 +108,10 @@
|
|||
#endif
|
||||
|
||||
/* USB */
|
||||
#if 0
|
||||
#ifdef CONFIG_STK52XX
|
||||
#define CONFIG_USB_OHCI
|
||||
#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
|
||||
#define CONFIG_DOS_PARTITION
|
||||
#define CONFIG_USB_STORAGE
|
||||
#else
|
||||
#define ADD_USB_CMD 0
|
||||
|
|
@ -114,7 +131,7 @@
|
|||
#endif
|
||||
|
||||
/* IDE */
|
||||
#if defined (CONFIG_MINIFAP)
|
||||
#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX)
|
||||
#define ADD_IDE_CMD CFG_CMD_IDE | CFG_CMD_FAT
|
||||
#else
|
||||
#define ADD_IDE_CMD 0
|
||||
|
|
@ -224,6 +241,29 @@
|
|||
"update=protect off 1:0-4; erase 1:0-4; cp.b 200000 0xfc000000 $(filesize); protect on 1:0-4\0" \
|
||||
"serverip=172.20.5.13\0" \
|
||||
""
|
||||
#else
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"netdev=eth0\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
"nfsroot=$(serverip):$(rootpath)\0" \
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||
"addip=setenv bootargs $(bootargs) " \
|
||||
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
|
||||
":$(hostname):$(netdev):off panic=1\0" \
|
||||
"flash_nfs=run nfsargs addip;" \
|
||||
"bootm $(kernel_addr)\0" \
|
||||
"flash_self=run ramargs addip;" \
|
||||
"bootm $(kernel_addr) $(ramdisk_addr)\0" \
|
||||
"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \
|
||||
"rootpath=/opt/eldk3.0_ppc/ppc_82xx\0" \
|
||||
"bootfile=uImage_tqm5200_mkr\0" \
|
||||
"load=tftp 200000 $(loadfile)\0" \
|
||||
"load133=tftp 200000 $(loadfile133)\0" \
|
||||
"loadfile=u-boot_tqm5200_mkr.bin\0" \
|
||||
"loadfile133=u-boot_tqm5200_133_mkr.bin\0" \
|
||||
"update=protect off fc000000 fc03ffff; erase fc000000 fc03ffff; cp.b 200000 0xfc000000 $(filesize); protect on fc000000 fc03ffff\0" \
|
||||
"serverip=172.20.5.13\0" \
|
||||
""
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
|
@ -306,23 +346,18 @@
|
|||
*/
|
||||
#define CFG_FLASH_BASE TEXT_BASE /* 0xFC000000 */
|
||||
|
||||
#if defined (CONFIG_TQM5200_AA) || defined (CONFIG_TQM5200_AC)
|
||||
#define CFG_FLASH_SIZE 0x00400000 /* 4 MByte */
|
||||
#define CFG_MAX_FLASH_SECT 35 /* max num of sects on one chip */
|
||||
#else
|
||||
#ifdef CONFIG_TQM5200_AB
|
||||
/* use CFI flash driver if no module variant is spezified */
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
|
||||
#define CFG_FLASH_EMPTY_INFO
|
||||
#define CFG_FLASH_SIZE 0x02000000 /* 32 MByte */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if !defined(CFG_LOWBOOT)
|
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00740000 + 0x00800000)
|
||||
#else /* CFG_LOWBOOT */
|
||||
#if defined(CONFIG_TQM5200_AA) || defined(CONFIG_TQM5200_AB) || \
|
||||
defined (CONFIG_TQM5200_AC)
|
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
|
||||
#endif
|
||||
#endif /* CFG_LOWBOOT */
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
|
||||
(= chip selects) */
|
||||
|
|
@ -388,15 +423,23 @@
|
|||
* 01 -> CAN1 on I2C1, CAN2 on Tmr0/1 do not use on TQM5200 with onboard
|
||||
* EEPROM
|
||||
* use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
|
||||
* use PSC6_1 and PSC6_3 as GPIO: Bits 9:11 (mask: 0x07000000):
|
||||
* 011 -> PSC6 could not be used as UART or CODEC. IrDA still possible.
|
||||
* use PSC6:
|
||||
* on STK52xx:
|
||||
* use as UART. Pins PSC6_0 to PSC6_3 are used.
|
||||
Bits 9:11 (mask: 0x00700000):
|
||||
* 101 -> PSC6 : Extended POST test is not available
|
||||
* on MINI-FAP and TQM5200_IB:
|
||||
* use PSC6_1 and PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
|
||||
* 011 -> PSC6 could not be used as UART or CODEC. IrDA still possible.
|
||||
* GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
|
||||
* tests.
|
||||
*/
|
||||
#if defined (CONFIG_MINIFAP)
|
||||
#define CFG_GPS_PORT_CONFIG 0x93000004
|
||||
#define CFG_GPS_PORT_CONFIG 0x91300004
|
||||
#elif defined (CONFIG_STK52XX)
|
||||
#define CFG_GPS_PORT_CONFIG 0x81500004
|
||||
#else
|
||||
#define CFG_GPS_PORT_CONFIG 0x83000004
|
||||
#define CFG_GPS_PORT_CONFIG 0x81300004
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -455,13 +498,22 @@
|
|||
#define CFG_CS0_START CFG_FLASH_BASE
|
||||
#define CFG_CS0_SIZE CFG_FLASH_SIZE
|
||||
|
||||
/* automatic configuration of chip selects */
|
||||
#ifdef CONFIG_CS_AUTOCONF
|
||||
#define CONFIG_LAST_STAGE_INIT
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SRAM - Do not map below 2 GB in address space, because this area is used
|
||||
* for SDRAM autosizing.
|
||||
*/
|
||||
#ifdef CONFIG_TQM5200_AB
|
||||
#if defined CONFIG_TQM5200_AB || defined (CONFIG_CS_AUTOCONF)
|
||||
#define CFG_CS2_START 0xE5000000
|
||||
#ifdef CONFIG_TQM5200_AB
|
||||
#define CFG_CS2_SIZE 0x80000 /* 512 kByte */
|
||||
#else /* CONFIG_CS_AUTOCONF */
|
||||
#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
|
||||
#endif
|
||||
#define CFG_CS2_CFG 0x0004D930
|
||||
#endif
|
||||
|
||||
|
|
@ -469,7 +521,8 @@
|
|||
* Grafic controller - Do not map below 2 GB in address space, because this
|
||||
* area is used for SDRAM autosizing.
|
||||
*/
|
||||
#if defined (CONFIG_TQM5200_AB) || defined (CONFIG_TQM5200_AC)
|
||||
#if defined (CONFIG_TQM5200_AB) || defined (CONFIG_TQM5200_AC) || \
|
||||
defined (CONFIG_CS_AUTOCONF)
|
||||
#define CFG_CS1_START 0xE0000000
|
||||
#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
|
||||
#define CFG_CS1_CFG 0x8F48FF70
|
||||
|
|
|
|||
Loading…
Reference in New Issue