Add M5271EVB board support.
This commit is contained in:
Marian Balakowicz
parent
6f5155a95c
commit
78b123cd69
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@ -2,6 +2,8 @@
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Changes since U-Boot 1.1.4:
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======================================================================
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* Add M5271EVB board support.
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* Make R5200 specific low level initialization board conditional.
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* Update CPU target identification strings for Coldfire family.
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2
MAKEALL
2
MAKEALL
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@ -277,7 +277,7 @@ LIST_microblaze="suzaku"
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## ColdFire Systems
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#########################################################################
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LIST_coldfire="cobra5272 M5272C3 M5282EVB TASREG r5200"
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LIST_coldfire="cobra5272 M5272C3 M5282EVB TASREG r5200 M5271EVB"
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#-----------------------------------------------------------------------
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3
Makefile
3
Makefile
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@ -1318,6 +1318,9 @@ TASREG_config : unconfig
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r5200_config : unconfig
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@./mkconfig $(@:_config=) m68k mcf52x2 r5200
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M5271EVB_config : unconfig
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@./mkconfig $(@:_config=) m68k mcf52x2 m5271evb
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#########################################################################
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## MPC83xx Systems
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#########################################################################
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@ -0,0 +1,40 @@
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o
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$(LIB): .depend $(OBJS)
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$(AR) crv $@ $(OBJS)
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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sinclude .depend
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#########################################################################
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@ -0,0 +1,25 @@
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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TEXT_BASE = 0xffe00000
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@ -0,0 +1,125 @@
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/*
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* (C) Copyright 2000-2006
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/m5271.h>
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#include <asm/immap_5271.h>
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int checkboard (void) {
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puts ("Board: Freescale M5271EVB\n");
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return 0;
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};
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long int initdram (int board_type) {
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int i;
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/* Enable Address lines 23-21 and lower 16bits of data path */
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mbar_writeByte(MCF_GPIO_PAR_AD, MCF_GPIO_AD_ADDR23 |
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MCF_GPIO_AD_ADDR22 | MCF_GPIO_AD_ADDR21 |
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MCF_GPIO_AD_DATAL);
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/* Set CS2 pin to be SD_CS0 */
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mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
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| MCF_GPIO_PAR_CS_PAR_CS2);
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/* Configure SDRAM Control Pin Assignemnt Register */
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mbar_writeByte(MCF_GPIO_PAR_SDRAM, MCF_GPIO_SDRAM_CSSDCS_00 |
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MCF_GPIO_SDRAM_SDWE | MCF_GPIO_SDRAM_SCAS |
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MCF_GPIO_SDRAM_SRAS | MCF_GPIO_SDRAM_SCKE |
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MCF_GPIO_SDRAM_SDCS_11);
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/*
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* Check to see if the SDRAM has already been initialized
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* by a run control tool
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*/
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if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE))
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{
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/* Initialize DRAM Control Register: DCR */
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mbar_writeShort(MCF_SDRAMC_DCR,
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MCF_SDRAMC_DCR_RTIM(0x01)
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| MCF_SDRAMC_DCR_RC(0x30));
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/*
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* Initialize DACR0
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*
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* CASL: 01
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* CBM: cmd at A20, bank select bits 21 and up
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* PS: 32bit port size
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*/
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mbar_writeLong(MCF_SDRAMC_DACR0,
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MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18)
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| MCF_SDRAMC_DACRn_CASL(1)
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| MCF_SDRAMC_DACRn_CBM(3)
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| MCF_SDRAMC_DACRn_PS(0));
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/* Initialize DMR0 */
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mbar_writeLong(MCF_SDRAMC_DMR0,
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MCF_SDRAMC_DMRn_BAM_16M
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| MCF_SDRAMC_DMRn_V);
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/* Set IP bit in DACR */
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mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
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| MCF_SDRAMC_DACRn_IP);
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/* Wait at least 20ns to allow banks to precharge */
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for (i = 0; i < 5; i++)
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asm(" nop");
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/* Write to this block to initiate precharge */
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*(u32 *)(CFG_SDRAM_BASE) = 0xa5a5a5a5;
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/* Set RE bit in DACR */
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mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
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| MCF_SDRAMC_DACRn_RE);
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/* Wait for at least 8 auto refresh cycles to occur */
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for (i = 0; i < 2000; i++)
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asm(" nop");
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/* Finish the configuration by issuing the MRS */
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mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
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| MCF_SDRAMC_DACRn_MRS);
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/*
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* Write to the SDRAM Mode Register A0-A11 = 0x400
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*
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* Write Burst Mode = Programmed Burst Length
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* Op Mode = Standard Op
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* CAS Latency = 2
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* Burst Type = Sequential
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* Burst Length = 1
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*/
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*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xa5a5a5a5;
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}
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return CFG_SDRAM_SIZE * 1024 * 1024;
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};
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int testdram (void) {
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/* TODO: XXX XXX XXX */
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printf ("DRAM test not implemented!\n");
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return (0);
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}
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@ -0,0 +1,145 @@
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/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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OUTPUT_ARCH(m68k)
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SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
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/* Do we need any of these for elf?
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__DYNAMIC = 0; */
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GROUP(libgcc.a)
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SECTIONS
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{
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/* Read-only sections, merged into text segment: */
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. = + SIZEOF_HEADERS;
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.interp : { *(.interp) }
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.rel.text : { *(.rel.text) }
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.rela.text : { *(.rela.text) }
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.rel.data : { *(.rel.data) }
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.rela.data : { *(.rela.data) }
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.rel.rodata : { *(.rel.rodata) }
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.rela.rodata : { *(.rela.rodata) }
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.rel.got : { *(.rel.got) }
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.rela.got : { *(.rela.got) }
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.rel.ctors : { *(.rel.ctors) }
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.rela.ctors : { *(.rela.ctors) }
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.rel.dtors : { *(.rel.dtors) }
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.rela.dtors : { *(.rela.dtors) }
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.rel.bss : { *(.rel.bss) }
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.rela.bss : { *(.rela.bss) }
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.rel.plt : { *(.rel.plt) }
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.rela.plt : { *(.rela.plt) }
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.init : { *(.init) }
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.plt : { *(.plt) }
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.text :
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{
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/* WARNING - the following is hand-optimized to fit within */
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/* the sector layout of our flash chips! XXX FIXME XXX */
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cpu/mcf52x2/start.o (.text)
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lib_m68k/traps.o (.text)
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cpu/mcf52x2/interrupts.o (.text)
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common/dlmalloc.o (.text)
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lib_generic/zlib.o (.text)
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. = DEFINED(env_offset) ? env_offset : .;
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common/environment.o (.ppcenv)
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*(.text)
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*(.fixup)
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*(.got1)
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}
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_etext = .;
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PROVIDE (etext = .);
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.rodata :
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{
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*(.rodata)
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*(.rodata1)
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}
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.fini : { *(.fini) } =0
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.ctors : { *(.ctors) }
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.dtors : { *(.dtors) }
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/* Read-write section, merged into data segment: */
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. = (. + 0x00FF) & 0xFFFFFF00;
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_erotext = .;
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PROVIDE (erotext = .);
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.reloc :
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{
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__got_start = .;
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*(.got)
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__got_end = .;
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_GOT2_TABLE_ = .;
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*(.got2)
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_FIXUP_TABLE_ = .;
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*(.fixup)
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}
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__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
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__fixup_entries = (. - _FIXUP_TABLE_)>>2;
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.data :
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{
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*(.data)
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*(.data1)
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*(.sdata)
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*(.sdata2)
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*(.dynamic)
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CONSTRUCTORS
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}
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_edata = .;
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PROVIDE (edata = .);
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. = .;
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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__u_boot_cmd_end = .;
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. = .;
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__start___ex_table = .;
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__ex_table : { *(__ex_table) }
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__stop___ex_table = .;
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. = ALIGN(256);
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__init_begin = .;
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.text.init : { *(.text.init) }
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.data.init : { *(.data.init) }
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. = ALIGN(256);
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__init_end = .;
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__bss_start = .;
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.bss :
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{
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_sbss = .;
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*(.sbss) *(.scommon)
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*(.dynbss)
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*(.bss)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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}
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_end = . ;
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PROVIDE (end = .);
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}
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@ -59,7 +59,8 @@
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defined(CONFIG_TQM8xxL) || \
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defined(CONFIG_RRVISION) || \
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defined(CONFIG_TRAB) || \
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defined(CONFIG_PPCHAMELEONEVB) ) && \
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defined(CONFIG_PPCHAMELEONEVB) || \
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defined(CONFIG_M5271EVB)) && \
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defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */
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/* XXX - This only works with GNU C */
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# define __PPCENV__ __attribute__ ((section(".ppcenv")))
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@ -0,0 +1,154 @@
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/*
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* Configuation settings for the Freescale M5271EVB
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*
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* Based on MC5272C3 and r5200 board configs
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* (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
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* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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*
|
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* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
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/*
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* board/config.h - configuration options, board specific
|
||||
*/
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||||
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#ifndef _M5271EVB_H
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#define _M5271EVB_H
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#define DEBUG
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#undef DEBUG
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_MCF52x2 /* define processor family */
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#define CONFIG_M5271 /* define processor type */
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#define CONFIG_M5271EVB /* define board type */
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#define CONFIG_IPADDR 192.168.30.1
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||||
#define CONFIG_SERVERIP 192.168.1.1
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#define CONFIG_ETHADDR 00:06:3b:01:41:55
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#define CONFIG_BAUDRATE 19200
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#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
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#undef CONFIG_WATCHDOG /* disable watchdog */
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/* Configuration for environment
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* Environment is embedded in u-boot in the second sector of the flash
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*/
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||||
#ifndef CONFIG_MONITOR_IS_IN_RAM
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#define CFG_ENV_OFFSET 0x4000
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#define CFG_ENV_SECT_SIZE 0x2000
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#define CFG_ENV_IS_IN_FLASH 1
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||||
#else
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||||
#define CFG_ENV_ADDR 0xffe04000
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#define CFG_ENV_SECT_SIZE 0x2000
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#define CFG_ENV_IS_IN_FLASH 1
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#endif
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#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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||||
#include <cmd_confdefs.h>
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||||
#define CFG_PROMPT "=> "
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||||
#define CFG_LONGHELP /* undef to save memory */
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|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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||||
#else
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||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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||||
#endif
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||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CFG_LOAD_ADDR 0x00100000
|
||||
|
||||
#define CFG_MEMTEST_START 0x400
|
||||
#define CFG_MEMTEST_END 0x380000
|
||||
|
||||
#define CFG_HZ 1000000
|
||||
#define CFG_CLK 100000000
|
||||
|
||||
/*
|
||||
* Low Level Configuration Settings
|
||||
* (address mappings, register initial values, etc.)
|
||||
* You should know what you are doing if you make changes here.
|
||||
*/
|
||||
|
||||
#define CFG_MBAR 0x40000000 /* Register Base Addrs */
|
||||
|
||||
/* Enable FEC ethernet */
|
||||
#define FEC_ENET
|
||||
#define CONFIG_NET_RETRY_COUNT 5
|
||||
#define CFG_ENET_BD_BASE 0x480000
|
||||
|
||||
/*
|
||||
* Definitions for initial stack pointer and data area (in DPRAM)
|
||||
*/
|
||||
#define CFG_INIT_RAM_ADDR 0x20000000
|
||||
#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
|
||||
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
|
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
|
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
|
||||
|
||||
/*
|
||||
* Start addresses for the final memory configuration
|
||||
* (Set up by the startup code)
|
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
|
||||
#define CFG_FLASH_BASE 0xffe00000
|
||||
|
||||
#ifdef CONFIG_MONITOR_IS_IN_RAM
|
||||
#define CFG_MONITOR_BASE 0x20000
|
||||
#else
|
||||
#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
|
||||
#endif
|
||||
|
||||
#define CFG_MONITOR_LEN 0x40000
|
||||
#define CFG_MALLOC_LEN (256 << 10)
|
||||
#define CFG_BOOTPARAMS_LEN (64*1024)
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization ??
|
||||
*/
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
|
||||
/* FLASH organization */
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
|
||||
#define CFG_FLASH_ERASE_TOUT 1000
|
||||
|
||||
#define CFG_FLASH_CFI 1
|
||||
#define CFG_FLASH_CFI_DRIVER 1
|
||||
#define CFG_FLASH_SIZE 0x200000
|
||||
|
||||
/* Cache Configuration */
|
||||
#define CFG_CACHELINE_SIZE 16
|
||||
|
||||
/* Port configuration */
|
||||
#define CFG_FECI2C 0xF0
|
||||
|
||||
#endif /* _M5271EVB_H */
|
||||
Loading…
Reference in New Issue