Convert SMC91111 Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added Also: - changed CONFIG_DRIVER_SMC91111 to CONFIG_SMC91111 - cleaned up line lengths - modified all boards that override weak function in this driver - modified all eeprom standalone apps to work with new driver - updated blackfin standalone EEPROM app after testing Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Ben Warren
parent
32e7f239dd
commit
7194ab8095
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@ -22,6 +22,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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int board_early_init_f (void)
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{
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@ -38,3 +39,14 @@ phys_size_t initdram (int board_type)
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{
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return (0);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -22,6 +22,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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int board_early_init_f (void)
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{
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@ -38,3 +39,14 @@ phys_size_t initdram (int board_type)
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{
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return (0);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -22,6 +22,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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int checkboard (void)
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{
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@ -33,3 +34,14 @@ phys_size_t initdram (int board_type)
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{
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return (0);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -34,9 +34,7 @@
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*/
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#include <common.h>
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#ifdef CONFIG_PCI
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#include <netdev.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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@ -127,9 +125,16 @@ extern void dram_query(void);
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return 0;
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}
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#ifdef CONFIG_PCI
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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#ifdef CONFIG_PCI
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rc += pci_eth_init(bis);
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#endif
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return rc;
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}
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#endif
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@ -34,6 +34,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -89,3 +90,14 @@ int dram_init (void)
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{
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -26,6 +26,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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#include "psd4256.h"
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#include "flash-defines.h"
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@ -57,3 +58,10 @@ int misc_init_r(void)
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return 0;
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}
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#ifdef CONFIG_SMC91111
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int board_eth_init(bd_t *bis)
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{
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return smc91111_initialize(0, CONFIG_SMC91111_BASE);
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}
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#endif
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@ -26,6 +26,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include "bf533-stamp.h"
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@ -283,3 +284,10 @@ void __led_toggle(led_id_t mask)
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}
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#endif
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#ifdef CONFIG_SMC91111
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int board_eth_init(bd_t *bis)
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{
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return smc91111_initialize(0, CONFIG_SMC91111_BASE);
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}
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#endif
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@ -7,6 +7,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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#include <config.h>
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#include <asm/blackfin.h>
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@ -25,3 +26,10 @@ phys_size_t initdram(int board_type)
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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#ifdef CONFIG_SMC91111
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int board_eth_init(bd_t *bis)
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{
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return smc91111_initialize(0, CONFIG_SMC91111_BASE);
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}
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#endif
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@ -26,6 +26,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -43,3 +44,10 @@ phys_size_t initdram(int board_type)
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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#ifdef CONFIG_SMC91111
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int board_eth_init(bd_t *bis)
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{
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return smc91111_initialize(0, CONFIG_SMC91111_BASE);
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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SSYNC();
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}
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#endif
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#ifdef CONFIG_SMC91111
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int board_eth_init(bd_t *bis)
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{
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return smc91111_initialize(0, CONFIG_SMC91111_BASE);
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -71,3 +72,14 @@ int dram_init (void)
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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#ifdef CONFIG_SMC91111
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int board_eth_init(bd_t *bis)
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{
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return smc91111_initialize(0, CONFIG_SMC91111_BASE);
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
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return gd->bd->bi_memsize;
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}
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#ifdef CONFIG_SMC91111
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int board_eth_init(bd_t *bis)
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{
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return smc91111_initialize(0, CONFIG_SMC91111_BASE);
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}
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#endif
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#include <asm/arch/pxa-regs.h>
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#include <common.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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PHYS_SDRAM_3_SIZE +
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PHYS_SDRAM_4_SIZE );
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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#include <i2c.h>
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#include <da9030.h>
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#include <malloc.h>
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i2c_reg_write(addr, SYS_CONTROL_A, val);
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}
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#endif
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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#include <SA-1100.h>
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DECLARE_GLOBAL_DATA_PTR;
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return (0);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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#include <config.h>
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#include <asm/leon.h>
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{
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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#include <config.h>
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#include <asm/leon.h>
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{
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/mach-types.h>
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return;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/arch/pxa-regs.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -120,3 +121,14 @@ void show_boot_progress (int status)
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return;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -26,6 +26,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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#if defined(CONFIG_LH7A400)
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#include <lh7a400.h>
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#elif defined(CONFIG_LH7A404)
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@ -79,3 +80,14 @@ int dram_init (void)
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return 0;
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -24,6 +24,7 @@
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*/
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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@ -57,3 +58,14 @@ void led_set_state(unsigned short value)
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{
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writew(value & 0xFF, LED_BASE);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_SMC91111
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rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
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#endif
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return rc;
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}
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#endif
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@ -27,43 +27,42 @@
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#include <common.h>
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#include <exports.h>
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#include <timestamp.h>
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#include <net.h>
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#include "../drivers/net/smc91111.h"
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#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
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static u16 read_eeprom_reg(u16 reg)
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static u16 read_eeprom_reg(struct eth_device *dev, u16 reg)
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{
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int timeout;
|
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SMC_SELECT_BANK(2);
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SMC_outw(reg, PTR_REG);
|
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SMC_SELECT_BANK(dev, 2);
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SMC_outw(dev, reg, PTR_REG);
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||||
SMC_SELECT_BANK(1);
|
||||
SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
|
||||
SMC_SELECT_BANK(dev, 1);
|
||||
SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
|
||||
CTL_REG);
|
||||
timeout = 100;
|
||||
while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
|
||||
while((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
|
||||
udelay(100);
|
||||
if (timeout == 0) {
|
||||
printf("Timeout Reading EEPROM register %02x\n", reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return SMC_inw (GP_REG);
|
||||
return SMC_inw (dev, GP_REG);
|
||||
}
|
||||
|
||||
static int write_eeprom_reg(u16 value, u16 reg)
|
||||
static int write_eeprom_reg(struct eth_device *dev, u16 value, u16 reg)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
SMC_SELECT_BANK(2);
|
||||
SMC_outw(reg, PTR_REG);
|
||||
SMC_SELECT_BANK(dev, 2);
|
||||
SMC_outw(dev, reg, PTR_REG);
|
||||
|
||||
SMC_SELECT_BANK(1);
|
||||
SMC_outw(value, GP_REG);
|
||||
SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
|
||||
SMC_SELECT_BANK(dev, 1);
|
||||
SMC_outw(dev, value, GP_REG);
|
||||
SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
|
||||
timeout = 100;
|
||||
while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout)
|
||||
while ((SMC_inw(dev, CTL_REG) & CTL_STORE) && --timeout)
|
||||
udelay (100);
|
||||
if (timeout == 0) {
|
||||
printf("Timeout Writing EEPROM register %02x\n", reg);
|
||||
|
|
@ -73,17 +72,17 @@ static int write_eeprom_reg(u16 value, u16 reg)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static int write_data(u16 *buf, int len)
|
||||
static int write_data(struct eth_device *dev, u16 *buf, int len)
|
||||
{
|
||||
u16 reg = 0x23;
|
||||
|
||||
while (len--)
|
||||
write_eeprom_reg(*buf++, reg++);
|
||||
write_eeprom_reg(dev, *buf++, reg++);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int verify_macaddr(char *s)
|
||||
static int verify_macaddr(struct eth_device *dev, char *s)
|
||||
{
|
||||
u16 reg;
|
||||
int i, err = 0;
|
||||
|
|
@ -91,7 +90,7 @@ static int verify_macaddr(char *s)
|
|||
printf("MAC Address: ");
|
||||
err = i = 0;
|
||||
for (i = 0; i < 3; i++) {
|
||||
reg = read_eeprom_reg(0x20 + i);
|
||||
reg = read_eeprom_reg(dev, 0x20 + i);
|
||||
printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n');
|
||||
if (s)
|
||||
err |= reg != ((u16 *)s)[i];
|
||||
|
|
@ -100,7 +99,7 @@ static int verify_macaddr(char *s)
|
|||
return err ? 0 : 1;
|
||||
}
|
||||
|
||||
static int set_mac(char *s)
|
||||
static int set_mac(struct eth_device *dev, char *s)
|
||||
{
|
||||
int i;
|
||||
char *e, eaddr[6];
|
||||
|
|
@ -112,7 +111,7 @@ static int set_mac(char *s)
|
|||
}
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i);
|
||||
write_eeprom_reg(dev, *(((u16 *)eaddr) + i), 0x20 + i);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -150,6 +149,10 @@ int eeprom(int argc, char *argv[])
|
|||
int i, len, ret;
|
||||
unsigned char buf[58], *p;
|
||||
|
||||
struct eth_device dev = {
|
||||
.iobase = CONFIG_SMC91111_BASE
|
||||
};
|
||||
|
||||
app_startup(argv);
|
||||
if (get_version() != XF_VERSION) {
|
||||
printf("Wrong XF_VERSION.\n");
|
||||
|
|
@ -160,14 +163,14 @@ int eeprom(int argc, char *argv[])
|
|||
|
||||
return crcek();
|
||||
|
||||
if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
|
||||
if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
|
||||
printf("SMSC91111 not found.\n");
|
||||
return 2;
|
||||
}
|
||||
|
||||
/* Called without parameters - print MAC address */
|
||||
if (argc < 2) {
|
||||
verify_macaddr(NULL);
|
||||
verify_macaddr(&dev, NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -201,8 +204,8 @@ int eeprom(int argc, char *argv[])
|
|||
}
|
||||
|
||||
/* First argument (MAC) is mandatory */
|
||||
set_mac(argv[1]);
|
||||
if (verify_macaddr(argv[1])) {
|
||||
set_mac(&dev, argv[1]);
|
||||
if (verify_macaddr(&dev, argv[1])) {
|
||||
printf("*** MAC address does not match! ***\n");
|
||||
return 4;
|
||||
}
|
||||
|
|
@ -210,7 +213,7 @@ int eeprom(int argc, char *argv[])
|
|||
while (len--)
|
||||
*p++ = 0;
|
||||
|
||||
write_data((u16 *)buf, sizeof(buf) >> 1);
|
||||
write_data(&dev, (u16 *)buf, sizeof(buf) >> 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
#include <i2c.h>
|
||||
#include <flash.h>
|
||||
#include <nand.h>
|
||||
|
|
@ -115,3 +116,14 @@ int board_nand_init(struct nand_chip *nand)
|
|||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
|
||||
int board_early_init_f (void)
|
||||
{
|
||||
|
|
@ -38,3 +39,14 @@ phys_size_t initdram (int board_type)
|
|||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
#include <command.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
|
@ -133,3 +134,14 @@ U_BOOT_CMD(idpcmd, CONFIG_SYS_MAXARGS, 0, do_idpcmd,
|
|||
);
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -24,6 +24,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
|
|
@ -51,3 +52,14 @@ int dram_init (void)
|
|||
void led_set_state (unsigned short value)
|
||||
{
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/gpio.h>
|
||||
|
||||
|
|
@ -89,3 +90,14 @@ int dram_init(void)
|
|||
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -27,43 +27,42 @@
|
|||
#include <common.h>
|
||||
#include <exports.h>
|
||||
#include <timestamp.h>
|
||||
#include <net.h>
|
||||
#include "../drivers/net/smc91111.h"
|
||||
|
||||
#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
|
||||
|
||||
static u16 read_eeprom_reg(u16 reg)
|
||||
static u16 read_eeprom_reg(struct eth_device *dev, u16 reg)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
SMC_SELECT_BANK(2);
|
||||
SMC_outw(reg, PTR_REG);
|
||||
SMC_SELECT_BANK(dev, 2);
|
||||
SMC_outw(dev, reg, PTR_REG);
|
||||
|
||||
SMC_SELECT_BANK(1);
|
||||
SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
|
||||
SMC_SELECT_BANK(dev, 1);
|
||||
SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
|
||||
CTL_REG);
|
||||
timeout = 100;
|
||||
while((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
|
||||
while((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
|
||||
udelay(100);
|
||||
if (timeout == 0) {
|
||||
printf("Timeout Reading EEPROM register %02x\n", reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return SMC_inw (GP_REG);
|
||||
return SMC_inw (dev, GP_REG);
|
||||
}
|
||||
|
||||
static int write_eeprom_reg(u16 value, u16 reg)
|
||||
static int write_eeprom_reg(struct eth_device *dev, u16 value, u16 reg)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
SMC_SELECT_BANK(2);
|
||||
SMC_outw(reg, PTR_REG);
|
||||
SMC_SELECT_BANK(dev, 2);
|
||||
SMC_outw(dev, reg, PTR_REG);
|
||||
|
||||
SMC_SELECT_BANK(1);
|
||||
SMC_outw(value, GP_REG);
|
||||
SMC_outw(SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
|
||||
SMC_SELECT_BANK(dev, 1);
|
||||
SMC_outw(dev, value, GP_REG);
|
||||
SMC_outw(dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
|
||||
timeout = 100;
|
||||
while ((SMC_inw(CTL_REG) & CTL_STORE) && --timeout)
|
||||
while ((SMC_inw(dev, CTL_REG) & CTL_STORE) && --timeout)
|
||||
udelay (100);
|
||||
if (timeout == 0) {
|
||||
printf("Timeout Writing EEPROM register %02x\n", reg);
|
||||
|
|
@ -73,17 +72,17 @@ static int write_eeprom_reg(u16 value, u16 reg)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static int write_data(u16 *buf, int len)
|
||||
static int write_data(struct eth_device *dev, u16 *buf, int len)
|
||||
{
|
||||
u16 reg = 0x23;
|
||||
|
||||
while (len--)
|
||||
write_eeprom_reg(*buf++, reg++);
|
||||
write_eeprom_reg(dev, *buf++, reg++);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int verify_macaddr(char *s)
|
||||
static int verify_macaddr(struct eth_device *dev, char *s)
|
||||
{
|
||||
u16 reg;
|
||||
int i, err = 0;
|
||||
|
|
@ -91,7 +90,7 @@ static int verify_macaddr(char *s)
|
|||
printf("MAC Address: ");
|
||||
err = i = 0;
|
||||
for (i = 0; i < 3; i++) {
|
||||
reg = read_eeprom_reg(0x20 + i);
|
||||
reg = read_eeprom_reg(dev, 0x20 + i);
|
||||
printf("%02x:%02x%c", reg & 0xff, reg >> 8, i != 2 ? ':' : '\n');
|
||||
if (s)
|
||||
err |= reg != ((u16 *)s)[i];
|
||||
|
|
@ -100,7 +99,7 @@ static int verify_macaddr(char *s)
|
|||
return err ? 0 : 1;
|
||||
}
|
||||
|
||||
static int set_mac(char *s)
|
||||
static int set_mac(struct eth_device *dev, char *s)
|
||||
{
|
||||
int i;
|
||||
char *e, eaddr[6];
|
||||
|
|
@ -112,7 +111,7 @@ static int set_mac(char *s)
|
|||
}
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
write_eeprom_reg(*(((u16 *)eaddr) + i), 0x20 + i);
|
||||
write_eeprom_reg(dev, *(((u16 *)eaddr) + i), 0x20 + i);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -148,6 +147,10 @@ int eeprom(int argc, char *argv[])
|
|||
int i, len, ret;
|
||||
unsigned char buf[58], *p;
|
||||
|
||||
struct eth_device dev = {
|
||||
.iobase = CONFIG_SMC91111_BASE
|
||||
};
|
||||
|
||||
app_startup(argv);
|
||||
if (get_version() != XF_VERSION) {
|
||||
printf("Wrong XF_VERSION.\n");
|
||||
|
|
@ -156,14 +159,14 @@ int eeprom(int argc, char *argv[])
|
|||
return 1;
|
||||
}
|
||||
|
||||
if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
|
||||
if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
|
||||
printf("SMSC91111 not found.\n");
|
||||
return 2;
|
||||
}
|
||||
|
||||
/* Called without parameters - print MAC address */
|
||||
if (argc < 2) {
|
||||
verify_macaddr(NULL);
|
||||
verify_macaddr(&dev, NULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -197,8 +200,8 @@ int eeprom(int argc, char *argv[])
|
|||
}
|
||||
|
||||
/* First argument (MAC) is mandatory */
|
||||
set_mac(argv[1]);
|
||||
if (verify_macaddr(argv[1])) {
|
||||
set_mac(&dev, argv[1]);
|
||||
if (verify_macaddr(&dev, argv[1])) {
|
||||
printf("*** MAC address does not match! ***\n");
|
||||
return 4;
|
||||
}
|
||||
|
|
@ -206,7 +209,7 @@ int eeprom(int argc, char *argv[])
|
|||
while (len--)
|
||||
*p++ = 0;
|
||||
|
||||
write_data((u16 *)buf, sizeof(buf) >> 1);
|
||||
write_data(&dev, (u16 *)buf, sizeof(buf) >> 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
@ -66,3 +67,14 @@ int board_late_init(void)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
@ -71,3 +72,14 @@ int dram_init (void)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@
|
|||
|
||||
#include <asm/arch/pxa-regs.h>
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
@ -80,3 +81,14 @@ dram_init (void)
|
|||
|
||||
return (0);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
@ -61,3 +62,14 @@ int dram_init (void)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <netdev.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
|
|
@ -68,3 +69,14 @@ int dram_init (void)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CMD_NET
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rc = 0;
|
||||
#ifdef CONFIG_SMC91111
|
||||
rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ COBJS-$(CONFIG_RTL8139) += rtl8139.o
|
|||
COBJS-$(CONFIG_RTL8169) += rtl8169.o
|
||||
COBJS-$(CONFIG_DRIVER_S3C4510_ETH) += s3c4510b_eth.o
|
||||
COBJS-$(CONFIG_SH_ETHER) += sh_eth.o
|
||||
COBJS-$(CONFIG_DRIVER_SMC91111) += smc91111.o
|
||||
COBJS-$(CONFIG_SMC91111) += smc91111.o
|
||||
COBJS-$(CONFIG_SMC911X) += smc911x.o
|
||||
COBJS-$(CONFIG_TIGON3) += tigon3.o bcm570x_autoneg.o 5701rls.o
|
||||
COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -58,6 +58,10 @@ typedef unsigned char byte;
|
|||
typedef unsigned short word;
|
||||
typedef unsigned long int dword;
|
||||
|
||||
struct smc91111_priv{
|
||||
u8 dev_num;
|
||||
};
|
||||
|
||||
/*
|
||||
. DEBUGGING LEVELS
|
||||
.
|
||||
|
|
@ -77,32 +81,32 @@ typedef unsigned long int dword;
|
|||
#ifdef CONFIG_PXA250
|
||||
|
||||
#ifdef CONFIG_XSENGINE
|
||||
#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
|
||||
#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))))
|
||||
#define SMC_inb(p) ({ \
|
||||
unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p<<1)); \
|
||||
#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1))))
|
||||
#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r<<1))))
|
||||
#define SMC_inb(a,p) ({ \
|
||||
unsigned int __p = (unsigned int)((a)->iobase + (p<<1)); \
|
||||
unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \
|
||||
if (__p & 2) __v >>= 8; \
|
||||
else __v &= 0xff; \
|
||||
__v; })
|
||||
#elif defined(CONFIG_XAENIAX)
|
||||
#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
|
||||
#define SMC_inw(z) ({ \
|
||||
unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (z)); \
|
||||
#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
|
||||
#define SMC_inw(a,z) ({ \
|
||||
unsigned int __p = (unsigned int)((a)->iobase + (z)); \
|
||||
unsigned int __v = *(volatile unsigned int *)((__p) & ~3); \
|
||||
if (__p & 3) __v >>= 16; \
|
||||
else __v &= 0xffff; \
|
||||
__v; })
|
||||
#define SMC_inb(p) ({ \
|
||||
unsigned int ___v = SMC_inw((p) & ~1); \
|
||||
#define SMC_inb(a,p) ({ \
|
||||
unsigned int ___v = SMC_inw((a),(p) & ~1); \
|
||||
if (p & 1) ___v >>= 8; \
|
||||
else ___v &= 0xff; \
|
||||
___v; })
|
||||
#else
|
||||
#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
|
||||
#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
|
||||
#define SMC_inb(p) ({ \
|
||||
unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p)); \
|
||||
#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
|
||||
#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
|
||||
#define SMC_inb(a,p) ({ \
|
||||
unsigned int __p = (unsigned int)((a)->iobase + (p)); \
|
||||
unsigned int __v = *(volatile unsigned short *)((__p) & ~1); \
|
||||
if (__p & 1) __v >>= 8; \
|
||||
else __v &= 0xff; \
|
||||
|
|
@ -110,69 +114,69 @@ typedef unsigned long int dword;
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_XSENGINE
|
||||
#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
|
||||
#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))) = d)
|
||||
#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d)
|
||||
#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r<<1))) = d)
|
||||
#elif defined (CONFIG_XAENIAX)
|
||||
#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
|
||||
#define SMC_outw(d,p) ({ \
|
||||
dword __dwo = SMC_inl((p) & ~3); \
|
||||
#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
|
||||
#define SMC_outw(a,d,p) ({ \
|
||||
dword __dwo = SMC_inl((a),(p) & ~3); \
|
||||
dword __dwn = (word)(d); \
|
||||
__dwo &= ((p) & 3) ? 0x0000ffff : 0xffff0000; \
|
||||
__dwo |= ((p) & 3) ? __dwn << 16 : __dwn; \
|
||||
SMC_outl(__dwo, (p) & ~3); \
|
||||
SMC_outl((a), __dwo, (p) & ~3); \
|
||||
})
|
||||
#else
|
||||
#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
|
||||
#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
|
||||
#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
|
||||
#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
|
||||
#endif
|
||||
|
||||
#define SMC_outb(d,r) ({ word __d = (byte)(d); \
|
||||
word __w = SMC_inw((r)&~1); \
|
||||
#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
|
||||
word __w = SMC_inw((a),(r)&~1); \
|
||||
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
|
||||
__w |= ((r)&1) ? __d<<8 : __d; \
|
||||
SMC_outw(__w,(r)&~1); \
|
||||
SMC_outw((a),__w,(r)&~1); \
|
||||
})
|
||||
|
||||
#define SMC_outsl(r,b,l) ({ int __i; \
|
||||
#define SMC_outsl(a,r,b,l) ({ int __i; \
|
||||
dword *__b2; \
|
||||
__b2 = (dword *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
SMC_outl( *(__b2 + __i), r); \
|
||||
SMC_outl((a), *(__b2 + __i), r); \
|
||||
} \
|
||||
})
|
||||
|
||||
#define SMC_outsw(r,b,l) ({ int __i; \
|
||||
#define SMC_outsw(a,r,b,l) ({ int __i; \
|
||||
word *__b2; \
|
||||
__b2 = (word *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
SMC_outw( *(__b2 + __i), r); \
|
||||
SMC_outw((a), *(__b2 + __i), r); \
|
||||
} \
|
||||
})
|
||||
|
||||
#define SMC_insl(r,b,l) ({ int __i ; \
|
||||
#define SMC_insl(a,r,b,l) ({ int __i ; \
|
||||
dword *__b2; \
|
||||
__b2 = (dword *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inl(r); \
|
||||
SMC_inl(0); \
|
||||
*(__b2 + __i) = SMC_inl((a),(r)); \
|
||||
SMC_inl((a),0); \
|
||||
}; \
|
||||
})
|
||||
|
||||
#define SMC_insw(r,b,l) ({ int __i ; \
|
||||
#define SMC_insw(a,r,b,l) ({ int __i ; \
|
||||
word *__b2; \
|
||||
__b2 = (word *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inw(r); \
|
||||
SMC_inw(0); \
|
||||
*(__b2 + __i) = SMC_inw((a),(r)); \
|
||||
SMC_inw((a),0); \
|
||||
}; \
|
||||
})
|
||||
|
||||
#define SMC_insb(r,b,l) ({ int __i ; \
|
||||
#define SMC_insb(a,r,b,l) ({ int __i ; \
|
||||
byte *__b2; \
|
||||
__b2 = (byte *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inb(r); \
|
||||
SMC_inb(0); \
|
||||
*(__b2 + __i) = SMC_inb((a),(r)); \
|
||||
SMC_inb((a),0); \
|
||||
}; \
|
||||
})
|
||||
|
||||
|
|
@ -187,61 +191,61 @@ typedef unsigned long int dword;
|
|||
((0x00FF0000UL & _x) >> 8) | \
|
||||
(_x >> 24)); })
|
||||
|
||||
#define SMC_inl(r) (SMC_LEON_SWAP32((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0)))))
|
||||
#define SMC_inl_nosw(r) ((*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))))
|
||||
#define SMC_inw(r) (SMC_LEON_SWAP16((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0)))))
|
||||
#define SMC_inw_nosw(r) ((*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))))
|
||||
#define SMC_inb(p) ({ \
|
||||
word ___v = SMC_inw((p) & ~1); \
|
||||
#define SMC_inl(a,r) (SMC_LEON_SWAP32((*(volatile dword *)((a)->iobase+((r)<<0)))))
|
||||
#define SMC_inl_nosw(a,r) ((*(volatile dword *)((a)->iobase+((r)<<0))))
|
||||
#define SMC_inw(a,r) (SMC_LEON_SWAP16((*(volatile word *)((a)->iobase+((r)<<0)))))
|
||||
#define SMC_inw_nosw(a,r) ((*(volatile word *)((a)->iobase+((r)<<0))))
|
||||
#define SMC_inb(a,p) ({ \
|
||||
word ___v = SMC_inw((a),(p) & ~1); \
|
||||
if ((p) & 1) ___v >>= 8; \
|
||||
else ___v &= 0xff; \
|
||||
___v; })
|
||||
|
||||
#define SMC_outl(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP32(d))
|
||||
#define SMC_outl_nosw(d,r) (*(volatile dword *)(SMC_BASE_ADDRESS+((r)<<0))=(d))
|
||||
#define SMC_outw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=SMC_LEON_SWAP16(d))
|
||||
#define SMC_outw_nosw(d,r) (*(volatile word *)(SMC_BASE_ADDRESS+((r)<<0))=(d))
|
||||
#define SMC_outb(d,r) do{ word __d = (byte)(d); \
|
||||
word __w = SMC_inw((r)&~1); \
|
||||
#define SMC_outl(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP32(d))
|
||||
#define SMC_outl_nosw(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=(d))
|
||||
#define SMC_outw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP16(d))
|
||||
#define SMC_outw_nosw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=(d))
|
||||
#define SMC_outb(a,d,r) do{ word __d = (byte)(d); \
|
||||
word __w = SMC_inw((a),(r)&~1); \
|
||||
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
|
||||
__w |= ((r)&1) ? __d<<8 : __d; \
|
||||
SMC_outw(__w,(r)&~1); \
|
||||
SMC_outw((a),__w,(r)&~1); \
|
||||
}while(0)
|
||||
#define SMC_outsl(r,b,l) do{ int __i; \
|
||||
#define SMC_outsl(a,r,b,l) do{ int __i; \
|
||||
dword *__b2; \
|
||||
__b2 = (dword *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
SMC_outl_nosw( *(__b2 + __i), r); \
|
||||
SMC_outl_nosw((a), *(__b2 + __i), r); \
|
||||
} \
|
||||
}while(0)
|
||||
#define SMC_outsw(r,b,l) do{ int __i; \
|
||||
#define SMC_outsw(a,r,b,l) do{ int __i; \
|
||||
word *__b2; \
|
||||
__b2 = (word *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
SMC_outw_nosw( *(__b2 + __i), r); \
|
||||
SMC_outw_nosw((a), *(__b2 + __i), r); \
|
||||
} \
|
||||
}while(0)
|
||||
#define SMC_insl(r,b,l) do{ int __i ; \
|
||||
#define SMC_insl(a,r,b,l) do{ int __i ; \
|
||||
dword *__b2; \
|
||||
__b2 = (dword *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inl_nosw(r); \
|
||||
*(__b2 + __i) = SMC_inl_nosw((a),(r)); \
|
||||
}; \
|
||||
}while(0)
|
||||
|
||||
#define SMC_insw(r,b,l) do{ int __i ; \
|
||||
#define SMC_insw(a,r,b,l) do{ int __i ; \
|
||||
word *__b2; \
|
||||
__b2 = (word *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inw_nosw(r); \
|
||||
*(__b2 + __i) = SMC_inw_nosw((a),(r)); \
|
||||
}; \
|
||||
}while(0)
|
||||
|
||||
#define SMC_insb(r,b,l) do{ int __i ; \
|
||||
#define SMC_insb(a,r,b,l) do{ int __i ; \
|
||||
byte *__b2; \
|
||||
__b2 = (byte *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inb(r); \
|
||||
*(__b2 + __i) = SMC_inb((a),(r)); \
|
||||
}; \
|
||||
}while(0)
|
||||
|
||||
|
|
@ -253,48 +257,48 @@ typedef unsigned long int dword;
|
|||
*/
|
||||
|
||||
#ifdef CONFIG_ADNPESC1
|
||||
#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
|
||||
#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
|
||||
#elif CONFIG_BLACKFIN
|
||||
#define SMC_inw(r) ({ word __v = (*((volatile word *)(SMC_BASE_ADDRESS+(r)))); SSYNC(); __v;})
|
||||
#define SMC_inw(a,r) ({ word __v = (*((volatile word *)((a)->iobase+(r)))); SSYNC(); __v;})
|
||||
#else
|
||||
#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
|
||||
#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
|
||||
#endif
|
||||
#define SMC_inb(r) (((r)&1) ? SMC_inw((r)&~1)>>8 : SMC_inw(r)&0xFF)
|
||||
#define SMC_inb(a,r) (((r)&1) ? SMC_inw((a),(r)&~1)>>8 : SMC_inw((a),(r)&0xFF))
|
||||
|
||||
#ifdef CONFIG_ADNPESC1
|
||||
#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
|
||||
#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+((r)<<1))) = d)
|
||||
#elif CONFIG_BLACKFIN
|
||||
#define SMC_outw(d,r) {(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d); SSYNC();}
|
||||
#define SMC_outw(a,d,r) {(*((volatile word *)((a)->iobase+(r))) = d); SSYNC();}
|
||||
#else
|
||||
#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
|
||||
#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
|
||||
#endif
|
||||
#define SMC_outb(d,r) ({ word __d = (byte)(d); \
|
||||
word __w = SMC_inw((r)&~1); \
|
||||
#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
|
||||
word __w = SMC_inw((a),(r)&~1); \
|
||||
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
|
||||
__w |= ((r)&1) ? __d<<8 : __d; \
|
||||
SMC_outw(__w,(r)&~1); \
|
||||
SMC_outw((a),__w,(r)&~1); \
|
||||
})
|
||||
#if 0
|
||||
#define SMC_outsw(r,b,l) outsw(SMC_BASE_ADDRESS+(r), (b), (l))
|
||||
#define SMC_outsw(a,r,b,l) outsw((a)->iobase+(r), (b), (l))
|
||||
#else
|
||||
#define SMC_outsw(r,b,l) ({ int __i; \
|
||||
#define SMC_outsw(a,r,b,l) ({ int __i; \
|
||||
word *__b2; \
|
||||
__b2 = (word *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
SMC_outw( *(__b2 + __i), r); \
|
||||
SMC_outw((a), *(__b2 + __i), r); \
|
||||
} \
|
||||
})
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
#define SMC_insw(r,b,l) insw(SMC_BASE_ADDRESS+(r), (b), (l))
|
||||
#define SMC_insw(a,r,b,l) insw((a)->iobase+(r), (b), (l))
|
||||
#else
|
||||
#define SMC_insw(r,b,l) ({ int __i ; \
|
||||
#define SMC_insw(a,r,b,l) ({ int __i ; \
|
||||
word *__b2; \
|
||||
__b2 = (word *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inw(r); \
|
||||
SMC_inw(0); \
|
||||
*(__b2 + __i) = SMC_inw((a),(r)); \
|
||||
SMC_inw((a),0); \
|
||||
}; \
|
||||
})
|
||||
#endif
|
||||
|
|
@ -304,30 +308,30 @@ typedef unsigned long int dword;
|
|||
#if defined(CONFIG_SMC_USE_32_BIT)
|
||||
|
||||
#ifdef CONFIG_XSENGINE
|
||||
#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
|
||||
#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1))))
|
||||
#else
|
||||
#define SMC_inl(r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
|
||||
#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
|
||||
#endif
|
||||
|
||||
#define SMC_insl(r,b,l) ({ int __i ; \
|
||||
#define SMC_insl(a,r,b,l) ({ int __i ; \
|
||||
dword *__b2; \
|
||||
__b2 = (dword *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
*(__b2 + __i) = SMC_inl(r); \
|
||||
SMC_inl(0); \
|
||||
*(__b2 + __i) = SMC_inl((a),(r)); \
|
||||
SMC_inl((a),0); \
|
||||
}; \
|
||||
})
|
||||
|
||||
#ifdef CONFIG_XSENGINE
|
||||
#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
|
||||
#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d)
|
||||
#else
|
||||
#define SMC_outl(d,r) (*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
|
||||
#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
|
||||
#endif
|
||||
#define SMC_outsl(r,b,l) ({ int __i; \
|
||||
#define SMC_outsl(a,r,b,l) ({ int __i; \
|
||||
dword *__b2; \
|
||||
__b2 = (dword *) b; \
|
||||
for (__i = 0; __i < l; __i++) { \
|
||||
SMC_outl( *(__b2 + __i), r); \
|
||||
SMC_outl((a), *(__b2 + __i), r); \
|
||||
} \
|
||||
})
|
||||
|
||||
|
|
@ -752,25 +756,25 @@ enum {
|
|||
|
||||
/* select a register bank, 0 to 3 */
|
||||
|
||||
#define SMC_SELECT_BANK(x) { SMC_outw( x, BANK_SELECT ); }
|
||||
#define SMC_SELECT_BANK(a,x) { SMC_outw((a), (x), BANK_SELECT ); }
|
||||
|
||||
/* this enables an interrupt in the interrupt mask register */
|
||||
#define SMC_ENABLE_INT(x) {\
|
||||
#define SMC_ENABLE_INT(a,x) {\
|
||||
unsigned char mask;\
|
||||
SMC_SELECT_BANK(2);\
|
||||
mask = SMC_inb( IM_REG );\
|
||||
SMC_SELECT_BANK((a),2);\
|
||||
mask = SMC_inb((a), IM_REG );\
|
||||
mask |= (x);\
|
||||
SMC_outb( mask, IM_REG ); \
|
||||
SMC_outb( (a), mask, IM_REG ); \
|
||||
}
|
||||
|
||||
/* this disables an interrupt from the interrupt mask register */
|
||||
|
||||
#define SMC_DISABLE_INT(x) {\
|
||||
#define SMC_DISABLE_INT(a,x) {\
|
||||
unsigned char mask;\
|
||||
SMC_SELECT_BANK(2);\
|
||||
mask = SMC_inb( IM_REG );\
|
||||
mask = SMC_inb( (a), IM_REG );\
|
||||
mask &= ~(x);\
|
||||
SMC_outb( mask, IM_REG ); \
|
||||
SMC_outb( (a), mask, IM_REG ); \
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -29,9 +29,11 @@
|
|||
|
||||
#include <common.h>
|
||||
#include <exports.h>
|
||||
/* the smc91111.h gets base addr through eth_device' iobase */
|
||||
struct eth_device { unsigned long iobase; };
|
||||
#include "../drivers/net/smc91111.h"
|
||||
|
||||
#ifdef CONFIG_DRIVER_SMC91111
|
||||
#ifdef CONFIG_SMC91111
|
||||
|
||||
#ifndef SMC91111_EEPROM_INIT
|
||||
# define SMC91111_EEPROM_INIT()
|
||||
|
|
@ -42,19 +44,23 @@
|
|||
#define MAC 0x2
|
||||
#define UNKNOWN 0x4
|
||||
|
||||
void dump_reg (void);
|
||||
void dump_eeprom (void);
|
||||
int write_eeprom_reg (int, int);
|
||||
void copy_from_eeprom (void);
|
||||
void print_MAC (void);
|
||||
int read_eeprom_reg (int);
|
||||
void print_macaddr (void);
|
||||
void dump_reg (struct eth_device *dev);
|
||||
void dump_eeprom (struct eth_device *dev);
|
||||
int write_eeprom_reg (struct eth_device *dev, int value, int reg);
|
||||
void copy_from_eeprom (struct eth_device *dev);
|
||||
void print_MAC (struct eth_device *dev);
|
||||
int read_eeprom_reg (struct eth_device *dev, int reg);
|
||||
void print_macaddr (struct eth_device *dev);
|
||||
|
||||
int smc91111_eeprom (int argc, char *argv[])
|
||||
{
|
||||
int c, i, j, done, line, reg, value, start, what;
|
||||
char input[50];
|
||||
|
||||
struct eth_device dev = {
|
||||
.iobase = CONFIG_SMC91111_BASE
|
||||
};
|
||||
|
||||
/* Print the ABI version */
|
||||
app_startup (argv);
|
||||
if (XF_VERSION != (int) get_version ()) {
|
||||
|
|
@ -67,7 +73,7 @@ int smc91111_eeprom (int argc, char *argv[])
|
|||
|
||||
SMC91111_EEPROM_INIT();
|
||||
|
||||
if ((SMC_inw (BANK_SELECT) & 0xFF00) != 0x3300) {
|
||||
if ((SMC_inw (&dev, BANK_SELECT) & 0xFF00) != 0x3300) {
|
||||
printf ("Can't find SMSC91111\n");
|
||||
return (0);
|
||||
}
|
||||
|
|
@ -211,12 +217,12 @@ int smc91111_eeprom (int argc, char *argv[])
|
|||
switch (what) {
|
||||
case 1:
|
||||
printf ("Writing EEPROM register %02x with %04x\n", reg, value);
|
||||
write_eeprom_reg (value, reg);
|
||||
write_eeprom_reg (&dev, value, reg);
|
||||
break;
|
||||
case 2:
|
||||
printf ("Writing MAC register bank %i, reg %02x with %04x\n", reg >> 4, reg & 0xE, value);
|
||||
SMC_SELECT_BANK (reg >> 4);
|
||||
SMC_outw (value, reg & 0xE);
|
||||
SMC_SELECT_BANK (&dev, reg >> 4);
|
||||
SMC_outw (&dev, value, reg & 0xE);
|
||||
break;
|
||||
default:
|
||||
printf ("Wrong\n");
|
||||
|
|
@ -224,16 +230,16 @@ int smc91111_eeprom (int argc, char *argv[])
|
|||
}
|
||||
break;
|
||||
case ('D'):
|
||||
dump_eeprom ();
|
||||
dump_eeprom (&dev);
|
||||
break;
|
||||
case ('M'):
|
||||
dump_reg ();
|
||||
dump_reg (&dev);
|
||||
break;
|
||||
case ('C'):
|
||||
copy_from_eeprom ();
|
||||
copy_from_eeprom (&dev);
|
||||
break;
|
||||
case ('P'):
|
||||
print_macaddr ();
|
||||
print_macaddr (&dev);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
@ -244,15 +250,15 @@ int smc91111_eeprom (int argc, char *argv[])
|
|||
return (0);
|
||||
}
|
||||
|
||||
void copy_from_eeprom (void)
|
||||
void copy_from_eeprom (struct eth_device *dev)
|
||||
{
|
||||
int i;
|
||||
|
||||
SMC_SELECT_BANK (1);
|
||||
SMC_outw ((SMC_inw (CTL_REG) & !CTL_EEPROM_SELECT) | CTL_RELOAD,
|
||||
CTL_REG);
|
||||
SMC_SELECT_BANK (dev, 1);
|
||||
SMC_outw (dev, (SMC_inw (dev, CTL_REG) & !CTL_EEPROM_SELECT) |
|
||||
CTL_RELOAD, CTL_REG);
|
||||
i = 100;
|
||||
while ((SMC_inw (CTL_REG) & CTL_RELOAD) && --i)
|
||||
while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --i)
|
||||
udelay (100);
|
||||
if (i == 0) {
|
||||
printf ("Timeout Refreshing EEPROM registers\n");
|
||||
|
|
@ -262,21 +268,21 @@ void copy_from_eeprom (void)
|
|||
|
||||
}
|
||||
|
||||
void print_macaddr (void)
|
||||
void print_macaddr (struct eth_device *dev)
|
||||
{
|
||||
int i, j, k, mac[6];
|
||||
|
||||
printf ("Current MAC Address in SMSC91111 ");
|
||||
SMC_SELECT_BANK (1);
|
||||
SMC_SELECT_BANK (dev, 1);
|
||||
for (i = 0; i < 5; i++) {
|
||||
printf ("%02x:", SMC_inb (ADDR0_REG + i));
|
||||
printf ("%02x:", SMC_inb (dev, ADDR0_REG + i));
|
||||
}
|
||||
|
||||
printf ("%02x\n", SMC_inb (ADDR0_REG + 5));
|
||||
printf ("%02x\n", SMC_inb (dev, ADDR0_REG + 5));
|
||||
|
||||
i = 0;
|
||||
for (j = 0x20; j < 0x23; j++) {
|
||||
k = read_eeprom_reg (j);
|
||||
k = read_eeprom_reg (dev, j);
|
||||
mac[i] = k & 0xFF;
|
||||
i++;
|
||||
mac[i] = k >> 8;
|
||||
|
|
@ -289,7 +295,7 @@ void print_macaddr (void)
|
|||
printf ("%02x\n", mac[5]);
|
||||
|
||||
}
|
||||
void dump_eeprom (void)
|
||||
void dump_eeprom (struct eth_device *dev)
|
||||
{
|
||||
int j, k;
|
||||
|
||||
|
|
@ -307,7 +313,8 @@ void dump_eeprom (void)
|
|||
if ((k == 2) || (k == 3))
|
||||
printf (" ");
|
||||
for (j = 0; j < 0x20; j += 4) {
|
||||
printf ("%02x:%04x ", j + k, read_eeprom_reg (j + k));
|
||||
printf ("%02x:%04x ", j + k,
|
||||
read_eeprom_reg (dev, j + k));
|
||||
}
|
||||
printf ("\n");
|
||||
}
|
||||
|
|
@ -315,46 +322,47 @@ void dump_eeprom (void)
|
|||
for (j = 0x20; j < 0x40; j++) {
|
||||
if ((j & 0x07) == 0)
|
||||
printf ("\n");
|
||||
printf ("%02x:%04x ", j, read_eeprom_reg (j));
|
||||
printf ("%02x:%04x ", j, read_eeprom_reg (dev, j));
|
||||
}
|
||||
printf ("\n");
|
||||
|
||||
}
|
||||
|
||||
int read_eeprom_reg (int reg)
|
||||
int read_eeprom_reg (struct eth_device *dev, int reg)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
SMC_SELECT_BANK (2);
|
||||
SMC_outw (reg, PTR_REG);
|
||||
SMC_SELECT_BANK (dev, 2);
|
||||
SMC_outw (dev, reg, PTR_REG);
|
||||
|
||||
SMC_SELECT_BANK (1);
|
||||
SMC_outw (SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_RELOAD,
|
||||
CTL_REG);
|
||||
SMC_SELECT_BANK (dev, 1);
|
||||
SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT |
|
||||
CTL_RELOAD, CTL_REG);
|
||||
timeout = 100;
|
||||
while ((SMC_inw (CTL_REG) & CTL_RELOAD) && --timeout)
|
||||
while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
|
||||
udelay (100);
|
||||
if (timeout == 0) {
|
||||
printf ("Timeout Reading EEPROM register %02x\n", reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return SMC_inw (GP_REG);
|
||||
return SMC_inw (dev, GP_REG);
|
||||
|
||||
}
|
||||
|
||||
int write_eeprom_reg (int value, int reg)
|
||||
int write_eeprom_reg (struct eth_device *dev, int value, int reg)
|
||||
{
|
||||
int timeout;
|
||||
|
||||
SMC_SELECT_BANK (2);
|
||||
SMC_outw (reg, PTR_REG);
|
||||
SMC_SELECT_BANK (dev, 2);
|
||||
SMC_outw (dev, reg, PTR_REG);
|
||||
|
||||
SMC_SELECT_BANK (1);
|
||||
SMC_outw (value, GP_REG);
|
||||
SMC_outw (SMC_inw (CTL_REG) | CTL_EEPROM_SELECT | CTL_STORE, CTL_REG);
|
||||
SMC_SELECT_BANK (dev, 1);
|
||||
SMC_outw (dev, value, GP_REG);
|
||||
SMC_outw (dev, SMC_inw (dev, CTL_REG) | CTL_EEPROM_SELECT |
|
||||
CTL_STORE, CTL_REG);
|
||||
timeout = 100;
|
||||
while ((SMC_inw (CTL_REG) & CTL_STORE) && --timeout)
|
||||
while ((SMC_inw (dev, CTL_REG) & CTL_STORE) && --timeout)
|
||||
udelay (100);
|
||||
if (timeout == 0) {
|
||||
printf ("Timeout Writing EEPROM register %02x\n", reg);
|
||||
|
|
@ -365,7 +373,7 @@ int write_eeprom_reg (int value, int reg)
|
|||
|
||||
}
|
||||
|
||||
void dump_reg (void)
|
||||
void dump_reg (struct eth_device *dev)
|
||||
{
|
||||
int i, j;
|
||||
|
||||
|
|
@ -377,8 +385,8 @@ void dump_reg (void)
|
|||
for (i = 0; i < 0xF; i += 2) {
|
||||
printf ("%02x ", i);
|
||||
for (j = 0; j < 4; j++) {
|
||||
SMC_SELECT_BANK (j);
|
||||
printf ("%04x ", SMC_inw (i));
|
||||
SMC_SELECT_BANK (dev, j);
|
||||
printf ("%04x ", SMC_inw (dev, i));
|
||||
}
|
||||
printf ("\n");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -151,7 +151,8 @@
|
|||
* cache bypass so there's no need to monkey with inx/outx macros.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
|
||||
#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111 */
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
|
||||
|
||||
|
|
|
|||
|
|
@ -145,7 +145,8 @@
|
|||
* cache bypass so there's no need to monkey with inx/outx macros.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
|
||||
#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111 */
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
|
||||
|
||||
|
|
|
|||
|
|
@ -145,7 +145,8 @@
|
|||
* cache bypass so there's no need to monkey with inx/outx macros.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
|
||||
#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111 */
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
|
||||
|
||||
|
|
|
|||
|
|
@ -50,7 +50,8 @@
|
|||
#undef CONFIG_SHOW_BOOT_PROGRESS
|
||||
|
||||
/* SMC9111 */
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE (0xB0000000)
|
||||
|
||||
/* MEMORY */
|
||||
|
|
|
|||
|
|
@ -151,7 +151,8 @@
|
|||
* cache bypass so there's no need to monkey with inx/outx macros.
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */
|
||||
#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111 */
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT /* 32-bit interface */
|
||||
|
||||
|
|
|
|||
|
|
@ -65,12 +65,14 @@
|
|||
* Network Settings
|
||||
*/
|
||||
#define ADI_CMDS_NETWORK 1
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x20310300
|
||||
#define SMC91111_EEPROM_INIT() \
|
||||
do { \
|
||||
*pFIO_DIR |= PF1; \
|
||||
*pFIO_FLAG_S = PF1; \
|
||||
bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \
|
||||
bfin_write_FIO_FLAG_C(PF1); \
|
||||
bfin_write_FIO_FLAG_S(PF0); \
|
||||
SSYNC(); \
|
||||
} while (0)
|
||||
#define CONFIG_HOSTNAME bf533-ezkit
|
||||
|
|
|
|||
|
|
@ -60,12 +60,14 @@
|
|||
* Network Settings
|
||||
*/
|
||||
#define ADI_CMDS_NETWORK 1
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x20300300
|
||||
#define SMC91111_EEPROM_INIT() \
|
||||
do { \
|
||||
*pFIO_DIR |= PF1; \
|
||||
*pFIO_FLAG_S = PF1; \
|
||||
bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \
|
||||
bfin_write_FIO_FLAG_C(PF1); \
|
||||
bfin_write_FIO_FLAG_S(PF0); \
|
||||
SSYNC(); \
|
||||
} while (0)
|
||||
#define CONFIG_HOSTNAME bf533-stamp
|
||||
|
|
|
|||
|
|
@ -60,7 +60,8 @@
|
|||
* Network Settings
|
||||
*/
|
||||
#define ADI_CMDS_NETWORK 1
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x20310300
|
||||
#define CONFIG_HOSTNAME bf538f-ezkit
|
||||
/* Uncomment next line to use fixed MAC address */
|
||||
|
|
|
|||
|
|
@ -60,7 +60,8 @@
|
|||
* Network Settings
|
||||
*/
|
||||
#define ADI_CMDS_NETWORK 1
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x2C010300
|
||||
#define CONFIG_SMC_USE_32_BIT 1
|
||||
#define CONFIG_HOSTNAME bf561-ezkit
|
||||
|
|
|
|||
|
|
@ -30,7 +30,8 @@
|
|||
/*
|
||||
* Board settings
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x20300300
|
||||
|
||||
/* FLASH/ETHERNET uses the same address range
|
||||
|
|
@ -69,7 +70,7 @@
|
|||
* Network settings
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_DRIVER_SMC91111
|
||||
#ifdef CONFIG_SMC91111
|
||||
#define CONFIG_IPADDR 192.168.0.15
|
||||
#define CONFIG_NETMASK 255.255.255.0
|
||||
#define CONFIG_GATEWAYIP 192.168.0.1
|
||||
|
|
@ -108,7 +109,7 @@
|
|||
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#ifdef CONFIG_DRIVER_SMC91111
|
||||
#ifdef CONFIG_SMC91111
|
||||
# define CONFIG_CMD_DHCP
|
||||
# define CONFIG_CMD_PING
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -53,7 +53,8 @@
|
|||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x04000300
|
||||
#define CONFIG_SMC_USE_32_BIT
|
||||
|
||||
|
|
|
|||
|
|
@ -60,7 +60,8 @@
|
|||
* Network Settings
|
||||
*/
|
||||
#define ADI_CMDS_NETWORK 1
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x20200300
|
||||
#define CONFIG_HOSTNAME cm-bf533
|
||||
/* Uncomment next line to use fixed MAC address */
|
||||
|
|
|
|||
|
|
@ -61,7 +61,8 @@
|
|||
*/
|
||||
#define ADI_CMDS_NETWORK 1
|
||||
/* The next 2 lines are for use with DEV-BF5xx */
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x28000300
|
||||
/* The next 3 lines are for use with EXT-BF5xx-USB-ETH2 */
|
||||
/* #define CONFIG_DRIVER_SMC911X 1 */
|
||||
|
|
|
|||
|
|
@ -49,7 +49,8 @@
|
|||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x10000300
|
||||
#define CONFIG_SMC91111_EXT_PHY
|
||||
#define CONFIG_SMC_USE_32_BIT
|
||||
|
|
|
|||
|
|
@ -54,7 +54,8 @@
|
|||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x20000300
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -292,7 +292,8 @@
|
|||
/*
|
||||
* Ethernet configuration uses on board SMC91C111
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
|
||||
#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
|
||||
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
|
||||
|
|
|
|||
|
|
@ -267,7 +267,8 @@
|
|||
#ifndef USE_GRETH
|
||||
|
||||
/* USE SMC91C111 MAC */
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
|
||||
#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
|
||||
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
|
||||
|
|
|
|||
|
|
@ -157,7 +157,8 @@
|
|||
/*
|
||||
* SMSC91C111 Network Card
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x14000000 /* chip select 5 */
|
||||
#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */
|
||||
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
|
||||
|
|
|
|||
|
|
@ -53,7 +53,8 @@
|
|||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC_USE_32_BIT
|
||||
#define CONFIG_SMC91111_BASE 0xC8000000
|
||||
#undef CONFIG_SMC91111_EXT_PHY
|
||||
|
|
|
|||
|
|
@ -133,7 +133,8 @@
|
|||
* SMSC91C111 Network Card
|
||||
*/
|
||||
#if 0
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x10000000 /* chip select 4 */
|
||||
#undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */
|
||||
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
|
||||
|
|
|
|||
|
|
@ -72,7 +72,8 @@
|
|||
* Default IO base of chip is 0x300, Card Engine has this address lines
|
||||
* (LAN chip) tied to Vcc, so we just care about the chip select
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE (0x70000000)
|
||||
#undef CONFIG_SMC_USE_32_BIT
|
||||
#define CONFIG_SMC_USE_IOFUNCS
|
||||
|
|
|
|||
|
|
@ -72,7 +72,8 @@
|
|||
* Default IO base of chip is 0x300, Card Engine has this address lines
|
||||
* (LAN chip) tied to Vcc, so we just care about the chip select
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE (0x70000000)
|
||||
#undef CONFIG_SMC_USE_32_BIT
|
||||
#define CONFIG_SMC_USE_IOFUNCS
|
||||
|
|
|
|||
|
|
@ -48,7 +48,8 @@
|
|||
#undef CONFIG_SHOW_BOOT_PROGRESS
|
||||
|
||||
/* SMC9111 */
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE (0xB8000000)
|
||||
|
||||
/* MEMORY */
|
||||
|
|
|
|||
|
|
@ -93,7 +93,8 @@
|
|||
#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
|
||||
#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
|
||||
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x04000300
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
||||
|
|
|
|||
|
|
@ -132,7 +132,8 @@
|
|||
#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
|
||||
#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
|
||||
|
||||
#define CONFIG_DRIVER_SMC91111 /* Using SMC91c111*/
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 /* Using SMC91c111*/
|
||||
#define CONFIG_SMC91111_BASE 0x34000300
|
||||
#undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
|
||||
#define CONFIG_SMC_USE_32_BIT
|
||||
|
|
|
|||
|
|
@ -87,7 +87,8 @@
|
|||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE (PXA_CS5_PHYS + IDP_CS5_ETH_OFFSET + 0x300)
|
||||
#define CONFIG_SMC_USE_32_BIT 1
|
||||
/* #define CONFIG_SMC_USE_IOFUNCS */
|
||||
|
|
|
|||
|
|
@ -82,7 +82,8 @@
|
|||
* Hardware drivers
|
||||
*/
|
||||
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC_USE_32_BIT
|
||||
#define CONFIG_SMC91111_BASE 0x10010000
|
||||
#undef CONFIG_SMC91111_EXT_PHY
|
||||
|
|
|
|||
|
|
@ -94,7 +94,8 @@
|
|||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x08000300
|
||||
|
||||
#define CONFIG_HARD_I2C
|
||||
|
|
|
|||
|
|
@ -196,7 +196,8 @@
|
|||
/*
|
||||
* SMSC91C111 Network Card
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111 1
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111 1
|
||||
#define CONFIG_SMC91111_BASE 0x10000300 /* chip select 3 */
|
||||
#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
|
||||
#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
|
||||
|
|
|
|||
|
|
@ -50,7 +50,8 @@
|
|||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x04000300
|
||||
#undef CONFIG_SMC91111_EXT_PHY
|
||||
#define CONFIG_SMC_USE_32_BIT
|
||||
|
|
|
|||
|
|
@ -94,7 +94,8 @@
|
|||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
|
||||
|
||||
/* Hardware drivers */
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x04000300
|
||||
#define CONFIG_SMC_USE_32_BIT 1
|
||||
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@
|
|||
|
||||
#undef TURN_ON_ETHERNET
|
||||
#ifdef TURN_ON_ETHERNET
|
||||
# define CONFIG_DRIVER_SMC91111 1
|
||||
# define CONFIG_SMC91111 1
|
||||
# define CONFIG_SMC91111_BASE 0x14000300
|
||||
# define CONFIG_SMC91111_EXT_PHY
|
||||
# define CONFIG_SMC_USE_32_BIT
|
||||
|
|
|
|||
|
|
@ -75,6 +75,7 @@ int rtl8169_initialize(bd_t *bis);
|
|||
int scc_initialize(bd_t *bis);
|
||||
int skge_initialize(bd_t *bis);
|
||||
int smc911x_initialize(u8 dev_num, int base_addr);
|
||||
int smc91111_initialize(u8 dev_num, int base_addr);
|
||||
int tsi108_eth_initialize(bd_t *bis);
|
||||
int uec_initialize(int index);
|
||||
int uec_standard_init(bd_t *bis);
|
||||
|
|
|
|||
Loading…
Reference in New Issue