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fpga: Remove relocation fixups 

PPC boards are the only users of the current FPGA code which is littered
with manual relocation fixups.  Now that proper relocation is supported
for PPC boards, remove FPGA manual relocation.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This commit is contained in:
Peter Tyser 2009-09-21 11:20:32 -05:00 committed by Wolfgang Denk
parent cd1011db80
commit 6385b28116
22 changed files with 18 additions and 863 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
board/esd/pmc440/fpga.c
View File

@ -442,9 +442,9 @@ int pmc440_init_fpga(void)
{
char *s;
debug("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n",
__FUNCTION__, __LINE__, gd->reloc_off);
fpga_init(gd->reloc_off);
debug("%s:%d: Initialize FPGA interface\n",
__FUNCTION__, __LINE__);
fpga_init();
fpga_serialslave_init ();
debug("%s:%d: Adding fpga 0\n", __FUNCTION__, __LINE__);

5
board/gen860t/fpga.c
View File

@ -193,8 +193,9 @@ int gen860t_init_fpga (void)
{
int i;
PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off);
fpga_init (gd->reloc_off);
PRINTF ("%s:%d: Initialize FPGA interface\n",
__FUNCTION__, __LINE__);
fpga_init ();
fpga_selectmap_init ();
for (i = 0; i < CONFIG_FPGA_COUNT; i++) {

7
board/matrix_vision/mvbc_p/fpga.c
View File

@ -46,7 +46,6 @@ Altera_CYC2_Passive_Serial_fns altera_fns = {
fpga_wr_fn,
fpga_null_fn,
fpga_null_fn,
0
};
Altera_desc cyclone2 = {
@ -55,16 +54,14 @@ Altera_desc cyclone2 = {
Altera_EP2C8_SIZE,
(void *) &altera_fns,
NULL,
0
};
DECLARE_GLOBAL_DATA_PTR;
int mvbc_p_init_fpga(void)
{
fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n",
gd->reloc_off);
fpga_init(gd->reloc_off);
fpga_debug("Initialize FPGA interface\n");
fpga_init();
fpga_add(fpga_altera, &cyclone2);
fpga_config_fn(0, 1, 0);
udelay(60);

6
board/matrix_vision/mvblm7/fpga.c
View File

@ -46,7 +46,6 @@ Altera_CYC2_Passive_Serial_fns altera_fns = {
fpga_wr_fn,
fpga_null_fn,
fpga_null_fn,
0
};
Altera_desc cyclone2 = {
@ -62,9 +61,8 @@ DECLARE_GLOBAL_DATA_PTR;
int mvblm7_init_fpga(void)
{
fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n",
gd->reloc_off);
fpga_init(gd->reloc_off);
fpga_debug("Initialize FPGA interface\n");
fpga_init();
fpga_add(fpga_altera, &cyclone2);
fpga_config_fn(0, 1, 0);
udelay(60);

4
board/prodrive/alpr/fpga.c
View File

@ -244,8 +244,8 @@ int alpr_fpga_init (void)
{
int i;
PRINTF ("%s:%d: Initialize FPGA interface (relocation offset = 0x%.8lx)\n", __FUNCTION__, __LINE__, gd->reloc_off);
fpga_init (gd->reloc_off);
PRINTF ("%s:%d: Initialize FPGA interface\n", __FUNCTION__, __LINE__);
fpga_init ();
for (i = 0; i < CONFIG_FPGA_COUNT; i++) {
PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, __LINE__, i);

96
drivers/fpga/ACEX1K.c
View File

@ -51,7 +51,6 @@
static int ACEX1K_ps_load( Altera_desc *desc, void *buf, size_t bsize );
static int ACEX1K_ps_dump( Altera_desc *desc, void *buf, size_t bsize );
/* static int ACEX1K_ps_info( Altera_desc *desc ); */
static int ACEX1K_ps_reloc( Altera_desc *desc, ulong reloc_offset );
/* ------------------------------------------------------------------------- */
/* ACEX1K Generic Implementation */
@ -101,31 +100,6 @@ int ACEX1K_info( Altera_desc *desc )
}
int ACEX1K_reloc (Altera_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume a failure */
if (desc->family != Altera_ACEX1K) {
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
return FPGA_FAIL;
} else
switch (desc->iface) {
case passive_serial:
ret_val = ACEX1K_ps_reloc (desc, reloc_offset);
break;
/* Add new interface types here */
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
/* ACEX1K Passive Serial Generic Implementation */
@ -290,73 +264,3 @@ static int ACEX1K_ps_dump (Altera_desc * desc, void *buf, size_t bsize)
__FUNCTION__);
return FPGA_FAIL;
}
static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Altera_ACEX1K_Passive_Serial_fns *fn_r, *fn =
(Altera_ACEX1K_Passive_Serial_fns *) (desc->iface_fns);
if (fn) {
ulong addr;
/* Get the relocated table address */
addr = (ulong) fn + reloc_offset;
fn_r = (Altera_ACEX1K_Passive_Serial_fns *) addr;
if (!fn_r->relocated) {
if (memcmp (fn_r, fn,
sizeof (Altera_ACEX1K_Passive_Serial_fns))
== 0) {
/* good copy of the table, fix the descriptor pointer */
desc->iface_fns = fn_r;
} else {
PRINTF ("%s: Invalid function table at 0x%p\n",
__FUNCTION__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Altera_pre_fn) addr;
addr = (ulong) (fn->config) + reloc_offset;
fn_r->config = (Altera_config_fn) addr;
addr = (ulong) (fn->status) + reloc_offset;
fn_r->status = (Altera_status_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Altera_done_fn) addr;
addr = (ulong) (fn->clk) + reloc_offset;
fn_r->clk = (Altera_clk_fn) addr;
addr = (ulong) (fn->data) + reloc_offset;
fn_r->data = (Altera_data_fn) addr;
addr = (ulong) (fn->abort) + reloc_offset;
fn_r->abort = (Altera_abort_fn) addr;
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Altera_post_fn) addr;
fn_r->relocated = TRUE;
} else {
/* this table has already been moved */
/* XXX - should check to see if the descriptor is correct */
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}

39
drivers/fpga/altera.c
View File

@ -211,45 +211,6 @@ int altera_info( Altera_desc *desc )
return ret_val;
}
int altera_reloc( Altera_desc *desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume a failure */
if (!altera_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
} else {
switch (desc->family) {
case Altera_ACEX1K:
#if defined(CONFIG_FPGA_ACEX1K)
ret_val = ACEX1K_reloc (desc, reloc_offset);
#else
printf ("%s: No support for ACEX devices.\n",
__FUNCTION__);
#endif
break;
#if defined(CONFIG_FPGA_STRATIX_II)
case Altera_StratixII:
ret_val = StratixII_reloc (desc, reloc_offset);
break;
#endif
case Altera_CYC2:
#if defined(CONFIG_FPGA_CYCLON2)
ret_val = CYC2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for CYCLON II devices.\n",
__FUNCTION__);
#endif
break;
/* Add new family types here */
default:
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
}
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
static int altera_validate (Altera_desc * desc, const char *fn)

91
drivers/fpga/cyclon2.c
View File

@ -50,7 +50,6 @@
static int CYC2_ps_load( Altera_desc *desc, void *buf, size_t bsize );
static int CYC2_ps_dump( Altera_desc *desc, void *buf, size_t bsize );
/* static int CYC2_ps_info( Altera_desc *desc ); */
static int CYC2_ps_reloc( Altera_desc *desc, ulong reloc_offset );
/* ------------------------------------------------------------------------- */
/* CYCLON2 Generic Implementation */
@ -99,30 +98,6 @@ int CYC2_info( Altera_desc *desc )
return FPGA_SUCCESS;
}
int CYC2_reloc (Altera_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume a failure */
if (desc->family != Altera_CYC2) {
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
return FPGA_FAIL;
} else
switch (desc->iface) {
case passive_serial:
ret_val = CYC2_ps_reloc (desc, reloc_offset);
break;
/* Add new interface types here */
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
/* CYCLON2 Passive Serial Generic Implementation */
static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize)
@ -233,69 +208,3 @@ static int CYC2_ps_dump (Altera_desc * desc, void *buf, size_t bsize)
__FUNCTION__);
return FPGA_FAIL;
}
static int CYC2_ps_reloc (Altera_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Altera_CYC2_Passive_Serial_fns *fn_r, *fn =
(Altera_CYC2_Passive_Serial_fns *) (desc->iface_fns);
if (fn) {
ulong addr;
/* Get the relocated table address */
addr = (ulong) fn + reloc_offset;
fn_r = (Altera_CYC2_Passive_Serial_fns *) addr;
if (!fn_r->relocated) {
if (memcmp (fn_r, fn,
sizeof (Altera_CYC2_Passive_Serial_fns))
== 0) {
/* good copy of the table, fix the descriptor pointer */
desc->iface_fns = fn_r;
} else {
PRINTF ("%s: Invalid function table at 0x%p\n",
__FUNCTION__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Altera_pre_fn) addr;
addr = (ulong) (fn->config) + reloc_offset;
fn_r->config = (Altera_config_fn) addr;
addr = (ulong) (fn->status) + reloc_offset;
fn_r->status = (Altera_status_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Altera_done_fn) addr;
addr = (ulong) (fn->write) + reloc_offset;
fn_r->write = (Altera_write_fn) addr;
addr = (ulong) (fn->abort) + reloc_offset;
fn_r->abort = (Altera_abort_fn) addr;
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Altera_post_fn) addr;
fn_r->relocated = TRUE;
} else {
/* this table has already been moved */
/* XXX - should check to see if the descriptor is correct */
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}

53
drivers/fpga/fpga.c
View File

@ -46,7 +46,6 @@
#endif
/* Local static data */
static ulong relocation_offset = 0;
static int next_desc = FPGA_INVALID_DEVICE;
static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
@ -153,46 +152,12 @@ static int fpga_dev_info( int devnum )
}
/* fpga_reloc
* generic multiplexing code
*/
int fpga_reloc( fpga_type devtype, void *desc, ulong reloc_off )
{
int ret_val = FPGA_FAIL;
PRINTF( "%s: Relocating Device of type %d @ 0x%p with offset %lx\n",
__FUNCTION__, devtype, desc, reloc_off );
switch ( devtype ) {
case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_reloc( desc, reloc_off );
#else
fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
ret_val = altera_reloc( desc, reloc_off );
#else
fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
#endif
break;
default:
printf( "%s: Invalid or unsupported device type %d\n",
__FUNCTION__, devtype );
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
/* fgpa_init is usually called from misc_init_r() and MUST be called
* before any of the other fpga functions are used.
*/
void fpga_init( ulong reloc_off )
void fpga_init(void)
{
relocation_offset = reloc_off;
next_desc = 0;
memset( desc_table, 0, sizeof(desc_table));
@ -208,9 +173,7 @@ int fpga_count( void )
}
/* fpga_add
* Attempts to relocate the device/board specific interface code
* to the proper RAM locations and adds the device descriptor to
* the device table.
* Add the device descriptor to the device table.
*/
int fpga_add( fpga_type devtype, void *desc )
{
@ -221,15 +184,9 @@ int fpga_add( fpga_type devtype, void *desc )
} else if (( devtype > fpga_min_type ) && ( devtype < fpga_undefined )) {
if ( desc ) {
if ( next_desc < CONFIG_MAX_FPGA_DEVICES ) {
if ( fpga_reloc( devtype, desc, relocation_offset )
== FPGA_SUCCESS ) {
devnum = next_desc;
desc_table[next_desc].devtype = devtype;
desc_table[next_desc++].devdesc = desc;
} else {
printf( "%s: Unable to relocate device interface table!\n",
__FUNCTION__ );
}
devnum = next_desc;
desc_table[next_desc].devtype = devtype;
desc_table[next_desc++].devdesc = desc;
} else {
printf( "%s: Exceeded Max FPGA device count\n", __FUNCTION__ );
}

187
drivers/fpga/spartan2.c
View File

@ -51,12 +51,10 @@
static int Spartan2_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
static int Spartan2_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
/* static int Spartan2_sp_info( Xilinx_desc *desc ); */
static int Spartan2_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
static int Spartan2_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
static int Spartan2_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
/* static int Spartan2_ss_info( Xilinx_desc *desc ); */
static int Spartan2_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
@ -112,33 +110,6 @@ int Spartan2_info( Xilinx_desc *desc )
}
int Spartan2_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume a failure */
if (desc->family != Xilinx_Spartan2) {
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
return FPGA_FAIL;
} else
switch (desc->iface) {
case slave_serial:
ret_val = Spartan2_ss_reloc (desc, reloc_offset);
break;
case slave_parallel:
ret_val = Spartan2_sp_reloc (desc, reloc_offset);
break;
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
@ -340,93 +311,6 @@ static int Spartan2_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
}
static int Spartan2_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Parallel_fns *fn_r, *fn =
(Xilinx_Spartan2_Slave_Parallel_fns *) (desc->iface_fns);
if (fn) {
ulong addr;
/* Get the relocated table address */
addr = (ulong) fn + reloc_offset;
fn_r = (Xilinx_Spartan2_Slave_Parallel_fns *) addr;
if (!fn_r->relocated) {
if (memcmp (fn_r, fn,
sizeof (Xilinx_Spartan2_Slave_Parallel_fns))
== 0) {
/* good copy of the table, fix the descriptor pointer */
desc->iface_fns = fn_r;
} else {
PRINTF ("%s: Invalid function table at 0x%p\n",
__FUNCTION__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Xilinx_pre_fn) addr;
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
addr = (ulong) (fn->init) + reloc_offset;
fn_r->init = (Xilinx_init_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Xilinx_done_fn) addr;
addr = (ulong) (fn->clk) + reloc_offset;
fn_r->clk = (Xilinx_clk_fn) addr;
addr = (ulong) (fn->err) + reloc_offset;
fn_r->err = (Xilinx_err_fn) addr;
addr = (ulong) (fn->cs) + reloc_offset;
fn_r->cs = (Xilinx_cs_fn) addr;
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
addr = (ulong) (fn->rdata) + reloc_offset;
fn_r->rdata = (Xilinx_rdata_fn) addr;
addr = (ulong) (fn->wdata) + reloc_offset;
fn_r->wdata = (Xilinx_wdata_fn) addr;
addr = (ulong) (fn->busy) + reloc_offset;
fn_r->busy = (Xilinx_busy_fn) addr;
addr = (ulong) (fn->abort) + reloc_offset;
fn_r->abort = (Xilinx_abort_fn) addr;
if (fn->post) {
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Xilinx_post_fn) addr;
}
fn_r->relocated = TRUE;
} else {
/* this table has already been moved */
/* XXX - should check to see if the descriptor is correct */
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
@ -580,74 +464,3 @@ static int Spartan2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
__FUNCTION__);
return FPGA_FAIL;
}
static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Serial_fns *fn_r, *fn =
(Xilinx_Spartan2_Slave_Serial_fns *) (desc->iface_fns);
if (fn) {
ulong addr;
/* Get the relocated table address */
addr = (ulong) fn + reloc_offset;
fn_r = (Xilinx_Spartan2_Slave_Serial_fns *) addr;
if (!fn_r->relocated) {
if (memcmp (fn_r, fn,
sizeof (Xilinx_Spartan2_Slave_Serial_fns))
== 0) {
/* good copy of the table, fix the descriptor pointer */
desc->iface_fns = fn_r;
} else {
PRINTF ("%s: Invalid function table at 0x%p\n",
__FUNCTION__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
if (fn->pre) {
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Xilinx_pre_fn) addr;
}
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
addr = (ulong) (fn->init) + reloc_offset;
fn_r->init = (Xilinx_init_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Xilinx_done_fn) addr;
addr = (ulong) (fn->clk) + reloc_offset;
fn_r->clk = (Xilinx_clk_fn) addr;
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
if (fn->post) {
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Xilinx_post_fn) addr;
}
fn_r->relocated = TRUE;
} else {
/* this table has already been moved */
/* XXX - should check to see if the descriptor is correct */
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}

185
drivers/fpga/spartan3.c
View File

@ -56,12 +56,10 @@
static int Spartan3_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
static int Spartan3_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
/* static int Spartan3_sp_info( Xilinx_desc *desc ); */
static int Spartan3_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
static int Spartan3_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
static int Spartan3_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
/* static int Spartan3_ss_info( Xilinx_desc *desc ); */
static int Spartan3_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
@ -117,33 +115,6 @@ int Spartan3_info( Xilinx_desc *desc )
}
int Spartan3_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume a failure */
if (desc->family != Xilinx_Spartan3) {
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
return FPGA_FAIL;
} else
switch (desc->iface) {
case slave_serial:
ret_val = Spartan3_ss_reloc (desc, reloc_offset);
break;
case slave_parallel:
ret_val = Spartan3_sp_reloc (desc, reloc_offset);
break;
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
@ -347,91 +318,6 @@ static int Spartan3_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
}
static int Spartan3_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan3_Slave_Parallel_fns *fn_r, *fn =
(Xilinx_Spartan3_Slave_Parallel_fns *) (desc->iface_fns);
if (fn) {
ulong addr;
/* Get the relocated table address */
addr = (ulong) fn + reloc_offset;
fn_r = (Xilinx_Spartan3_Slave_Parallel_fns *) addr;
if (!fn_r->relocated) {
if (memcmp (fn_r, fn,
sizeof (Xilinx_Spartan3_Slave_Parallel_fns))
== 0) {
/* good copy of the table, fix the descriptor pointer */
desc->iface_fns = fn_r;
} else {
PRINTF ("%s: Invalid function table at 0x%p\n",
__FUNCTION__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Xilinx_pre_fn) addr;
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
addr = (ulong) (fn->init) + reloc_offset;
fn_r->init = (Xilinx_init_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Xilinx_done_fn) addr;
addr = (ulong) (fn->clk) + reloc_offset;
fn_r->clk = (Xilinx_clk_fn) addr;
addr = (ulong) (fn->err) + reloc_offset;
fn_r->err = (Xilinx_err_fn) addr;
addr = (ulong) (fn->cs) + reloc_offset;
fn_r->cs = (Xilinx_cs_fn) addr;
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
addr = (ulong) (fn->rdata) + reloc_offset;
fn_r->rdata = (Xilinx_rdata_fn) addr;
addr = (ulong) (fn->wdata) + reloc_offset;
fn_r->wdata = (Xilinx_wdata_fn) addr;
addr = (ulong) (fn->busy) + reloc_offset;
fn_r->busy = (Xilinx_busy_fn) addr;
addr = (ulong) (fn->abort) + reloc_offset;
fn_r->abort = (Xilinx_abort_fn) addr;
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Xilinx_post_fn) addr;
fn_r->relocated = TRUE;
} else {
/* this table has already been moved */
/* XXX - should check to see if the descriptor is correct */
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
@ -587,74 +473,3 @@ static int Spartan3_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
__FUNCTION__);
return FPGA_FAIL;
}
static int Spartan3_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan3_Slave_Serial_fns *fn_r, *fn =
(Xilinx_Spartan3_Slave_Serial_fns *) (desc->iface_fns);
if (fn) {
ulong addr;
/* Get the relocated table address */
addr = (ulong) fn + reloc_offset;
fn_r = (Xilinx_Spartan3_Slave_Serial_fns *) addr;
if (!fn_r->relocated) {
if (memcmp (fn_r, fn,
sizeof (Xilinx_Spartan3_Slave_Serial_fns))
== 0) {
/* good copy of the table, fix the descriptor pointer */
desc->iface_fns = fn_r;
} else {
PRINTF ("%s: Invalid function table at 0x%p\n",
__FUNCTION__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
if (fn->pre) {
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Xilinx_pre_fn) addr;
}
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
addr = (ulong) (fn->init) + reloc_offset;
fn_r->init = (Xilinx_init_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Xilinx_done_fn) addr;
addr = (ulong) (fn->clk) + reloc_offset;
fn_r->clk = (Xilinx_clk_fn) addr;
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
if (fn->post) {
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Xilinx_post_fn) addr;
}
fn_r->relocated = TRUE;
} else {
/* this table has already been moved */
/* XXX - should check to see if the descriptor is correct */
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}

24
drivers/fpga/stratixII.c
View File

@ -77,30 +77,6 @@ int StratixII_info (Altera_desc * desc)
return FPGA_SUCCESS;
}
int StratixII_reloc (Altera_desc * desc, ulong reloc_offset)
{
int i;
uint32_t dest = (uint32_t) desc & 0xff000000;
/* we assume a relocated code and non relocated code has different upper 8 bits */
if (dest != ((uint32_t) desc->iface_fns & 0xff000000)) {
desc->iface_fns =
(void *)((uint32_t) (desc->iface_fns) + reloc_offset);
}
for (i = 0; i < sizeof (altera_board_specific_func) / sizeof (void *);
i++) {
if (dest !=
((uint32_t) (((void **)(desc->iface_fns))[i]) & 0xff000000))
{
((void **)(desc->iface_fns))[i] =
(void
*)(((uint32_t) (((void **)(desc->iface_fns))[i])) +
reloc_offset);
}
}
return FPGA_SUCCESS;
}
int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize)
{
printf ("Stratix II Fast Passive Parallel dump is not implemented\n");

118
drivers/fpga/virtex2.c
View File

@ -103,11 +103,9 @@
static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize);
static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize);
static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset);
static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize);
static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize);
static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset);
int Virtex2_load (Xilinx_desc * desc, void *buf, size_t bsize)
{
@ -158,31 +156,6 @@ int Virtex2_info (Xilinx_desc * desc)
return FPGA_SUCCESS;
}
int Virtex2_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL;
if (desc->family != Xilinx_Virtex2) {
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
return FPGA_FAIL;
} else
switch (desc->iface) {
case slave_serial:
ret_val = Virtex2_ss_reloc (desc, reloc_offset);
break;
case slave_selectmap:
ret_val = Virtex2_ssm_reloc (desc, reloc_offset);
break;
default:
printf ("%s: Unsupported interface type, %d\n",
__FUNCTION__, desc->iface);
}
return ret_val;
}
/*
* Virtex-II Slave SelectMap configuration loader. Configuration via
* SelectMap is as follows:
@ -448,81 +421,6 @@ static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize)
return ret_val;
}
/*
* Relocate the addresses in the function table from FLASH (or ROM,
* or whatever) to RAM.
*/
static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
ulong addr;
int ret_val = FPGA_FAIL;
Xilinx_Virtex2_Slave_SelectMap_fns *fn_r, *fn =
(Xilinx_Virtex2_Slave_SelectMap_fns *) (desc->iface_fns);
if (fn) {
/*
* Get the relocated table address
*/
addr = (ulong) fn + reloc_offset;
fn_r = (Xilinx_Virtex2_Slave_SelectMap_fns *) addr;
/*
* Check to see if the table has already been relocated. If not, do
* a sanity check to make sure there is a faithful copy of the
* FLASH based function table in RAM, then adjust the table.
*/
if (!fn_r->relocated) {
if (memcmp
(fn_r, fn, sizeof (Xilinx_Virtex2_Slave_SelectMap_fns))
== 0) {
desc->iface_fns = fn_r;
} else {
PRINTF ("%s:%d: Invalid function table at 0x%p\n",
__FUNCTION__, __LINE__, fn_r);
return FPGA_FAIL;
}
PRINTF ("%s:%d: Relocating descriptor at 0x%p\n",
__FUNCTION__, __LINE__, desc);
addr = (ulong) (fn->pre) + reloc_offset;
fn_r->pre = (Xilinx_pre_fn) addr;
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
addr = (ulong) (fn->init) + reloc_offset;
fn_r->init = (Xilinx_init_fn) addr;
addr = (ulong) (fn->done) + reloc_offset;
fn_r->done = (Xilinx_done_fn) addr;
addr = (ulong) (fn->err) + reloc_offset;
fn_r->err = (Xilinx_err_fn) addr;
addr = (ulong) (fn->clk) + reloc_offset;
fn_r->clk = (Xilinx_clk_fn) addr;
addr = (ulong) (fn->cs) + reloc_offset;
fn_r->cs = (Xilinx_cs_fn) addr;
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
addr = (ulong) (fn->rdata) + reloc_offset;
fn_r->rdata = (Xilinx_rdata_fn) addr;
addr = (ulong) (fn->wdata) + reloc_offset;
fn_r->wdata = (Xilinx_wdata_fn) addr;
addr = (ulong) (fn->busy) + reloc_offset;
fn_r->busy = (Xilinx_busy_fn) addr;
addr = (ulong) (fn->abort) + reloc_offset;
fn_r->abort = (Xilinx_abort_fn) addr;
addr = (ulong) (fn->post) + reloc_offset;
fn_r->post = (Xilinx_post_fn) addr;
fn_r->relocated = TRUE;
} else {
printf ("%s:%d: Function table @0x%p has already been relocated\n", __FUNCTION__, __LINE__, fn_r);
desc->iface_fns = fn_r;
}
ret_val = FPGA_SUCCESS;
} else {
printf ("%s: NULL Interface function table!\n", __FUNCTION__);
}
return ret_val;
}
static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
{
printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
@ -535,20 +433,4 @@ static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
return FPGA_FAIL;
}
static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL;
Xilinx_Virtex2_Slave_Serial_fns *fn =
(Xilinx_Virtex2_Slave_Serial_fns *) (desc->iface_fns);
if (fn) {
printf ("%s:%d: Slave Serial Loading is unsupported\n",
__FUNCTION__, __LINE__);
} else {
printf ("%s:%d: NULL Interface function table!\n",
__FUNCTION__, __LINE__);
}
return ret_val;
}
/* vim: set ts=4 tw=78: */

42
drivers/fpga/xilinx.c
View File

@ -238,48 +238,6 @@ int xilinx_info (Xilinx_desc * desc)
return ret_val;
}
int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
{
int ret_val = FPGA_FAIL; /* assume a failure */
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
} else
switch (desc->family) {
case Xilinx_Spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
ret_val = Spartan2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Spartan-II devices.\n",
__FUNCTION__);
#endif
break;
case Xilinx_Spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
ret_val = Spartan3_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Spartan-III devices.\n",
__FUNCTION__);
#endif
break;
case Xilinx_Virtex2:
#if defined(CONFIG_FPGA_VIRTEX2)
ret_val = Virtex2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Virtex-II devices.\n",
__FUNCTION__);
#endif
break;
/* Add new family types here */
default:
printf ("%s: Unsupported family type, %d\n",
__FUNCTION__, desc->family);
}
return ret_val;
}
/* ------------------------------------------------------------------------- */
static int xilinx_validate (Xilinx_desc * desc, char *fn)

4
include/ACEX1K.h
View File

@ -33,12 +33,10 @@
extern int ACEX1K_load( Altera_desc *desc, void *image, size_t size );
extern int ACEX1K_dump( Altera_desc *desc, void *buf, size_t bsize );
extern int ACEX1K_info( Altera_desc *desc );
extern int ACEX1K_reloc( Altera_desc *desc, ulong reloc_off );
extern int CYC2_load( Altera_desc *desc, void *image, size_t size );
extern int CYC2_dump( Altera_desc *desc, void *buf, size_t bsize );
extern int CYC2_info( Altera_desc *desc );
extern int CYC2_reloc( Altera_desc *desc, ulong reloc_off );
/* Slave Serial Implementation function table */
typedef struct {
@ -50,7 +48,6 @@ typedef struct {
Altera_data_fn data;
Altera_abort_fn abort;
Altera_post_fn post;
int relocated;
} Altera_ACEX1K_Passive_Serial_fns;
/* Slave Serial Implementation function table */
@ -62,7 +59,6 @@ typedef struct {
Altera_write_fn write;
Altera_abort_fn abort;
Altera_post_fn post;
int relocated;
} Altera_CYC2_Passive_Serial_fns;
/* Device Image Sizes

1
include/altera.h
View File

@ -79,7 +79,6 @@ typedef struct { /* typedef Altera_desc */
extern int altera_load( Altera_desc *desc, void *image, size_t size );
extern int altera_dump( Altera_desc *desc, void *buf, size_t bsize );
extern int altera_info( Altera_desc *desc );
extern int altera_reloc( Altera_desc *desc, ulong reloc_offset );
/* Board specific implementation specific function types
*********************************************************************/

2
include/fpga.h
View File

@ -71,7 +71,7 @@ typedef struct { /* typedef fpga_desc */
/* root function definitions */
extern void fpga_init( ulong reloc_off );
extern void fpga_init( void );
extern int fpga_add( fpga_type devtype, void *desc );
extern int fpga_count( void );
extern int fpga_load( int devnum, void *buf, size_t bsize );

3
include/spartan2.h
View File

@ -30,7 +30,6 @@
extern int Spartan2_load( Xilinx_desc *desc, void *image, size_t size );
extern int Spartan2_dump( Xilinx_desc *desc, void *buf, size_t bsize );
extern int Spartan2_info( Xilinx_desc *desc );
extern int Spartan2_reloc( Xilinx_desc *desc, ulong reloc_off );
/* Slave Parallel Implementation function table */
typedef struct {
@ -47,7 +46,6 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
int relocated;
} Xilinx_Spartan2_Slave_Parallel_fns;
/* Slave Serial Implementation function table */
@ -59,7 +57,6 @@ typedef struct {
Xilinx_done_fn done;
Xilinx_wr_fn wr;
Xilinx_post_fn post;
int relocated;
} Xilinx_Spartan2_Slave_Serial_fns;
/* Device Image Sizes

3
include/spartan3.h
View File

@ -30,7 +30,6 @@
extern int Spartan3_load( Xilinx_desc *desc, void *image, size_t size );
extern int Spartan3_dump( Xilinx_desc *desc, void *buf, size_t bsize );
extern int Spartan3_info( Xilinx_desc *desc );
extern int Spartan3_reloc( Xilinx_desc *desc, ulong reloc_off );
/* Slave Parallel Implementation function table */
typedef struct {
@ -47,7 +46,6 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
int relocated;
} Xilinx_Spartan3_Slave_Parallel_fns;
/* Slave Serial Implementation function table */
@ -59,7 +57,6 @@ typedef struct {
Xilinx_done_fn done;
Xilinx_wr_fn wr;
Xilinx_post_fn post;
int relocated;
} Xilinx_Spartan3_Slave_Serial_fns;
/* Device Image Sizes

1
include/stratixII.h
View File

@ -27,6 +27,5 @@
extern int StratixII_load (Altera_desc * desc, void *image, size_t size);
extern int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize);
extern int StratixII_info (Altera_desc * desc);
extern int StratixII_reloc (Altera_desc * desc, ulong reloc_off);
#endif /* _STRATIXII_H_ */

3
include/virtex2.h
View File

@ -31,7 +31,6 @@
extern int Virtex2_load( Xilinx_desc *desc, void *image, size_t size );
extern int Virtex2_dump( Xilinx_desc *desc, void *buf, size_t bsize );
extern int Virtex2_info( Xilinx_desc *desc );
extern int Virtex2_reloc( Xilinx_desc *desc, ulong reloc_off );
/*
* Slave SelectMap Implementation function table.
@ -50,7 +49,6 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
int relocated;
} Xilinx_Virtex2_Slave_SelectMap_fns;
/* Slave Serial Implementation function table */
@ -59,7 +57,6 @@ typedef struct {
Xilinx_clk_fn clk;
Xilinx_rdata_fn rdata;
Xilinx_wdata_fn wdata;
int relocated;
} Xilinx_Virtex2_Slave_Serial_fns;
/* Device Image Sizes (in bytes)

1
include/xilinx.h
View File

@ -84,7 +84,6 @@ typedef struct { /* typedef Xilinx_desc */
extern int xilinx_load( Xilinx_desc *desc, void *image, size_t size );
extern int xilinx_dump( Xilinx_desc *desc, void *buf, size_t bsize );
extern int xilinx_info( Xilinx_desc *desc );
extern int xilinx_reloc( Xilinx_desc *desc, ulong reloc_offset );
/* Board specific implementation specific function types
*********************************************************************/