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avr32: Fix SPI portmux initialization 

Use the new GPIO manipulation functions to set up the chip select lines,
and make sure both busses use GPIO for chip select control.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This commit is contained in:
Haavard Skinnemoen 2008-06-20 12:44:28 +02:00
parent 4688f9e34a
commit 5605ef6b58
1 changed files with 34 additions and 22 deletions
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56
cpu/at32ap/at32ap700x/gpio.c
View File

@ -149,24 +149,27 @@ void gpio_enable_mmci(void)
#ifdef AT32AP700x_CHIP_HAS_SPI
void gpio_enable_spi0(unsigned long cs_mask)
{
u32 pa_mask = 0;
gpio_select_periph_A(GPIO_PIN_PA0, 0); /* MISO */
gpio_select_periph_A(GPIO_PIN_PA1, 0); /* MOSI */
gpio_select_periph_A(GPIO_PIN_PA2, 0); /* SCK */
if (cs_mask & (1 << 0))
pa_mask |= 1 << 3; /* NPCS0 */
if (cs_mask & (1 << 1))
pa_mask |= 1 << 4; /* NPCS1 */
if (cs_mask & (1 << 2))
pa_mask |= 1 << 5; /* NPCS2 */
if (cs_mask & (1 << 3))
pa_mask |= 1 << 20; /* NPCS3 */
__raw_writel(pa_mask, PIOA_BASE + 0x00);
__raw_writel(pa_mask, PIOA_BASE + 0x30);
__raw_writel(pa_mask, PIOA_BASE + 0x10);
/* Set up NPCSx as GPIO outputs, initially high */
if (cs_mask & (1 << 0)) {
gpio_set_value(GPIO_PIN_PA3, 1);
gpio_select_pio(GPIO_PIN_PA3, GPIOF_OUTPUT);
}
if (cs_mask & (1 << 1)) {
gpio_set_value(GPIO_PIN_PA4, 1);
gpio_select_pio(GPIO_PIN_PA4, GPIOF_OUTPUT);
}
if (cs_mask & (1 << 2)) {
gpio_set_value(GPIO_PIN_PA5, 1);
gpio_select_pio(GPIO_PIN_PA5, GPIOF_OUTPUT);
}
if (cs_mask & (1 << 3)) {
gpio_set_value(GPIO_PIN_PA20, 1);
gpio_select_pio(GPIO_PIN_PA20, GPIOF_OUTPUT);
}
}
void gpio_enable_spi1(unsigned long cs_mask)
@ -175,13 +178,22 @@ void gpio_enable_spi1(unsigned long cs_mask)
gpio_select_periph_B(GPIO_PIN_PB1, 0); /* MOSI */
gpio_select_periph_B(GPIO_PIN_PB5, 0); /* SCK */
if (cs_mask & (1 << 0))
gpio_select_periph_B(GPIO_PIN_PB2, 0); /* NPCS0 */
if (cs_mask & (1 << 1))
gpio_select_periph_B(GPIO_PIN_PB3, 0); /* NPCS1 */
if (cs_mask & (1 << 2))
gpio_select_periph_B(GPIO_PIN_PB4, 0); /* NPCS2 */
if (cs_mask & (1 << 3))
gpio_select_periph_A(GPIO_PIN_PA27, 0); /* NPCS3 */
/* Set up NPCSx as GPIO outputs, initially high */
if (cs_mask & (1 << 0)) {
gpio_set_value(GPIO_PIN_PB2, 1);
gpio_select_pio(GPIO_PIN_PB2, GPIOF_OUTPUT);
}
if (cs_mask & (1 << 1)) {
gpio_set_value(GPIO_PIN_PB3, 1);
gpio_select_pio(GPIO_PIN_PB3, GPIOF_OUTPUT);
}
if (cs_mask & (1 << 2)) {
gpio_set_value(GPIO_PIN_PB4, 1);
gpio_select_pio(GPIO_PIN_PB4, GPIOF_OUTPUT);
}
if (cs_mask & (1 << 3)) {
gpio_set_value(GPIO_PIN_PA27, 1);
gpio_select_pio(GPIO_PIN_PA27, GPIOF_OUTPUT);
}
}
#endif