Blackfin: unify cache handling code

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2008-08-07 15:21:47 -04:00
parent 3c87989834
commit 50f0d21191
2 changed files with 35 additions and 35 deletions

View File

@ -14,46 +14,11 @@
#include <asm/blackfin.h>
#include <asm/cplb.h>
#include <asm/mach-common/bits/core.h>
#include <asm/mach-common/bits/mpu.h>
#include <asm/mach-common/bits/trace.h>
#include "cpu.h"
#include "serial.h"
void icache_enable(void)
{
bfin_write_IMEM_CONTROL(bfin_read_IMEM_CONTROL() | (IMC | ENICPLB));
SSYNC();
}
void icache_disable(void)
{
bfin_write_IMEM_CONTROL(bfin_read_IMEM_CONTROL() & ~(IMC | ENICPLB));
SSYNC();
}
int icache_status(void)
{
return bfin_read_IMEM_CONTROL() & ENICPLB;
}
void dcache_enable(void)
{
bfin_write_DMEM_CONTROL(bfin_read_DMEM_CONTROL() | (ACACHE_BCACHE | ENDCPLB | PORT_PREF0));
SSYNC();
}
void dcache_disable(void)
{
bfin_write_DMEM_CONTROL(bfin_read_DMEM_CONTROL() & ~(ACACHE_BCACHE | ENDCPLB | PORT_PREF0));
SSYNC();
}
int dcache_status(void)
{
return bfin_read_DMEM_CONTROL() & ENDCPLB;
}
__attribute__ ((__noreturn__))
void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
{

View File

@ -11,6 +11,7 @@
#include <common.h>
#include <asm/blackfin.h>
#include <asm/mach-common/bits/mpu.h>
void flush_cache(unsigned long addr, unsigned long size)
{
@ -24,3 +25,37 @@ void flush_cache(unsigned long addr, unsigned long size)
if (dcache_status())
blackfin_dcache_flush_range((void *)addr, (void *)(addr + size));
}
void icache_enable(void)
{
bfin_write_IMEM_CONTROL(IMC | ENICPLB);
SSYNC();
}
void icache_disable(void)
{
bfin_write_IMEM_CONTROL(0);
SSYNC();
}
int icache_status(void)
{
return bfin_read_IMEM_CONTROL() & ENICPLB;
}
void dcache_enable(void)
{
bfin_write_DMEM_CONTROL(ACACHE_BCACHE | ENDCPLB | PORT_PREF0);
SSYNC();
}
void dcache_disable(void)
{
bfin_write_DMEM_CONTROL(0);
SSYNC();
}
int dcache_status(void)
{
return bfin_read_DMEM_CONTROL() & ENDCPLB;
}