sbc8641d: Update PCI code
Update to use the recent, common FSL PCI initialization code. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: joe.hamman@embeddedspecialties.com Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -206,100 +206,45 @@ int first_free_busno = 0;
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void pci_init_board(void)
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void pci_init_board(void)
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{
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{
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struct fsl_pci_info pci_info[2];
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volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
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volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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volatile ccsr_gur_t *gur = &immap->im_gur;
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uint devdisr = gur->devdisr;
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uint devdisr = in_be32(&gur->devdisr);
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uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
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uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
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>> MPC8641_PORDEVSR_IO_SEL_SHIFT;
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>> MPC8641_PORDEVSR_IO_SEL_SHIFT;
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int pcie_ep;
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int num = 0;
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#ifdef CONFIG_PCIE1
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#ifdef CONFIG_PCIE1
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{
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int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
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volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
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struct pci_controller *hose = &pcie1_hose;
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struct pci_region *r = hose->regions;
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#ifdef DEBUG
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uint host1_agent = (gur->porbmsr & MPC8641_PORBMSR_HA)
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>> MPC8641_PORBMSR_HA_SHIFT;
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uint pex1_agent = (host1_agent == 0) || (host1_agent == 1);
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#endif
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if ((io_sel == 2 || io_sel == 3 || io_sel == 5
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|| io_sel == 6 || io_sel == 7 || io_sel == 0xF)
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&& !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
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debug("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host");
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debug("0x%08x=0x%08x ", &pci->pme_msg_det, pci->pme_msg_det);
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if (pci->pme_msg_det) {
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pci->pme_msg_det = 0xffffffff;
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debug(" with errors. Clearing. Now 0x%08x",
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pci->pme_msg_det);
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}
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debug("\n");
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/* outbound memory */
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pci_set_region(r++,
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CONFIG_SYS_PCIE1_MEM_BUS,
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CONFIG_SYS_PCIE1_MEM_PHYS,
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CONFIG_SYS_PCIE1_MEM_SIZE,
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PCI_REGION_MEM);
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/* outbound io */
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pci_set_region(r++,
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CONFIG_SYS_PCIE1_IO_BUS,
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CONFIG_SYS_PCIE1_IO_PHYS,
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CONFIG_SYS_PCIE1_IO_SIZE,
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PCI_REGION_IO);
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hose->region_count = r - hose->regions;
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hose->first_busno=first_free_busno;
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fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
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first_free_busno=hose->last_busno+1;
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printf (" PCI-EXPRESS 1 on bus %02x - %02x\n",
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hose->first_busno,hose->last_busno);
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if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
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SET_STD_PCIE_INFO(pci_info[num], 1);
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pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
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printf(" PCIE1 connected as %s (base addr %lx)\n",
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pcie_ep ? "Endpoint" : "Root Complex",
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pci_info[num].regs);
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first_free_busno = fsl_pci_init_port(&pci_info[num++],
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&pcie1_hose, first_free_busno);
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} else {
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} else {
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puts("PCI-EXPRESS 1: Disabled\n");
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puts(" PCIE1: disabled\n");
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}
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}
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}
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#else
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#else
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puts("PCI-EXPRESS1: Disabled\n");
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puts(" PCIE1: disabled\n");
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#endif /* CONFIG_PCIE1 */
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#endif /* CONFIG_PCIE1 */
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#ifdef CONFIG_PCIE2
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#ifdef CONFIG_PCIE2
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{
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volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
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struct pci_controller *hose = &pcie2_hose;
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struct pci_region *r = hose->regions;
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/* outbound memory */
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SET_STD_PCIE_INFO(pci_info[num], 2);
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pci_set_region(r++,
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pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
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CONFIG_SYS_PCIE2_MEM_BUS,
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printf(" PCIE2 connected as %s (base addr %lx)\n",
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CONFIG_SYS_PCIE2_MEM_PHYS,
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pcie_ep ? "Endpoint" : "Root Complex",
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CONFIG_SYS_PCIE2_MEM_SIZE,
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pci_info[num].regs);
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PCI_REGION_MEM);
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first_free_busno = fsl_pci_init_port(&pci_info[num++],
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&pcie2_hose, first_free_busno);
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/* outbound io */
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pci_set_region(r++,
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CONFIG_SYS_PCIE2_IO_BUS,
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CONFIG_SYS_PCIE2_IO_PHYS,
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CONFIG_SYS_PCIE2_IO_SIZE,
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PCI_REGION_IO);
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hose->region_count = r - hose->regions;
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hose->first_busno=first_free_busno;
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fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);
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first_free_busno=hose->last_busno+1;
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printf (" PCI-EXPRESS 2 on bus %02x - %02x\n",
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hose->first_busno,hose->last_busno);
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}
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#else
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#else
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puts("PCI-EXPRESS 2: Disabled\n");
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puts(" PCIE2: disabled\n");
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#endif /* CONFIG_PCIE2 */
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#endif /* CONFIG_PCIE2 */
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}
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}
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