ppc4xx: Netstal HCU4 board. Added POST. Various fixes
- Various fixes - Reduced rom_size from 384 to 320 kB - Environment is now in flash - Added POST - Support for OF Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
This commit is contained in:
Niklaus Giger
Stefan Roese
parent
1a3ac86b79
commit
4bd5036e60
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@ -21,7 +21,7 @@
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# Netstal Maschinen AG: HCU4 boards
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#
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TEXT_BASE = 0xFFFa0000
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TEXT_BASE = 0xFFFB0000
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ifeq ($(debug),1)
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PLATFORM_CPPFLAGS += -DDEBUG -g
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@ -46,8 +46,8 @@
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* Base addresses -- Note these are effective addresses where the
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* actual resources get mapped (not physical addresses)
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*----------------------------------------------------------------------*/
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#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
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#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
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#define CFG_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
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#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
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#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
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@ -67,7 +67,7 @@
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#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE
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#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
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/*-----------------------------------------------------------------------
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* Serial Port
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@ -82,8 +82,8 @@
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* set Linux BASE_BAUD to 403200.
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*/
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#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
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#undef CONFIG_SERIAL_MULTI /* needed to be able to define
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CONFIG_SERIAL_SOFTWARE_FIFO */
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#define CONFIG_SERIAL_MULTI 1
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/* needed to be able to define CONFIG_SERIAL_SOFTWARE_FIFO */
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#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
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#define CFG_BASE_BAUD 691200
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@ -100,13 +100,24 @@
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#define CFG_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
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/*-----------------------------------------------------------------------
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* Flash
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*----------------------------------------------------------------------*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
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#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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/*-----------------------------------------------------------------------
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* Environment
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*----------------------------------------------------------------------*/
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#undef CFG_ENV_IS_IN_NVRAM
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#undef CFG_ENV_IS_IN_FLASH
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#define CFG_ENV_IS_IN_EEPROM
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#define CFG_ENV_IS_IN_FLASH
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#undef CFG_ENV_IS_NOWHERE
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#ifdef CFG_ENV_IS_IN_EEPROM
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@ -120,7 +131,7 @@
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/* Put the environment in Flash */
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#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
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#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
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#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
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#define CFG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */
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/* Address and size of Redundant Environment Sector */
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#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
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@ -158,7 +169,7 @@
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/* Setup some board specific values for the default environment variables */
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#define CONFIG_HOSTNAME hcu4
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#define CONFIG_IPADDR 172.25.1.42
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#define CONFIG_IPADDR 172.25.1.99
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#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */
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#define CONFIG_OVERWRITE_ETHADDR_ONCE
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#define CONFIG_SERVERIP 172.25.1.3
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@ -180,21 +191,17 @@
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"rootpath=/home/diagnose/eldk/ppc_4xx\0" \
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"bootfile=/tftpboot/hcu4/uImage\0" \
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"load=tftp 100000 hcu4/u-boot.bin\0" \
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"update=protect off FFFa0000 FFFFFFFF;era FFFa0000 FFFFFFFF;" \
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"cp.b 100000 FFFa0000 60000\0" \
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"update=protect off FFFB0000 FFFFFFFF;era FFFC0000 FFFFFFFF;" \
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"cp.b 100000 FFFB0000 50000\0" \
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"upd=run load;run update\0" \
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"vx=tftp ${loadaddr} hcu4_vx_rom;" \
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"setenv bootargs emac(0,0)hcu4_vx_rom e=${ipaddr} " \
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" h=${serverip} u=dpu pw=netstal8752 tn=hcu4 f=0x3008;" \
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"vx=tftp ${loadaddr} hcu4/hcu4_vx_rom;" \
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"setenv bootargs emac(0,0)c:hcu4/hcu4_vx_rom e=${ipaddr} " \
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"bootvx ${loadaddr}\0" \
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""
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#define CONFIG_BOOTCOMMAND "run vx"
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#if 0
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#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
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#else
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#endif
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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@ -202,10 +209,10 @@
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 1 /* PHY address */
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#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
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#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
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#define CONFIG_HAS_ETH0
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#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */
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#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & desC */
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/*
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* BOOTP options
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@ -221,7 +228,6 @@
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_BSP
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_DIAG
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@ -241,15 +247,30 @@
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#define CONFIG_SPD_EEPROM 1
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#define SPD_EEPROM_ADDRESS 0x50
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/* POST support */
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#define CONFIG_POST (CFG_POST_MEMORY | \
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CFG_POST_CPU | \
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CFG_POST_UART | \
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CFG_POST_I2C | \
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CFG_POST_CACHE | \
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CFG_POST_ETHER | \
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CFG_POST_SPR)
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#define CFG_POST_UART_TABLE {UART0_BASE}
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#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
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#undef CONFIG_LOGBUFFER
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#define CFG_POST_CACHE_ADDR 0x00800000 /* free virtual address */
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#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
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/*-----------------------------------------------------------------------
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* Miscellaneous configurable options
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*----------------------------------------------------------------------*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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@ -266,47 +287,40 @@
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#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
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#define CONFIG_LOOPW 1 /* enable loopw command */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
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#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
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/*-----------------------------------------------------------------------
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* External Bus Controller (EBC) Setup
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*/
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/* Memory Bank 0 (Flash Bank 0) initialization */
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#define CFG_EBC_PB0AP 0x02005400
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#define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
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#define CFG_EBC_CFG 0x98400000
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#define CFG_EBC_PB1AP 0x03041200
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#define CFG_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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/* Memory Bank 0 (Flash Bank 0) initialization */
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#define CFG_EBC_PB0AP 0x02005400
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#define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
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#define CFG_EBC_PB2AP 0x02054500
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#define CFG_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CFG_EBC_PB1AP 0x03041200
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#define CFG_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CFG_EBC_PB3AP 0x01840300
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#define CFG_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CFG_EBC_PB2AP 0x02054500
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#define CFG_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CFG_EBC_PB4AP 0x01800300
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#define CFG_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CFG_EBC_PB3AP 0x01840300
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#define CFG_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CFG_GPIO0_TCR 0x7ffe0000 /* GPIO value */
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#define CFG_EBC_PB4AP 0x01800300
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#define CFG_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
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#define CFG_GPIO0_OR 0xF27FFFFF /* GPIO value */
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#define CFG_GPIO0_TCR 0x7FFE0000 /* GPIO value */
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#define CFG_GPIO0_ODR 0x00E897FC /* GPIO value */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#define CFG_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */
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/* Init Memory Controller:
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*
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@ -326,8 +340,8 @@
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*
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* Boot Flags
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*/
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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#define CFG_HUSH_PARSER /* use "hush" command parser */
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#ifdef CFG_HUSH_PARSER
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@ -338,4 +352,9 @@
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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/* pass open firmware flat tree */
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#define CONFIG_OF_LIBFDT 1
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#define CONFIG_OF_BOARD_SETUP 1
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#endif /* __CONFIG_H */
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