Merge git://www.denx.de/git/u-boot
This commit is contained in:
Stefan Roese
commit
4980102871
309
CHANGELOG
309
CHANGELOG
|
|
@ -1,3 +1,267 @@
|
|||
commit 58b74b05c621e2835ecf4e2d3243042cf4186777
|
||||
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
Date: Fri Oct 19 00:09:05 2007 +0200
|
||||
|
||||
Fix missing drivers makefile entries ds1722.c mw_eeprom.c
|
||||
|
||||
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
|
||||
commit 96455bfebc9887837095c9051d216f53c61b5f10
|
||||
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
Date: Fri Oct 19 00:07:39 2007 +0200
|
||||
|
||||
Fix warning differ in signedness in board/innokom/innokom.c
|
||||
|
||||
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
|
||||
commit 2a4741d9a14ec475f50e9856d2c0a67e8b4271bd
|
||||
Author: Marcel Ziswiler <marcel@ziswiler.com>
|
||||
Date: Fri Oct 19 00:25:33 2007 +0200
|
||||
|
||||
fix pxa255_idp board
|
||||
|
||||
The pxa255_idp being an old unmaintained board showed several issues:
|
||||
1. CONFIG_INIT_CRITICAL was still defined.
|
||||
2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined.
|
||||
3. Symbol flash_addr was undeclared.
|
||||
4. The boards lowlevel_init function was still called memsetup.
|
||||
5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000.
|
||||
6. Using -march=armv5 instead of -march=armv5te resulted in lots of
|
||||
'target CPU does not support interworking' warnings on recent compilers.
|
||||
7. The PXA's serial driver redefined FFUART, BTUART and STUART used as
|
||||
indexes rather than the register definitions from the pxa-regs header
|
||||
file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to
|
||||
avoid any ambiguities.
|
||||
8. There were several redefinition warnings concerning ICMR, OSMR3,
|
||||
OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file.
|
||||
9. The board configuration file was rather outdated.
|
||||
10. The part header file defined the vendor, product and revision arrays
|
||||
as unsigned chars instead of just chars in the block_dev_desc_t
|
||||
structure.
|
||||
|
||||
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
|
||||
|
||||
commit 298cd4cafe81ff8a6c87be8fbc440a20720d3ed6
|
||||
Author: Rune Torgersen <runet@innovsys.com>
|
||||
Date: Wed Oct 17 11:56:31 2007 -0500
|
||||
|
||||
Make MPC8266ADS command selection more robust
|
||||
|
||||
Fix MPC8266 command line definition so it won't break when new commands
|
||||
are added to u-boot.
|
||||
Signed-off-by Rune Torgersen <runet@innovsys.com>
|
||||
|
||||
commit 05bf4919c1ce49cdedadacd564d0786a8ed796a1
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Sun Oct 21 01:01:17 2007 +0200
|
||||
|
||||
Minor coding style cleanup; update CHANGELOG
|
||||
|
||||
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
||||
|
||||
commit ff285ca07eda1ea4a8909848cc1cc604ec8fec9c
|
||||
Author: Vlad Lungu <vlad@comsys.ro>
|
||||
Date: Thu Oct 4 20:47:10 2007 +0300
|
||||
|
||||
Fix NE2000 driver:
|
||||
|
||||
Fixed typo in ne2000.h, thinko re n2k_inb() usage, don't try
|
||||
to do anything in eth_stop() if eth_init() was not called.
|
||||
Simplified RX path in order to avoid timeouts on really really
|
||||
fast NE2000 cards (read: qemu with internal tftp), NetLoop() is
|
||||
clever enough to cope with 1 packet per eth_rx().
|
||||
|
||||
Signed-off-by: Vlad Lungu <vlad@comsys.ro>
|
||||
|
||||
commit 5441f61a3d8b7034f19fc1361183e936198e6dbb
|
||||
Author: Detlev Zundel <dzu@denx.de>
|
||||
Date: Fri Oct 19 16:47:26 2007 +0200
|
||||
|
||||
Fix two typos.
|
||||
|
||||
Signed-off-by: Detlev Zundel <dzu@denx.de>
|
||||
|
||||
commit 281df457c1aa50d2752165d0c5c3282d4027b974
|
||||
Author: Tony Li <tony.li@freescale.com>
|
||||
Date: Thu Oct 18 17:47:19 2007 +0800
|
||||
|
||||
mpc83xx: Add configure entry for MPC83xx ATM support
|
||||
|
||||
Add MPC8360EMDS_ATM_config and MPC832XEMDS_ATM_config into
|
||||
Makfile and MAKEALL
|
||||
|
||||
Signed-off-by: Tony Li <tony.li@freescale.com>
|
||||
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
||||
|
||||
commit d2646554f529a9577515eceb0ec5eceee18244ba
|
||||
Author: Tony Li <tony.li@freescale.com>
|
||||
Date: Thu Oct 18 17:44:38 2007 +0800
|
||||
|
||||
mpc83xx: pq-mds-pib.c typo error
|
||||
|
||||
Correct to val8 from val.
|
||||
|
||||
Signed-off-by: Tony Li <tony.li@freescale.com>
|
||||
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
||||
|
||||
commit 3e11ae80fec1ee12194940955431186abf6009c2
|
||||
Author: Stefan Roese <sr@denx.de>
|
||||
Date: Wed Oct 17 15:40:19 2007 +0200
|
||||
|
||||
ppc4xx: Add 667/133 (CPU/PLB) frequency setup to Sequoia bootstrap command
|
||||
|
||||
Signed-off-by: Stefan Roese <sr@denx.de>
|
||||
|
||||
commit 7ee6ba1a056e4061ab4cfde30127e332e7957afd
|
||||
Author: runet@innovsys.com <runet@innovsys.com>
|
||||
Date: Tue Oct 16 14:50:40 2007 -0500
|
||||
|
||||
Make MPC8266ADS board compile again.
|
||||
|
||||
Signed-off-by: Runet Torgersen <runet@innovsys.com>
|
||||
|
||||
commit 2491167c245d8ebe6f2dbd8c4287aaa0d14fe93a
|
||||
Author: Jon Loeliger <jdl@freescale.com>
|
||||
Date: Mon Aug 27 12:41:03 2007 -0500
|
||||
|
||||
86xx: Allow for fewer DDR slots per memory controller.
|
||||
|
||||
As a direct correlation exists between DDR DIMM slots
|
||||
and SPD EEPROM addresses used to configure them, use
|
||||
the individually defined SPD_EEPROM_ADDRESS* values to
|
||||
determine if a DDR DIMM slot should have its SPD
|
||||
configuration read or not.
|
||||
|
||||
Effectively, this now allows for 1 or 2 DIMM slots
|
||||
per memory controller.
|
||||
|
||||
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
||||
|
||||
commit 4d4a945e189a2f384c66432316da2788a0ac1607
|
||||
Author: Rodolfo Giometti <giometti@enneenne.com>
|
||||
Date: Mon Oct 15 11:59:17 2007 +0200
|
||||
|
||||
PXA USB OHCI: "usb stop" implementation.
|
||||
|
||||
Some USB keys need to be switched off before loading the kernel
|
||||
otherwise they can remain in an undefined status which prevents them
|
||||
to be correctly recognized by the kernel.
|
||||
|
||||
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
|
||||
|
||||
commit e2e93442e558cf1500e92861f99713b2f045ea22
|
||||
Author: Stefan Roese <sr@denx.de>
|
||||
Date: Mon Oct 15 11:39:00 2007 +0200
|
||||
|
||||
ppc4xx: Fix bug in I2C bootstrap values for Sequoia/Rainier
|
||||
|
||||
The I2C bootstrap values that can be setup via the "bootstrap" command,
|
||||
were setup incorrect regarding the generation of the internal sync PCI
|
||||
clock. The values for PLB clock == 133MHz were slighly incorrect and the
|
||||
values for PLB clock == 166MHz were totally incorrect. This could
|
||||
lead to a hangup upon booting while PCI configuration scan.
|
||||
|
||||
This patch fixes this issue and configures valid PCI divisor values
|
||||
for the sync PCI clock, with respect to the provided external async
|
||||
PCI frequency.
|
||||
|
||||
Here the values of the formula in the chapter 14.2 "PCI clocking"
|
||||
from the 440EPx users manual:
|
||||
|
||||
AsyncPCICLK - 1MHz <= SyncPCIClk <= (2 * AsyncPCIClk) - 1MHz
|
||||
|
||||
33MHz async PCI frequency:
|
||||
PLB = 133:
|
||||
=> 32 <= 44.3 <= 65 (div = 3)
|
||||
|
||||
PLB = 166:
|
||||
=> 32 <= 55.3 <= 65 (div = 3)
|
||||
|
||||
66MHz async PCI frequency:
|
||||
PLB = 133:
|
||||
=> 65 <= 66.5 <= 132 (div = 2)
|
||||
|
||||
PLB = 166:
|
||||
=> 65 <= 83 <= 132 (div = 2)
|
||||
|
||||
Signed-off-by: Stefan Roese <sr@denx.de>
|
||||
|
||||
commit 5a5958b7de70ae99f0e7cbd5c97ec1346e051587
|
||||
Author: Stefan Roese <sr@denx.de>
|
||||
Date: Mon Oct 15 11:29:33 2007 +0200
|
||||
|
||||
ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite
|
||||
|
||||
The BCSR status bit for the 66MHz PCI operation was correctly
|
||||
addressed (MSB/LSB problem). Now the correct currently setup
|
||||
PCI frequency is displayed upon bootup.
|
||||
|
||||
This patch also fixes this problem on Rainier & Yellowstone, since these
|
||||
boards use the same souce code as Sequoia & Yosemite do.
|
||||
|
||||
Signed-off-by: Stefan Roese <sr@denx.de>
|
||||
|
||||
commit da3aad55cbde80ab6e301aafa82a2c411aa53eff
|
||||
Author: Martin Krause <martin.krause@tqs.de>
|
||||
Date: Wed Sep 26 17:55:56 2007 +0200
|
||||
|
||||
TQM860M: adjust for doubled flash sector size.
|
||||
|
||||
Adjust flash map to support the new S29GLxxN (N-Type) Flashes with
|
||||
doubled sector size.
|
||||
|
||||
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
||||
|
||||
commit 9d29250e2e62f4bf20c7a20b4173d84c48f11f5d
|
||||
Author: Jens Gehrlein <jens.gehrlein@tqs.de>
|
||||
Date: Wed Sep 26 17:55:54 2007 +0200
|
||||
|
||||
TQM8xx: Fix CAN timing.
|
||||
|
||||
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
||||
|
||||
commit d43e489baf02afae49077791fb22332d240d8656
|
||||
Author: Martin Krause <martin.krause@tqs.de>
|
||||
Date: Thu Sep 27 14:54:36 2007 +0200
|
||||
|
||||
TQM866M: fix SDRAM refresh
|
||||
|
||||
At 133 MHz the current SDRAM refresh rate is too fast
|
||||
(measured 4 * 1.17 us).
|
||||
CFG_MAMR_PTA changes from 39 to 97. This result
|
||||
in a refresh rate of 4 * 7.8 us at the default clock
|
||||
50 MHz. At 133 MHz the value will be then 4 * 2.9 us.
|
||||
This is a compromise until a new method is found to
|
||||
adjust the refresh rate.
|
||||
|
||||
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
||||
|
||||
commit 9ef57bbee1c67cc01da2026c242c4692db32be36
|
||||
Author: Martin Krause <martin.krause@tqs.de>
|
||||
Date: Wed Sep 26 17:55:55 2007 +0200
|
||||
|
||||
TQM866M: adjust for doubled flash sector size.
|
||||
|
||||
Adjust flash map to support the new S29GLxxN (N-Type) Flashes with
|
||||
doubled sector size.
|
||||
|
||||
Signed-off-by: Martin Krause <martin.krause@tqs.de>
|
||||
|
||||
commit f8bf90461d9bad2e6fed31fcebaf235f60dd6763
|
||||
Author: Michal Simek <monstr@monstr.eu>
|
||||
Date: Sun Oct 14 16:12:29 2007 +0200
|
||||
|
||||
[FIX] XUPV2P change command handling
|
||||
and remove code violation
|
||||
|
||||
commit 636400198228d96983c06657b17f760f5989958e
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Sun Oct 14 00:13:19 2007 +0200
|
||||
|
||||
Prepare for 1.3.0-rc3 release
|
||||
|
||||
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
||||
|
||||
commit 68f14f77ca5fe5f9cc025c8cae101671f628309f
|
||||
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
Date: Sat Sep 29 13:41:37 2007 +0200
|
||||
|
|
@ -109,6 +373,26 @@ Date: Mon Oct 1 09:51:50 2007 +0200
|
|||
|
||||
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
|
||||
|
||||
commit 785c13477b77dcd2e6c5128fffcdb4e1943f4818
|
||||
Author: Timo Ketola <timo.ketola@exertus.fi>
|
||||
Date: Mon Sep 24 14:50:32 2007 +0300
|
||||
|
||||
Bugfix: Use only one PTD for one endpoint
|
||||
|
||||
Original isp116x-hcd code prepared multiple PTDs for longer than 16
|
||||
byte transfers for one endpoint. That is unnecessary because the
|
||||
ISP116x is able to split long data from one PTD into multiple
|
||||
transactions based on the buffer size of the endpoint. It also caused
|
||||
serious problems if the endpoint NAKed some of the transactions. In
|
||||
that case ISP116x wouldn't notice that the other PTDs were for the same
|
||||
endpoint and would try the other PTDs possibly out of order. That would
|
||||
break the whole transfer.
|
||||
|
||||
This patch makes isp116x_submit_job to use one PTD for one transfer.
|
||||
|
||||
Signed-off-by: Timo Ketola <timo.ketola@exertus.fi>
|
||||
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
|
||||
|
||||
commit 86ec86c04326c3913178a7679aa910de071da75d
|
||||
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
Date: Thu Sep 27 23:27:47 2007 +0200
|
||||
|
|
@ -331,6 +615,12 @@ Date: Mon Sep 10 17:13:49 2007 +0900
|
|||
|
||||
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
|
||||
|
||||
commit b49c90df6e7cfcfb8b862b8bbf8448dff5eed9a5
|
||||
Author: Michal Simek <monstr@monstr.eu>
|
||||
Date: Sun Sep 16 20:51:57 2007 +0200
|
||||
|
||||
[FIX] remove files form repository
|
||||
|
||||
commit 67c31036acaaaa992fc346cc89db0909a7e733c4
|
||||
Author: Wolfgang Denk <wd@denx.de>
|
||||
Date: Sun Sep 16 17:10:04 2007 +0200
|
||||
|
|
@ -478,6 +768,25 @@ Date: Sat Sep 15 11:55:42 2007 +0200
|
|||
|
||||
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805
|
||||
|
||||
commit 991b089d1ce5ad945725e3657a8f106dfa02a38e
|
||||
Author: Michal Simek <monstr@monstr.eu>
|
||||
Date: Sat Sep 15 00:03:35 2007 +0200
|
||||
|
||||
Synchronize with U-BOOT mainline
|
||||
|
||||
commit d7fee32b7e61fe11c64e371cde79faa4768e8350
|
||||
Author: Sam Sparks <SSparks@twacs.com>
|
||||
Date: Fri Sep 14 11:14:42 2007 -0600
|
||||
|
||||
Update MPC8349ITX*_config to place config.tmp in right place.
|
||||
|
||||
MPC834ITX*_config does not store config.tmp at the correct locatation,
|
||||
causing MPC8349ITXGP to have the wrong TEXT_BASE.
|
||||
|
||||
Signed-off-by: Sam Sparks <SSparks@twacs.com>
|
||||
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
|
||||
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
||||
|
||||
commit 6e7b7b6ea1b6d04dbe96242eb6a0c1c664c98e8c
|
||||
Author: Bartlomiej Sieka <tur@semihalf.com>
|
||||
Date: Thu Sep 13 18:21:48 2007 +0200
|
||||
|
|
|
|||
2
MAKEALL
2
MAKEALL
|
|
@ -301,10 +301,12 @@ LIST_83xx=" \
|
|||
MPC8313ERDB_66 \
|
||||
MPC8323ERDB \
|
||||
MPC832XEMDS \
|
||||
MPC832XEMDS_ATM \
|
||||
MPC8349EMDS \
|
||||
MPC8349ITX \
|
||||
MPC8349ITXGP \
|
||||
MPC8360EMDS \
|
||||
MPC8360EMDS_ATM \
|
||||
sbc8349 \
|
||||
TQM834x \
|
||||
"
|
||||
|
|
|
|||
36
Makefile
36
Makefile
|
|
@ -393,7 +393,7 @@ BC3450_config: unconfig
|
|||
cpci5200_config: unconfig
|
||||
@$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd
|
||||
|
||||
hmi1001_config: unconfig
|
||||
hmi1001_config: unconfig
|
||||
@$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001
|
||||
|
||||
Lite5200_config \
|
||||
|
|
@ -435,7 +435,7 @@ icecube_5100_config: unconfig
|
|||
}
|
||||
@$(MKCONFIG) -a IceCube ppc mpc5xxx icecube
|
||||
|
||||
jupiter_config: unconfig
|
||||
jupiter_config: unconfig
|
||||
@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
|
||||
|
||||
v38b_config: unconfig
|
||||
|
|
@ -640,9 +640,9 @@ TQM5200_STK100_config: unconfig
|
|||
{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
|
||||
}
|
||||
@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200
|
||||
uc101_config: unconfig
|
||||
uc101_config: unconfig
|
||||
@$(MKCONFIG) uc101 ppc mpc5xxx uc101
|
||||
motionpro_config: unconfig
|
||||
motionpro_config: unconfig
|
||||
@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
|
||||
|
||||
|
||||
|
|
@ -930,7 +930,7 @@ RPXlite_DW_NVRAM_config \
|
|||
RPXlite_DW_NVRAM_64_config \
|
||||
RPXlite_DW_NVRAM_LCD_config \
|
||||
RPXlite_DW_NVRAM_64_LCD_config \
|
||||
RPXlite_DW_config: unconfig
|
||||
RPXlite_DW_config: unconfig
|
||||
@mkdir -p $(obj)include
|
||||
@ >$(obj)include/config.h
|
||||
@[ -z "$(findstring _64,$@)" ] || \
|
||||
|
|
@ -1766,7 +1766,8 @@ MPC8323ERDB_config: unconfig
|
|||
MPC832XEMDS_config \
|
||||
MPC832XEMDS_HOST_33_config \
|
||||
MPC832XEMDS_HOST_66_config \
|
||||
MPC832XEMDS_SLAVE_config: unconfig
|
||||
MPC832XEMDS_SLAVE_config \
|
||||
MPC832XEMDS_ATM_config: unconfig
|
||||
@mkdir -p $(obj)include
|
||||
@echo "" >$(obj)include/config.h ; \
|
||||
if [ "$(findstring _HOST_,$@)" ] ; then \
|
||||
|
|
@ -1781,10 +1782,17 @@ MPC832XEMDS_SLAVE_config: unconfig
|
|||
if [ "$(findstring _33_,$@)" ] ; then \
|
||||
echo -n "...33M ..." ; \
|
||||
echo "#define PCI_33M" >>$(obj)include/config.h ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
|
||||
fi ; \
|
||||
if [ "$(findstring _66_,$@)" ] ; then \
|
||||
echo -n "...66M..." ; \
|
||||
echo "#define PCI_66M" >>$(obj)include/config.h ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
|
||||
fi ; \
|
||||
if [ "$(findstring _ATM_,$@)" ] ; then \
|
||||
echo -n "...ATM..." ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
|
||||
fi ;
|
||||
@$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds freescale
|
||||
|
||||
|
|
@ -1808,7 +1816,8 @@ MPC8349ITXGP_config: unconfig
|
|||
MPC8360EMDS_config \
|
||||
MPC8360EMDS_HOST_33_config \
|
||||
MPC8360EMDS_HOST_66_config \
|
||||
MPC8360EMDS_SLAVE_config: unconfig
|
||||
MPC8360EMDS_SLAVE_config \
|
||||
MPC8360EMDS_ATM_config: unconfig
|
||||
@mkdir -p $(obj)include
|
||||
@echo "" >$(obj)include/config.h ; \
|
||||
if [ "$(findstring _HOST_,$@)" ] ; then \
|
||||
|
|
@ -1823,10 +1832,17 @@ MPC8360EMDS_SLAVE_config: unconfig
|
|||
if [ "$(findstring _33_,$@)" ] ; then \
|
||||
echo -n "...33M ..." ; \
|
||||
echo "#define PCI_33M" >>$(obj)include/config.h ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
|
||||
fi ; \
|
||||
if [ "$(findstring _66_,$@)" ] ; then \
|
||||
echo -n "...66M..." ; \
|
||||
echo "#define PCI_66M" >>$(obj)include/config.h ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
|
||||
fi ; \
|
||||
if [ "$(findstring _ATM_,$@)" ] ; then \
|
||||
echo -n "...ATM..." ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \
|
||||
echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \
|
||||
fi ;
|
||||
@$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale
|
||||
|
||||
|
|
@ -1985,13 +2001,13 @@ AmigaOneG3SE_config: unconfig
|
|||
BAB7xx_config: unconfig
|
||||
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx bab7xx eltec
|
||||
|
||||
CPCI750_config: unconfig
|
||||
CPCI750_config: unconfig
|
||||
@$(MKCONFIG) CPCI750 ppc 74xx_7xx cpci750 esd
|
||||
|
||||
DB64360_config: unconfig
|
||||
DB64360_config: unconfig
|
||||
@$(MKCONFIG) DB64360 ppc 74xx_7xx db64360 Marvell
|
||||
|
||||
DB64460_config: unconfig
|
||||
DB64460_config: unconfig
|
||||
@$(MKCONFIG) DB64460 ppc 74xx_7xx db64460 Marvell
|
||||
|
||||
ELPPC_config: unconfig
|
||||
|
|
|
|||
|
|
@ -79,19 +79,19 @@ int pib_init(void)
|
|||
|
||||
printf("QOC3 ATM card on PMC0\n");
|
||||
#elif defined(CONFIG_MPC832XEMDS)
|
||||
val = 0;
|
||||
i2c_write(0x26, 0x7, 1, &val, 1);
|
||||
val = 0xf7;
|
||||
i2c_write(0x26, 0x3, 1, &val, 1);
|
||||
val8 = 0;
|
||||
i2c_write(0x26, 0x7, 1, &val8, 1);
|
||||
val8 = 0xf7;
|
||||
i2c_write(0x26, 0x3, 1, &val8, 1);
|
||||
|
||||
val = 0;
|
||||
i2c_write(0x21, 0x6, 1, &val, 1);
|
||||
i2c_write(0x21, 0x7, 1, &val, 1);
|
||||
val8 = 0;
|
||||
i2c_write(0x21, 0x6, 1, &val8, 1);
|
||||
i2c_write(0x21, 0x7, 1, &val8, 1);
|
||||
|
||||
val = 0xdf;
|
||||
i2c_write(0x21, 0x2, 1, &val, 1);
|
||||
val = 0xef;
|
||||
i2c_write(0x21, 0x3, 1, &val, 1);
|
||||
val8 = 0xdf;
|
||||
i2c_write(0x21, 0x2, 1, &val8, 1);
|
||||
val8 = 0xef;
|
||||
i2c_write(0x21, 0x3, 1, &val8, 1);
|
||||
|
||||
eieio();
|
||||
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ int i2c_init_board(void)
|
|||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
uchar *str;
|
||||
char *str;
|
||||
|
||||
/* determine if the software update key is pressed during startup */
|
||||
if (GPLR0 & 0x00000800) {
|
||||
|
|
|
|||
|
|
@ -138,6 +138,12 @@ long int initdram(int board_type)
|
|||
#ifndef CFG_RAMBOOT
|
||||
ulong test1, test2;
|
||||
|
||||
/* According to AN3221 (MPC5200B SDRAM Initialization and
|
||||
* Configuration), the SDelay register must be written a value of
|
||||
* 0x00000004 as the first step of the SDRAM contorller configuration.
|
||||
*/
|
||||
*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
|
||||
|
||||
/* configure SDRAM start/end for detection */
|
||||
*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
|
||||
*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
|
|||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS := pxa_idp.o
|
||||
SOBJS := memsetup.o
|
||||
SOBJS := lowlevel_init.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
#TEXT_BASE = 0xa1700000
|
||||
TEXT_BASE = 0xa3000000
|
||||
TEXT_BASE = 0xa3080000
|
||||
#TEXT_BASE = 0
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
*
|
||||
* NOTE: I haven't clean this up considerably, just enough to get it
|
||||
* running. See hal_platform_setup.h for the source. See
|
||||
* board/cradle/memsetup.S for another PXA250 setup that is
|
||||
* board/cradle/lowlevel_init.S for another PXA250 setup that is
|
||||
* much cleaner.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
|
|
@ -41,8 +41,8 @@ DRAM_SIZE: .long CFG_DRAM_SIZE
|
|||
/*
|
||||
* Memory setup
|
||||
*/
|
||||
.globl memsetup
|
||||
memsetup:
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
|
||||
mov r10, lr
|
||||
|
||||
|
|
@ -395,7 +395,7 @@ initclks:
|
|||
|
||||
/* Save SDRAM size */
|
||||
ldr r1, =DRAM_SIZE
|
||||
str r8, [r1]
|
||||
str r8, [r1]
|
||||
|
||||
/* Interrupt init: Mask all interrupts */
|
||||
ldr r0, =ICMR /* enable no sources */
|
||||
|
|
@ -426,7 +426,7 @@ initclks:
|
|||
bl blink
|
||||
#endif
|
||||
|
||||
endmemsetup:
|
||||
endlowlevel_init:
|
||||
|
||||
mov pc, r10
|
||||
|
||||
|
|
@ -44,6 +44,7 @@ SECTIONS
|
|||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
|
|
|||
|
|
@ -561,7 +561,7 @@ void led_init(void)
|
|||
gpt->gpt6.emsr |= 0x00000024;
|
||||
gpt->gpt7.emsr |= 0x00000024;
|
||||
|
||||
|
||||
#ifndef CONFIG_TQM5200S
|
||||
/* enable SM501 GPIO control (in both power modes) */
|
||||
*(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE0_GATE) |=
|
||||
POWER_MODE_GATE_GPIO_PWM_I2C;
|
||||
|
|
@ -574,6 +574,7 @@ void led_init(void)
|
|||
|
||||
/* configure SM501 gpio pins 48-51 as output */
|
||||
*(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_HIGH) |= (0xF << 16);
|
||||
#endif /* !CONFIG_TQM5200S */
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -650,7 +651,7 @@ int do_led(char *argv[])
|
|||
gpt->gpt7.emsr &= ~(1 << 4);
|
||||
}
|
||||
break;
|
||||
|
||||
#ifndef CONFIG_TQM5200S
|
||||
case 24:
|
||||
if (strcmp (argv[3], "on") == 0) {
|
||||
*(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
|
||||
|
|
@ -730,7 +731,7 @@ int do_led(char *argv[])
|
|||
~(0x1 << 19);
|
||||
}
|
||||
break;
|
||||
|
||||
#endif /* !CONFIG_TQM5200S */
|
||||
default:
|
||||
printf ("%s: invalid led number %s\n", __FUNCTION__, argv[2]);
|
||||
return 1;
|
||||
|
|
@ -1110,7 +1111,7 @@ int do_rs232(char *argv[])
|
|||
return error_status;
|
||||
}
|
||||
|
||||
#ifndef CONFIG_FO300
|
||||
#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S)
|
||||
static void sm501_backlight (unsigned int state)
|
||||
{
|
||||
if (state == BL_ON) {
|
||||
|
|
@ -1120,7 +1121,7 @@ static void sm501_backlight (unsigned int state)
|
|||
*(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &=
|
||||
~((1 << 26) | (1 << 27));
|
||||
}
|
||||
#endif
|
||||
#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */
|
||||
|
||||
int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
||||
{
|
||||
|
|
@ -1160,7 +1161,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|||
else
|
||||
printf ("Error\n");
|
||||
return rcode;
|
||||
#ifndef CONFIG_FO300
|
||||
#if !defined(CONFIG_FO300) && !defined(CONFIG_TQM5200S)
|
||||
} else if (strncmp (argv[1], "backlight", 4) == 0) {
|
||||
if (strncmp (argv[2], "on", 2) == 0) {
|
||||
sm501_backlight (BL_ON);
|
||||
|
|
@ -1170,7 +1171,7 @@ int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
|||
sm501_backlight (BL_OFF);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif /* !CONFIG_FO300 & !CONFIG_TQM5200S */
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
@ -1228,8 +1229,10 @@ U_BOOT_CMD(
|
|||
" - loopback plug for X83 required\n"
|
||||
"fkt rs232 number\n"
|
||||
" - loopback plug(s) for X2 required\n"
|
||||
#ifndef CONFIG_TQM5200S
|
||||
"fkt backlight on/off\n"
|
||||
" - switch backlight on or off\n"
|
||||
#endif /* !CONFIG_TQM5200S */
|
||||
);
|
||||
#elif defined(CONFIG_FO300)
|
||||
U_BOOT_CMD(
|
||||
|
|
|
|||
|
|
@ -543,6 +543,7 @@ int last_stage_init (void)
|
|||
__asm__ volatile ("sync");
|
||||
}
|
||||
|
||||
#ifndef CONFIG_TQM5200S /* The TQM5200S has no SM501 grafic controller */
|
||||
/*
|
||||
* Check for Grafic Controller
|
||||
*/
|
||||
|
|
@ -586,6 +587,7 @@ int last_stage_init (void)
|
|||
#endif
|
||||
|
||||
return 0;
|
||||
#endif /* !CONFIG_TQM5200S */
|
||||
}
|
||||
|
||||
#ifdef CONFIG_VIDEO_SM501
|
||||
|
|
|
|||
|
|
@ -354,6 +354,8 @@ long int initdram (int board_type)
|
|||
udelay (10000);
|
||||
|
||||
#ifdef CONFIG_CAN_DRIVER
|
||||
/* UPM initialization for CAN @ CLKOUT <= 66 MHz */
|
||||
|
||||
/* Initialize OR3 / BR3 */
|
||||
memctl->memc_or3 = CFG_OR3_CAN;
|
||||
memctl->memc_br3 = CFG_BR3_CAN;
|
||||
|
|
@ -362,7 +364,7 @@ long int initdram (int board_type)
|
|||
memctl->memc_mbmr = MBMR_GPL_B4DIS; /* GPL_B4 ouput line Disable */
|
||||
|
||||
/* Initialize UPMB for CAN: single read */
|
||||
memctl->memc_mdr = 0xFFFFC004;
|
||||
memctl->memc_mdr = 0xFFFFCC04;
|
||||
memctl->memc_mcr = 0x0100 | UPMB;
|
||||
|
||||
memctl->memc_mdr = 0x0FFFD004;
|
||||
|
|
@ -374,23 +376,23 @@ long int initdram (int board_type)
|
|||
memctl->memc_mdr = 0x3FFFC004;
|
||||
memctl->memc_mcr = 0x0103 | UPMB;
|
||||
|
||||
memctl->memc_mdr = 0xFFFFDC05;
|
||||
memctl->memc_mdr = 0xFFFFDC07;
|
||||
memctl->memc_mcr = 0x0104 | UPMB;
|
||||
|
||||
/* Initialize UPMB for CAN: single write */
|
||||
memctl->memc_mdr = 0xFFFCC004;
|
||||
memctl->memc_mdr = 0xFFFCCC04;
|
||||
memctl->memc_mcr = 0x0118 | UPMB;
|
||||
|
||||
memctl->memc_mdr = 0xCFFCD004;
|
||||
memctl->memc_mdr = 0xCFFCDC04;
|
||||
memctl->memc_mcr = 0x0119 | UPMB;
|
||||
|
||||
memctl->memc_mdr = 0x0FFCC000;
|
||||
memctl->memc_mdr = 0x3FFCC000;
|
||||
memctl->memc_mcr = 0x011A | UPMB;
|
||||
|
||||
memctl->memc_mdr = 0x7FFCC004;
|
||||
memctl->memc_mdr = 0xFFFCC004;
|
||||
memctl->memc_mcr = 0x011B | UPMB;
|
||||
|
||||
memctl->memc_mdr = 0xFFFDCC05;
|
||||
memctl->memc_mdr = 0xFFFDC405;
|
||||
memctl->memc_mcr = 0x011C | UPMB;
|
||||
#endif /* CONFIG_CAN_DRIVER */
|
||||
|
||||
|
|
|
|||
|
|
@ -46,11 +46,11 @@ unsigned long flash_init (void)
|
|||
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
|
||||
switch (i) {
|
||||
case 0:
|
||||
flash_get_size ((long *) PHYS_FLASH_1, &flash_info[i]);
|
||||
flash_get_size ((vu_long *) PHYS_FLASH_1, &flash_info[i]);
|
||||
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
|
||||
break;
|
||||
case 1:
|
||||
flash_get_size ((long *) PHYS_FLASH_2, &flash_info[i]);
|
||||
flash_get_size ((vu_long *) PHYS_FLASH_2, &flash_info[i]);
|
||||
flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
|
||||
break;
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -466,7 +466,7 @@ U_BOOT_CMD(
|
|||
"\t'arg' can be the address of an initrd image\n"
|
||||
#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)
|
||||
"\tWhen booting a Linux kernel which requires a flat device-tree\n"
|
||||
"\ta third argument is required which is the address of the of the\n"
|
||||
"\ta third argument is required which is the address of the\n"
|
||||
"\tdevice-tree blob. To boot that kernel without an initrd image,\n"
|
||||
"\tuse a '-' for the second argument. If you do not pass a third\n"
|
||||
"\ta bd_info struct will be passed instead\n"
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ int do_dtt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
|
|||
|
||||
U_BOOT_CMD(
|
||||
dtt, 1, 1, do_dtt,
|
||||
"dtt - Digital Thermometer and Themostat\n",
|
||||
"dtt - Digital Thermometer and Thermostat\n",
|
||||
" - Read temperature from digital thermometer and thermostat.\n"
|
||||
);
|
||||
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@
|
|||
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
int usb_cpu_init()
|
||||
int usb_cpu_init(void)
|
||||
{
|
||||
/* Enable USB host clock. */
|
||||
*AT91C_PMC_SCER = AT91C_PMC_UHP; /* 48MHz clock enabled for UHP */
|
||||
|
|
@ -36,7 +36,7 @@ int usb_cpu_init()
|
|||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_stop()
|
||||
int usb_cpu_stop(void)
|
||||
{
|
||||
/* Initialization failed */
|
||||
*AT91C_PMC_PCDR = 1 << AT91C_ID_UHP; /* Peripheral Clock Disable Register */
|
||||
|
|
@ -44,9 +44,9 @@ int usb_cpu_stop()
|
|||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_init_fail()
|
||||
int usb_cpu_init_fail(void)
|
||||
{
|
||||
usb_cpu_stop();
|
||||
return usb_cpu_stop();
|
||||
}
|
||||
|
||||
# endif /* CONFIG_AT91RM9200 */
|
||||
|
|
|
|||
|
|
@ -25,8 +25,7 @@
|
|||
PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \
|
||||
-msoft-float
|
||||
|
||||
#PLATFORM_CPPFLAGS += -mapcs-32 -march=armv4 -mtune=strongarm1100
|
||||
PLATFORM_CPPFLAGS += -march=armv5 -mtune=xscale
|
||||
PLATFORM_CPPFLAGS += -march=armv5te -mtune=xscale
|
||||
# =========================================================================
|
||||
#
|
||||
# Supply options according to compiler version
|
||||
|
|
|
|||
|
|
@ -35,17 +35,17 @@
|
|||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define FFUART 0
|
||||
#define BTUART 1
|
||||
#define STUART 2
|
||||
#define FFUART_INDEX 0
|
||||
#define BTUART_INDEX 1
|
||||
#define STUART_INDEX 2
|
||||
|
||||
#ifndef CONFIG_SERIAL_MULTI
|
||||
#if defined (CONFIG_FFUART)
|
||||
#define UART_INDEX FFUART
|
||||
#define UART_INDEX FFUART_INDEX
|
||||
#elif defined (CONFIG_BTUART)
|
||||
#define UART_INDEX BTUART
|
||||
#define UART_INDEX BTUART_INDEX
|
||||
#elif defined (CONFIG_STUART)
|
||||
#define UART_INDEX STUART
|
||||
#define UART_INDEX STUART_INDEX
|
||||
#else
|
||||
#error "Bad: you didn't configure serial ..."
|
||||
#endif
|
||||
|
|
@ -71,7 +71,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
|
|||
hang ();
|
||||
|
||||
switch (uart_index) {
|
||||
case FFUART:
|
||||
case FFUART_INDEX:
|
||||
#ifdef CONFIG_CPU_MONAHANS
|
||||
CKENA |= CKENA_22_FFUART;
|
||||
#else
|
||||
|
|
@ -90,7 +90,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
|
|||
FFIER = IER_UUE; /* Enable FFUART */
|
||||
break;
|
||||
|
||||
case BTUART:
|
||||
case BTUART_INDEX:
|
||||
#ifdef CONFIG_CPU_MONAHANS
|
||||
CKENA |= CKENA_21_BTUART;
|
||||
#else
|
||||
|
|
@ -110,7 +110,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
|
|||
|
||||
break;
|
||||
|
||||
case STUART:
|
||||
case STUART_INDEX:
|
||||
#ifdef CONFIG_CPU_MONAHANS
|
||||
CKENA |= CKENA_23_STUART;
|
||||
#else
|
||||
|
|
@ -154,20 +154,20 @@ int pxa_init_dev (unsigned int uart_index)
|
|||
void pxa_putc_dev (unsigned int uart_index,const char c)
|
||||
{
|
||||
switch (uart_index) {
|
||||
case FFUART:
|
||||
case FFUART_INDEX:
|
||||
/* wait for room in the tx FIFO on FFUART */
|
||||
while ((FFLSR & LSR_TEMT) == 0)
|
||||
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
|
||||
FFTHR = c;
|
||||
break;
|
||||
|
||||
case BTUART:
|
||||
case BTUART_INDEX:
|
||||
while ((BTLSR & LSR_TEMT ) == 0 )
|
||||
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
|
||||
BTTHR = c;
|
||||
break;
|
||||
|
||||
case STUART:
|
||||
case STUART_INDEX:
|
||||
while ((STLSR & LSR_TEMT ) == 0 )
|
||||
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
|
||||
STTHR = c;
|
||||
|
|
@ -187,11 +187,11 @@ void pxa_putc_dev (unsigned int uart_index,const char c)
|
|||
int pxa_tstc_dev (unsigned int uart_index)
|
||||
{
|
||||
switch (uart_index) {
|
||||
case FFUART:
|
||||
case FFUART_INDEX:
|
||||
return FFLSR & LSR_DR;
|
||||
case BTUART:
|
||||
case BTUART_INDEX:
|
||||
return BTLSR & LSR_DR;
|
||||
case STUART:
|
||||
case STUART_INDEX:
|
||||
return STLSR & LSR_DR;
|
||||
}
|
||||
return -1;
|
||||
|
|
@ -205,16 +205,16 @@ int pxa_tstc_dev (unsigned int uart_index)
|
|||
int pxa_getc_dev (unsigned int uart_index)
|
||||
{
|
||||
switch (uart_index) {
|
||||
case FFUART:
|
||||
case FFUART_INDEX:
|
||||
while (!(FFLSR & LSR_DR))
|
||||
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
|
||||
return (char) FFRBR & 0xff;
|
||||
|
||||
case BTUART:
|
||||
case BTUART_INDEX:
|
||||
while (!(BTLSR & LSR_DR))
|
||||
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
|
||||
return (char) BTRBR & 0xff;
|
||||
case STUART:
|
||||
case STUART_INDEX:
|
||||
while (!(STLSR & LSR_DR))
|
||||
WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
|
||||
return (char) STRBR & 0xff;
|
||||
|
|
@ -233,32 +233,32 @@ pxa_puts_dev (unsigned int uart_index,const char *s)
|
|||
#if defined (CONFIG_FFUART)
|
||||
static int ffuart_init(void)
|
||||
{
|
||||
return pxa_init_dev(FFUART);
|
||||
return pxa_init_dev(FFUART_INDEX);
|
||||
}
|
||||
|
||||
static void ffuart_setbrg(void)
|
||||
{
|
||||
return pxa_setbrg_dev(FFUART);
|
||||
return pxa_setbrg_dev(FFUART_INDEX);
|
||||
}
|
||||
|
||||
static void ffuart_putc(const char c)
|
||||
{
|
||||
return pxa_putc_dev(FFUART,c);
|
||||
return pxa_putc_dev(FFUART_INDEX,c);
|
||||
}
|
||||
|
||||
static void ffuart_puts(const char *s)
|
||||
{
|
||||
return pxa_puts_dev(FFUART,s);
|
||||
return pxa_puts_dev(FFUART_INDEX,s);
|
||||
}
|
||||
|
||||
static int ffuart_getc(void)
|
||||
{
|
||||
return pxa_getc_dev(FFUART);
|
||||
return pxa_getc_dev(FFUART_INDEX);
|
||||
}
|
||||
|
||||
static int ffuart_tstc(void)
|
||||
{
|
||||
return pxa_tstc_dev(FFUART);
|
||||
return pxa_tstc_dev(FFUART_INDEX);
|
||||
}
|
||||
|
||||
struct serial_device serial_ffuart_device =
|
||||
|
|
@ -277,32 +277,32 @@ struct serial_device serial_ffuart_device =
|
|||
#if defined (CONFIG_BTUART)
|
||||
static int btuart_init(void)
|
||||
{
|
||||
return pxa_init_dev(BTUART);
|
||||
return pxa_init_dev(BTUART_INDEX);
|
||||
}
|
||||
|
||||
static void btuart_setbrg(void)
|
||||
{
|
||||
return pxa_setbrg_dev(BTUART);
|
||||
return pxa_setbrg_dev(BTUART_INDEX);
|
||||
}
|
||||
|
||||
static void btuart_putc(const char c)
|
||||
{
|
||||
return pxa_putc_dev(BTUART,c);
|
||||
return pxa_putc_dev(BTUART_INDEX,c);
|
||||
}
|
||||
|
||||
static void btuart_puts(const char *s)
|
||||
{
|
||||
return pxa_puts_dev(BTUART,s);
|
||||
return pxa_puts_dev(BTUART_INDEX,s);
|
||||
}
|
||||
|
||||
static int btuart_getc(void)
|
||||
{
|
||||
return pxa_getc_dev(BTUART);
|
||||
return pxa_getc_dev(BTUART_INDEX);
|
||||
}
|
||||
|
||||
static int btuart_tstc(void)
|
||||
{
|
||||
return pxa_tstc_dev(BTUART);
|
||||
return pxa_tstc_dev(BTUART_INDEX);
|
||||
}
|
||||
|
||||
struct serial_device serial_btuart_device =
|
||||
|
|
@ -321,32 +321,32 @@ struct serial_device serial_btuart_device =
|
|||
#if defined (CONFIG_STUART)
|
||||
static int stuart_init(void)
|
||||
{
|
||||
return pxa_init_dev(STUART);
|
||||
return pxa_init_dev(STUART_INDEX);
|
||||
}
|
||||
|
||||
static void stuart_setbrg(void)
|
||||
{
|
||||
return pxa_setbrg_dev(STUART);
|
||||
return pxa_setbrg_dev(STUART_INDEX);
|
||||
}
|
||||
|
||||
static void stuart_putc(const char c)
|
||||
{
|
||||
return pxa_putc_dev(STUART,c);
|
||||
return pxa_putc_dev(STUART_INDEX,c);
|
||||
}
|
||||
|
||||
static void stuart_puts(const char *s)
|
||||
{
|
||||
return pxa_puts_dev(STUART,s);
|
||||
return pxa_puts_dev(STUART_INDEX,s);
|
||||
}
|
||||
|
||||
static int stuart_getc(void)
|
||||
{
|
||||
return pxa_getc_dev(STUART);
|
||||
return pxa_getc_dev(STUART_INDEX);
|
||||
}
|
||||
|
||||
static int stuart_tstc(void)
|
||||
{
|
||||
return pxa_tstc_dev(STUART);
|
||||
return pxa_tstc_dev(STUART_INDEX);
|
||||
}
|
||||
|
||||
struct serial_device serial_stuart_device =
|
||||
|
|
|
|||
|
|
@ -166,13 +166,17 @@ _start_armboot: .word start_armboot
|
|||
/* */
|
||||
/****************************************************************************/
|
||||
/* mk@tbd: Fix this! */
|
||||
#ifdef CONFIG_CPU_MONAHANS
|
||||
#if defined(CONFIG_PXA250) || defined(CONFIG_CPU_MONAHANS)
|
||||
#undef ICMR
|
||||
#undef OSMR3
|
||||
#undef OSCR
|
||||
#undef OWER
|
||||
#undef OIER
|
||||
#endif
|
||||
#ifdef CONFIG_PXA250
|
||||
#undef RCSR
|
||||
#undef CCCR
|
||||
#endif
|
||||
|
||||
/* Interrupt-Controller base address */
|
||||
IC_BASE: .word 0x40d00000
|
||||
|
|
|
|||
|
|
@ -27,8 +27,9 @@
|
|||
# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
|
||||
|
||||
#include <asm/arch/pxa-regs.h>
|
||||
#include <usb.h>
|
||||
|
||||
int usb_cpu_init()
|
||||
int usb_cpu_init(void)
|
||||
{
|
||||
#if defined(CONFIG_CPU_MONAHANS)
|
||||
/* Enable USB host clock. */
|
||||
|
|
@ -65,7 +66,7 @@ int usb_cpu_init()
|
|||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_stop()
|
||||
int usb_cpu_stop(void)
|
||||
{
|
||||
UHCHR |= UHCHR_FHR;
|
||||
udelay(11);
|
||||
|
|
@ -86,7 +87,7 @@ int usb_cpu_stop()
|
|||
return 0;
|
||||
}
|
||||
|
||||
int usb_cpu_init_fail()
|
||||
int usb_cpu_init_fail(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# (C) Copyright 2000-2007
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
|
|
@ -27,34 +27,33 @@ include $(TOPDIR)/config.mk
|
|||
|
||||
LIB = $(obj)libdrivers.a
|
||||
|
||||
COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o atmel_usart.o \
|
||||
COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o \
|
||||
ati_radeon_fb.o atmel_usart.o \
|
||||
bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
|
||||
cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
|
||||
e1000.o eepro100.o enc28j60.o \
|
||||
i8042.o inca-ip_sw.o isp116x-hcd.o keyboard.o \
|
||||
lan91c96.o macb.o \
|
||||
ds1722.o e1000.o eepro100.o enc28j60.o \
|
||||
fsl_i2c.o fsl_pci_init.o \
|
||||
i8042.o inca-ip_sw.o isp116x-hcd.o \
|
||||
keyboard.o ks8695eth.o \
|
||||
lan91c96.o macb.o mpc8xx_pcmcia.o mw_eeprom.o \
|
||||
natsemi.o ne2000.o netarm_eth.o netconsole.o \
|
||||
ns16550.o ns8382x.o ns87308.o ns7520_eth.o omap1510_i2c.o \
|
||||
omap24xx_i2c.o pci.o pci_auto.o pci_indirect.o \
|
||||
pcnet.o plb2800_eth.o \
|
||||
ps2ser.o ps2mult.o pc_keyb.o \
|
||||
rtl8019.o rtl8139.o rtl8169.o \
|
||||
omap24xx_i2c.o pc_keyb.o \
|
||||
pci.o pci_auto.o pci_indirect.o \
|
||||
pcnet.o plb2800_eth.o ps2ser.o ps2mult.o pxa_pcmcia.o \
|
||||
rpx_pcmcia.o rtl8019.o rtl8139.o rtl8169.o \
|
||||
s3c4510b_eth.o s3c4510b_uart.o \
|
||||
sed13806.o sed156x.o \
|
||||
serial.o serial_max3100.o \
|
||||
serial_pl010.o serial_pl011.o serial_xuartlite.o \
|
||||
sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \
|
||||
status_led.o sym53c8xx.o systemace.o ahci.o \
|
||||
ti_pci1410a.o tigon3.o tsec.o \
|
||||
ti_pci1410a.o tigon3.o tqm8xx_pcmcia.o tsec.o \
|
||||
tsi108_eth.o tsi108_i2c.o tsi108_pci.o \
|
||||
usb_ohci.o \
|
||||
usbdcore.o usbdcore_ep0.o usbdcore_mpc8xx.o usbdcore_omap1510.o \
|
||||
usbtty.o \
|
||||
videomodes.o w83c553f.o \
|
||||
ks8695eth.o \
|
||||
pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \
|
||||
rpx_pcmcia.o \
|
||||
fsl_i2c.o fsl_pci_init.o ati_radeon_fb.o
|
||||
videomodes.o w83c553f.o
|
||||
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
|
|
|||
|
|
@ -1,10 +1,10 @@
|
|||
|
||||
#include <common.h>
|
||||
|
||||
#include <ssi.h>
|
||||
|
||||
#ifdef CONFIG_DS1722
|
||||
|
||||
#include <ssi.h>
|
||||
|
||||
static void ds1722_select(int dev)
|
||||
{
|
||||
ssi_set_interface(4096, 0, 0, 0);
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@ fsl_pci_init(struct pci_controller *hose)
|
|||
u8 temp8;
|
||||
int r;
|
||||
int bridge;
|
||||
int inbound = 0;
|
||||
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) hose->cfg_addr;
|
||||
pci_dev_t dev = PCI_BDF(busno,0,0);
|
||||
|
||||
|
|
@ -74,6 +75,7 @@ fsl_pci_init(struct pci_controller *hose)
|
|||
PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP |
|
||||
(__ilog2(hose->regions[r].size) - 1);
|
||||
pi++;
|
||||
inbound = hose->regions[r].size > 0;
|
||||
} else { /* Outbound */
|
||||
po->powbar = (hose->regions[r].phys_start >> 12) & 0x000fffff;
|
||||
po->potar = (hose->regions[r].bus_start >> 12) & 0x000fffff;
|
||||
|
|
@ -138,6 +140,12 @@ fsl_pci_init(struct pci_controller *hose)
|
|||
pciauto_setup_device(hose, dev, 0, hose->pci_mem,
|
||||
hose->pci_prefetch, hose->pci_io);
|
||||
|
||||
if (inbound) {
|
||||
pci_hose_read_config_word(hose, dev, PCI_COMMAND, &temp16);
|
||||
pci_hose_write_config_word(hose, dev, PCI_COMMAND,
|
||||
temp16 | PCI_COMMAND_MEMORY);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_PCI_NOSCAN
|
||||
printf (" Scanning PCI bus %02x\n", hose->current_busno);
|
||||
hose->last_busno = pci_hose_scan_bus(hose,hose->current_busno);
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
/* Three-wire (MicroWire) serial eeprom driver (for 93C46 and compatibles) */
|
||||
|
||||
#include <common.h>
|
||||
#include <ssi.h>
|
||||
|
||||
|
||||
#ifdef CONFIG_MW_EEPROM
|
||||
|
||||
#include <ssi.h>
|
||||
|
||||
/*
|
||||
* Serial EEPROM opcodes, including start bit
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -745,17 +745,15 @@ static void pcnet_reset_8390(void)
|
|||
|
||||
PRINTK("nic base is %lx\n", nic_base);
|
||||
|
||||
#if 1
|
||||
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
|
||||
PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
|
||||
n2k_outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, E8390_CMD);
|
||||
PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
|
||||
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
|
||||
PRINTK("cmd (at %lx) is %x\n", nic_base+ E8390_CMD, n2k_inb(E8390_CMD));
|
||||
#endif
|
||||
n2k_outb(E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD);
|
||||
|
||||
n2k_outb(n2k_inb(nic_base + PCNET_RESET), PCNET_RESET);
|
||||
n2k_outb(n2k_inb(PCNET_RESET), PCNET_RESET);
|
||||
|
||||
for (i = 0; i < 100; i++) {
|
||||
if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0)
|
||||
|
|
@ -833,6 +831,7 @@ static int plen[NB];
|
|||
static int nrx = 0;
|
||||
|
||||
static int pkey = -1;
|
||||
static int initialized=0;
|
||||
|
||||
void uboot_push_packet_len(int len) {
|
||||
PRINTK("pushed len = %d, nrx = %d\n", len, nrx);
|
||||
|
|
@ -846,7 +845,9 @@ void uboot_push_packet_len(int len) {
|
|||
}
|
||||
plen[nrx] = len;
|
||||
dp83902a_recv(&pbuf[nrx*2000], len);
|
||||
nrx++;
|
||||
|
||||
/*Just pass it to the upper layer*/
|
||||
NetReceive(&pbuf[nrx*2000], plen[nrx]);
|
||||
}
|
||||
|
||||
void uboot_push_tx_done(int key, int val) {
|
||||
|
|
@ -903,37 +904,21 @@ int eth_init(bd_t *bd) {
|
|||
if (dp83902a_init() == false)
|
||||
return -1;
|
||||
dp83902a_start(dev_addr);
|
||||
initialized=1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void eth_halt() {
|
||||
|
||||
PRINTK("### eth_halt\n");
|
||||
|
||||
dp83902a_stop();
|
||||
if(initialized)
|
||||
dp83902a_stop();
|
||||
initialized=0;
|
||||
}
|
||||
|
||||
int eth_rx() {
|
||||
int j, tmo;
|
||||
|
||||
PRINTK("### eth_rx\n");
|
||||
|
||||
tmo = get_timer (0) + TOUT * CFG_HZ;
|
||||
while(1) {
|
||||
dp83902a_poll();
|
||||
if (nrx > 0) {
|
||||
for(j=0; j<nrx; j++) {
|
||||
NetReceive(&pbuf[j*2000], plen[j]);
|
||||
}
|
||||
nrx = 0;
|
||||
return 1;
|
||||
}
|
||||
if (get_timer (0) >= tmo) {
|
||||
printf("timeout during rx\n");
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
dp83902a_poll();
|
||||
return 1;
|
||||
}
|
||||
|
||||
int eth_send(volatile void *packet, int length) {
|
||||
|
|
@ -959,5 +944,4 @@ int eth_send(volatile void *packet, int length) {
|
|||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ are GPL, so this is, of course, GPL.
|
|||
this file might be covered by the GNU General Public License.
|
||||
|
||||
Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
|
||||
at http://sources.redhat.com/ecos/ecos-license/ */
|
||||
at http://sources.redhat.com/ecos/ecos-license/
|
||||
-------------------------------------------
|
||||
####ECOSGPLCOPYRIGHTEND####
|
||||
####BSDCOPYRIGHTBEGIN####
|
||||
|
|
|
|||
|
|
@ -19,21 +19,21 @@
|
|||
extern char *strcpy(char *__dest, __const__ char *__src);
|
||||
|
||||
#undef __HAVE_ARCH_STRNCPY
|
||||
extern char *strncpy(char *__dest, __const__ char *__src, size_t __n);
|
||||
extern char *strncpy(char *__dest, __const__ char *__src, __kernel_size_t __n);
|
||||
|
||||
#undef __HAVE_ARCH_STRCMP
|
||||
extern int strcmp(__const__ char *__cs, __const__ char *__ct);
|
||||
|
||||
#undef __HAVE_ARCH_STRNCMP
|
||||
extern int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count);
|
||||
extern int strncmp(__const__ char *__cs, __const__ char *__ct, __kernel_size_t __count);
|
||||
|
||||
#undef __HAVE_ARCH_MEMSET
|
||||
extern void *memset(void *__s, int __c, size_t __count);
|
||||
extern void *memset(void *__s, int __c, __kernel_size_t __count);
|
||||
|
||||
#undef __HAVE_ARCH_MEMCPY
|
||||
extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
|
||||
extern void *memcpy(void *__to, __const__ void *__from, __kernel_size_t __n);
|
||||
|
||||
#undef __HAVE_ARCH_MEMMOVE
|
||||
extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
|
||||
extern void *memmove(void *__dest, __const__ void *__src, __kernel_size_t __n);
|
||||
|
||||
#endif /* _ASM_STRING_H */
|
||||
|
|
|
|||
|
|
@ -146,37 +146,26 @@
|
|||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_all.h>
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#undef CONFIG_CMD_BEDBUG
|
||||
#undef CONFIG_CMD_BMP
|
||||
#undef CONFIG_CMD_BSP
|
||||
#undef CONFIG_CMD_DATE
|
||||
#undef CONFIG_CMD_DHCP
|
||||
#undef CONFIG_CMD_DISPLAY
|
||||
#undef CONFIG_CMD_DOC
|
||||
#undef CONFIG_CMD_DTT
|
||||
#undef CONFIG_CMD_EEPROM
|
||||
#undef CONFIG_CMD_ELF
|
||||
#undef CONFIG_CMD_EXT2
|
||||
#undef CONFIG_CMD_FDC
|
||||
#undef CONFIG_CMD_FDOS
|
||||
#undef CONFIG_CMD_HWFLOW
|
||||
#undef CONFIG_CMD_IDE
|
||||
#undef CONFIG_CMD_JFFS2
|
||||
#undef CONFIG_CMD_KGDB
|
||||
#undef CONFIG_CMD_MFSL
|
||||
#undef CONFIG_CMD_MMC
|
||||
#undef CONFIG_CMD_NAND
|
||||
#undef CONFIG_CMD_PCMCIA
|
||||
#undef CONFIG_CMD_REISER
|
||||
#undef CONFIG_CMD_SCSI
|
||||
#undef CONFIG_CMD_SPI
|
||||
#undef CONFIG_CMD_SNTP
|
||||
#undef CONFIG_CMD_VFD
|
||||
#undef CONFIG_CMD_UNIVERSE
|
||||
#undef CONFIG_CMD_USB
|
||||
#undef CONFIG_CMD_XIMG
|
||||
/* Commands we want, that are not part of default set */
|
||||
#define CONFIG_CMD_ASKENV /* ask for env variable */
|
||||
#define CONFIG_CMD_CACHE /* icache, dcache */
|
||||
#define CONFIG_CMD_DHCP /* DHCP Support */
|
||||
#define CONFIG_CMD_DIAG /* Diagnostics */
|
||||
#define CONFIG_CMD_IMMAP /* IMMR dump support */
|
||||
#define CONFIG_CMD_IRQ /* irqinfo */
|
||||
#define CONFIG_CMD_MII /* MII support */
|
||||
#define CONFIG_CMD_PCI /* pciinfo */
|
||||
#define CONFIG_CMD_PING /* ping support */
|
||||
#define CONFIG_CMD_PORTIO /* Port I/O */
|
||||
#define CONFIG_CMD_REGINFO /* Register dump */
|
||||
#define CONFIG_CMD_SAVES /* save S record dump */
|
||||
#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */
|
||||
|
||||
/* Commands from default set we don't need */
|
||||
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
|
||||
#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
|
||||
|
||||
/* Define a command string that is automatically executed when no character
|
||||
* is read on the console interface withing "Boot Delay" after reset.
|
||||
|
|
|
|||
|
|
@ -257,8 +257,8 @@
|
|||
"fdt_addr=FC0A0000\0" \
|
||||
"kernel_addr=FC0C0000\0" \
|
||||
"ramdisk_addr=FC300000\0" \
|
||||
"kernel_addr_r=200000\0" \
|
||||
"fdt_addr_r=400000\0" \
|
||||
"kernel_addr_r=400000\0" \
|
||||
"fdt_addr_r=600000\0" \
|
||||
"rootpath=/opt/eldk/ppc_6xx\0" \
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||
|
|
@ -547,7 +547,7 @@
|
|||
# if defined (CONFIG_TQM5200_REV100)
|
||||
# error TQM5200 REV100 not supported on STK52XX REV200 or above
|
||||
# else/* TQM5200 REV200 and above */
|
||||
# define CFG_GPS_PORT_CONFIG 0x91500004
|
||||
# define CFG_GPS_PORT_CONFIG 0x91500404
|
||||
# endif
|
||||
# endif
|
||||
#elif defined (CONFIG_FO300)
|
||||
|
|
|
|||
|
|
@ -69,9 +69,14 @@
|
|||
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
|
||||
"rootpath=/opt/eldk/ppc_8xx\0" \
|
||||
"bootfile=/tftpboot/TQM860M/uImage\0" \
|
||||
"fdt_addr=40080000\0" \
|
||||
"kernel_addr=400A0000\0" \
|
||||
"fdt_addr=400C0000\0" \
|
||||
"kernel_addr=40100000\0" \
|
||||
"ramdisk_addr=40280000\0" \
|
||||
"load=tftp 200000 ${u-boot}\0" \
|
||||
"update=protect off 40000000 +${filesize};" \
|
||||
"erase 40000000 +${filesize};" \
|
||||
"cp.b 200000 40000000 ${filesize};" \
|
||||
"protect on 40000000 +${filesize}\0" \
|
||||
""
|
||||
#define CONFIG_BOOTCOMMAND "run flash_self"
|
||||
|
||||
|
|
@ -172,7 +177,7 @@
|
|||
#define CFG_FLASH_BASE 0x40000000
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
||||
#define CFG_MONITOR_BASE CFG_FLASH_BASE
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
|
||||
#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
|
|
@ -193,7 +198,7 @@
|
|||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */
|
||||
|
||||
/* Address and size of Redundant Environment Sector */
|
||||
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
|
||||
|
|
|
|||
|
|
@ -81,9 +81,14 @@
|
|||
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
|
||||
"rootpath=/opt/eldk/ppc_8xx\0" \
|
||||
"bootfile=/tftpboot/TQM866M/uImage\0" \
|
||||
"fdt_addr=40080000\0" \
|
||||
"kernel_addr=400A0000\0" \
|
||||
"fdt_addr=400C0000\0" \
|
||||
"kernel_addr=40100000\0" \
|
||||
"ramdisk_addr=40280000\0" \
|
||||
"load=tftp 200000 ${u-boot}\0" \
|
||||
"update=protect off 40000000 +${filesize};" \
|
||||
"erase 40000000 +${filesize};" \
|
||||
"cp.b 200000 40000000 ${filesize};" \
|
||||
"protect on 40000000 +${filesize}\0" \
|
||||
""
|
||||
#define CONFIG_BOOTCOMMAND "run flash_self"
|
||||
|
||||
|
|
@ -215,7 +220,7 @@
|
|||
#define CFG_FLASH_BASE 0x40000000
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
||||
#define CFG_MONITOR_BASE CFG_FLASH_BASE
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
|
||||
#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
|
|
@ -236,7 +241,7 @@
|
|||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */
|
||||
#define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */
|
||||
|
||||
/* Address and size of Redundant Environment Sector */
|
||||
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
|
||||
|
|
@ -421,26 +426,30 @@
|
|||
#define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64))
|
||||
|
||||
/*
|
||||
* Memory Periodic Timer Prescaler
|
||||
* Periodic timer for refresh, start with refresh rate for 40 MHz clock
|
||||
* (CFG_8xx_CPUCLK_MIN / CFG_PTA_PER_CLK)
|
||||
* Periodic timer (MAMR[PTx]) for 4 * 7.8 us refresh (= 31.2 us per quad)
|
||||
*
|
||||
* CPUclock(MHz) * 31.2
|
||||
* CFG_MAMR_PTA = ----------------------------------- with DFBRG = 0
|
||||
* 2^(2*SCCR[DFBRG]) * MPTPR_PTP_DIV16
|
||||
*
|
||||
* CPU clock = 15 MHz: CFG_MAMR_PTA = 29 -> 4 * 7.73 us
|
||||
* CPU clock = 50 MHz: CFG_MAMR_PTA = 97 -> 4 * 7.76 us
|
||||
* CPU clock = 66 MHz: CFG_MAMR_PTA = 128 -> 4 * 7.75 us
|
||||
* CPU clock = 133 MHz: CFG_MAMR_PTA = 255 -> 4 * 7.67 us
|
||||
*
|
||||
* Value 97 is for 4 * 7.8 us at 50 MHz. So the refresh cycle requirement will
|
||||
* be met also in the default configuration, i.e. if environment variable
|
||||
* 'cpuclk' is not set.
|
||||
*/
|
||||
#define CFG_MAMR_PTA 39
|
||||
#define CFG_MAMR_PTA 97
|
||||
|
||||
/*
|
||||
* For 16 MBit, refresh rates could be 31.3 us
|
||||
* (= 64 ms / 2K = 125 / quad bursts).
|
||||
* For a simpler initialization, 15.6 us is used instead.
|
||||
*
|
||||
* #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks
|
||||
* #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank
|
||||
* Memory Periodic Timer Prescaler Register (MPTPR) values.
|
||||
*/
|
||||
#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */
|
||||
#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */
|
||||
|
||||
/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */
|
||||
#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */
|
||||
#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */
|
||||
/* 4 * 7.8 us refresh (= 31.2 us per quad) at 50 MHz and PTA = 97 */
|
||||
#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16
|
||||
/* 4 * 3.9 us refresh (= 15.6 us per quad) at 50 MHz and PTA = 97 */
|
||||
#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8
|
||||
|
||||
/*
|
||||
* MAMR settings for SDRAM
|
||||
|
|
|
|||
|
|
@ -123,6 +123,8 @@
|
|||
#define CONFIG_USB_STORAGE 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
|
||||
#include <asm/arch/pxa-regs.h> /* for OHCI_REGS_BASE */
|
||||
|
||||
#undef CFG_USB_OHCI_BOARD_INIT
|
||||
#define CFG_USB_OHCI_CPU_INIT 1
|
||||
#define CFG_USB_OHCI_REGS_BASE OHCI_REGS_BASE
|
||||
|
|
|
|||
|
|
@ -42,6 +42,7 @@
|
|||
#endif
|
||||
#define CONFIG_MMC 1
|
||||
#define BOARD_LATE_INIT 1
|
||||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
|
||||
|
|
|
|||
|
|
@ -163,9 +163,9 @@
|
|||
|
||||
|
||||
/*
|
||||
* Clock configuration: SYS_XTALIN = 25MHz
|
||||
* Clock configuration: SYS_XTALIN = 33MHz
|
||||
*/
|
||||
#define CFG_MPC5XXX_CLKIN 25000000
|
||||
#define CFG_MPC5XXX_CLKIN 33000000
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -211,7 +211,7 @@
|
|||
#endif
|
||||
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */
|
||||
#define CFG_MALLOC_LEN (1024 << 10) /* 1 MiB for malloc() */
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
|
||||
|
||||
|
||||
|
|
@ -221,7 +221,7 @@
|
|||
/* Boot Chipselect */
|
||||
#define CFG_BOOTCS_START CFG_FLASH_BASE
|
||||
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
|
||||
#define CFG_BOOTCS_CFG 0x03035D00
|
||||
#define CFG_BOOTCS_CFG 0x00045D00
|
||||
|
||||
/* Flash memory addressing */
|
||||
#define CFG_CS0_START CFG_FLASH_BASE
|
||||
|
|
@ -251,11 +251,11 @@
|
|||
/*
|
||||
* SDRAM configuration
|
||||
*/
|
||||
/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 2, 32 bit data bus */
|
||||
#define SDRAM_CONFIG1 0x52222600
|
||||
#define SDRAM_CONFIG2 0x88b70000
|
||||
#define SDRAM_CONTROL 0x50570000
|
||||
#define SDRAM_MODE 0x008d0000
|
||||
/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
|
||||
#define SDRAM_CONFIG1 0x62322900
|
||||
#define SDRAM_CONFIG2 0x88c70000
|
||||
#define SDRAM_CONTROL 0x504f0000
|
||||
#define SDRAM_MODE 0x00cd0000
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -267,7 +267,7 @@
|
|||
#define CFG_FLASH_SIZE 0x01000000
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
|
||||
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
|
||||
#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
|
||||
#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */
|
||||
#define CONFIG_FLASH_16BIT /* Flash is 16-bit */
|
||||
|
||||
/*
|
||||
|
|
@ -277,8 +277,8 @@
|
|||
#define MTDIDS_DEFAULT "nor0=motionpro-0"
|
||||
#define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
|
||||
"13m(fs),2m(kernel),256k(uboot)," \
|
||||
"64k(env),64k(redund_env),64k(dtb)," \
|
||||
"-(user_data)"
|
||||
"128k(env),128k(redund_env)," \
|
||||
"128k(dtb),-(user_data)"
|
||||
|
||||
/*
|
||||
* IDE/ATA configuration
|
||||
|
|
@ -356,7 +356,7 @@ extern void __led_set(led_id_t id, int state);
|
|||
/* This has to be a multiple of the Flash sector size */
|
||||
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
|
||||
#define CFG_ENV_SIZE 0x1000
|
||||
#define CFG_ENV_SECT_SIZE 0x10000
|
||||
#define CFG_ENV_SECT_SIZE 0x20000
|
||||
|
||||
/* Configuration of redundant environment */
|
||||
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
|
||||
|
|
@ -394,7 +394,8 @@ extern void __led_set(led_id_t id, int state);
|
|||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
|
||||
#define CFG_MEMTEST_END 0x03f00000 /* 1 ... 64 MiB in DRAM */
|
||||
#define CFG_MEMTEST_END 0x03e00000 /* 1 ... 62 MiB in DRAM */
|
||||
#define CFG_ALT_MEMTEST
|
||||
|
||||
#define CFG_LOAD_ADDR 0x200000 /* default kernel load addr */
|
||||
|
||||
|
|
|
|||
|
|
@ -38,10 +38,11 @@
|
|||
#include <asm/arch/pxa-regs.h>
|
||||
|
||||
/*
|
||||
* If we are developing, we might want to start armboot from ram
|
||||
* If we are developing, we might want to start U-Boot from RAM
|
||||
* so we MUST NOT initialize critical regs like mem-timing ...
|
||||
*/
|
||||
#define CONFIG_INIT_CRITICAL /* undef for developing */
|
||||
#undef CONFIG_SKIP_LOWLEVEL_INIT /* define for developing */
|
||||
#undef CONFIG_SKIP_RELOCATE_UBOOT /* define for developing */
|
||||
|
||||
/*
|
||||
* define the following to enable debug blinks. A debug blink function
|
||||
|
|
@ -62,6 +63,7 @@
|
|||
#endif
|
||||
|
||||
#define CONFIG_MMC 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define BOARD_LATE_INIT 1
|
||||
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
|
|
@ -121,7 +123,6 @@
|
|||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_DHCP
|
||||
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTCOMMAND "bootm 40000"
|
||||
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
|
||||
|
|
@ -332,7 +333,7 @@
|
|||
#define CFG_FLASH_CFI_DRIVER 1
|
||||
|
||||
#define CFG_MONITOR_BASE 0
|
||||
#define CFG_MONITOR_LEN 0x40000
|
||||
#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE
|
||||
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
|
||||
|
|
@ -347,7 +348,7 @@
|
|||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
/* Addr of Environment Sector */
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SIZE - 0x40000)
|
||||
#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE 0x40000
|
||||
#define CFG_ENV_SIZE PHYS_FLASH_SECT_SIZE /* Total Size of Environment Sector */
|
||||
#define CFG_ENV_SECT_SIZE (PHYS_FLASH_SECT_SIZE / 16)
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@
|
|||
#define CONFIG_PXA250 1 /* This is an PXA250 CPU */
|
||||
#define CONFIG_XSENGINE 1
|
||||
#define CONFIG_MMC 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define BOARD_POST_INIT 1
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
|
||||
|
|
|
|||
|
|
@ -38,9 +38,9 @@ typedef struct block_dev_desc {
|
|||
#endif
|
||||
lbaint_t lba; /* number of blocks */
|
||||
unsigned long blksz; /* block size */
|
||||
unsigned char vendor [40+1]; /* IDE model, SCSI Vendor */
|
||||
unsigned char product[20+1]; /* IDE Serial no, SCSI product */
|
||||
unsigned char revision[8+1]; /* firmware revision */
|
||||
char vendor [40+1]; /* IDE model, SCSI Vendor */
|
||||
char product[20+1]; /* IDE Serial no, SCSI product */
|
||||
char revision[8+1]; /* firmware revision */
|
||||
unsigned long (*block_read)(int dev,
|
||||
unsigned long start,
|
||||
lbaint_t blkcnt,
|
||||
|
|
|
|||
Loading…
Reference in New Issue