* Rename SBC8560 into sbc8560 for consistency
* Patch by Daniel Poirot, 24 Jun 2004: Add support for Wind River's sbc8240 board * Patches by Yasushi Shoji, 26 Jun 2004: - drivers/serial_xuartlite.c: fix "return 0" in void function - add microblaze support to mkimage tool
This commit is contained in:
wdenk
parent
8b07a1103d
commit
466b74108f
11
CHANGELOG
11
CHANGELOG
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@ -2,8 +2,17 @@
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Changes since U-Boot 1.1.1:
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======================================================================
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* Rename SBC8560 into sbc8560 for consistency
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* Patch by Daniel Poirot, 24 Jun 2004:
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Add support for Wind River's sbc8240 board
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* Patches by Yasushi Shoji, 26 Jun 2004:
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- drivers/serial_xuartlite.c: fix "return 0" in void function
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- add microblaze support to mkimage tool
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* Patch by Fred Klatt, 25 Jun 2004:
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Add support for WindRiver's SBC8560 board
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Add support for WindRiver's sbc8560 board
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* Patch by Nicolas Lacressonniere, 24 Jun 2004
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Small Bugs fixes for "at91rm9200dk" board:
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|
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5
CREDITS
5
CREDITS
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@ -311,6 +311,11 @@ N: Bill Pitts
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E: wlp@mindspring.com
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D: BedBug embedded debugger code
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N: Daniel Poirot
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E: dan.poirot@windriver.com
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D: Support for the sbc8240 board
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W: http://www.windriver.com
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N: Stefan Roese
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E: stefan.roese@esd-electronics.com
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D: IBM PPC401/403/405GP Support; Windows environment support
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|
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4
MAKEALL
4
MAKEALL
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@ -77,7 +77,7 @@ LIST_824x=" \
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A3000 BMW CPC45 CU824 \
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debris eXalion MOUSSE MUSENKI \
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MVBLUE OXC PN62 Sandpoint8240 \
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Sandpoint8245 SL8245 utx8245 \
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Sandpoint8245 SL8245 utx8245 sbc8240 \
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"
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#########################################################################
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@ -98,7 +98,7 @@ LIST_8260=" \
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#########################################################################
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LIST_85xx=" \
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MPC8540ADS MPC8560ADS SBC8560 stxgp3 \
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MPC8540ADS MPC8560ADS sbc8560 stxgp3 \
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"
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#########################################################################
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10
Makefile
10
Makefile
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@ -799,6 +799,9 @@ Sandpoint8240_config: unconfig
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Sandpoint8245_config: unconfig
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@./mkconfig $(@:_config=) ppc mpc824x sandpoint
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sbc8240_config: unconfig
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@./mkconfig $(@:_config=) ppc mpc824x sbc8240
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SL8245_config: unconfig
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@./mkconfig $(@:_config=) ppc mpc824x sl8245
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@ -1010,8 +1013,9 @@ MPC8560ADS_config: unconfig
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stxgp3_config: unconfig
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@./mkconfig $(@:_config=) ppc mpc85xx stxgp3
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SBC8560_33_config \
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SBC8560_66_config: unconfig
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sbc8560_config \
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sbc8560_33_config \
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sbc8560_66_config: unconfig
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@if [ "$(findstring _66_,$@)" ] ; then \
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echo "#define CONFIG_PCI_66" >>include/config.h ; \
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echo "... 66 MHz PCI" ; \
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@ -1019,7 +1023,7 @@ SBC8560_66_config: unconfig
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>include/config.h ; \
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echo "... 33 MHz PCI" ; \
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fi
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@./mkconfig -a SBC8560 ppc mpc85xx sbc8560
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@./mkconfig -a sbc8560 ppc mpc85xx sbc8560
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#########################################################################
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## 74xx/7xx Systems
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|
|
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4
README
4
README
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@ -2091,8 +2091,8 @@ configurations; the following names are supported:
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CPCI405_config JSE_config rsdproto_config
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CPCIISER4_config LANTEC_config Sandpoint8240_config
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csb272_config lwmon_config sbc8260_config
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CU824_config MBX860T_config SBC8560_33_config
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DUET_ADS_config MBX_config SBC8560_66_config
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CU824_config MBX860T_config sbc8560_33_config
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DUET_ADS_config MBX_config sbc8560_66_config
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EBONY_config MPC8260ADS_config SM850_config
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ELPT860_config MPC8540ADS_config SPD823TS_config
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ESTEEM192E_config MPC8560ADS_config stxgp3_config
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@ -0,0 +1,40 @@
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#
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# (C) Copyright 2001
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
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||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
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||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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$(LIB): .depend $(OBJS)
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$(AR) crv $@ $(OBJS)
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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sinclude .depend
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#########################################################################
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@ -0,0 +1,140 @@
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The supported features of the SBC8240/8245 board are:
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8240 or 8245 processor
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66MHz & 100MHz bus speed
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Decrementer timer
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1 UART channel (Console channel)
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8240 Interrupt Controller
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8240 PCI bridge
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8240 Memory Controller
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SDRAM (16, 64 MB Memory DIMM)
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FLASH 512K On board
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FLASH 4MB On board
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Memory Map from CPU point of view:
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Start Size Access to
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-----------------------------------------------------
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0x00000000 64MB SDRAM DIMM
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0xFF000000 4MB On Board FLASH
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0xFFF00000 512K On Board FLASH or SRAM (Configured by jumper)
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0xFFE00000 8K EEPROM
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0xFFE80000 8Bit LED
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0xFFF80000 8Bit UART
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Setting the board Jumpers & Switches:
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In order to get the board running with the default configuration the
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jumpers need to be set as follows:
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General Jumpers:
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____________________________________________
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| Jumpers | Jumpers | Jumpers |
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|-------------|--------------|---------------|
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|JP1 1-2 | JP14 1-2 | JP27 1-2 |
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|JP5 Open | JP15 1-2 | JP28 2-3 |
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|JP8 1-2 | JP16 1-2 | JP33 Open |
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|JP9 1-2 | JP17 1-2 | JP37 Close |
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|JP10 1-2 | JP18 1-2 | |
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|JP11 2-3 | JP19 1-2 | |
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|JP12 1-2 | JP20 1-2 | |
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|JP13 1-2 | JP25 Open | |
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|_____________|______________|_______________|
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Bus speed Jumpers:
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_________________________
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| 100MHz Bus | 66 MHz Bus |
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|------------|------------|
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| JP2 1-2 | JP2 1-2 |
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| JP3 1-2 | JP3 2-3 |
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| JP4 1-2 | JP4 2-3 |
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| JP6 1-2 | JP6 2-3 |
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| JP7 1-2 | JP7 1-2 |
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|____________|____________|
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U-Boot 1.1.2 (Jun 24 2004 - 17:01:04)
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CPU: MPC8240 Revision 1.1 at 247.500 MHz: 16 kB I-Cache 16 kB D-Cache
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Board: sbc8240 Revision 255 Local Bus at 99 MHz
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DRAM: 64 MB
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FLASH: 512 kB
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00 11 8086 1229 0200 00
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In: serial
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Out: serial
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Err: serial
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Net: i82559#0
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Welcome to U-Boot for the sbc8240
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Type ? or help to get on-line help
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Hit any key to stop autoboot: 0
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=> printenv
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bootcmd=version;echo;tftpboot $loadaddr $loadfile;bootvx
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bootdelay=5
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baudrate=9600
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ethaddr=DE:AD:BE:EF:01:01
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ipaddr=192.168.193.102
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preboot=echo;echo Welcome to U-Boot for the sbc8240;echo;echo Type "? or help" to get on-line help;echo
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netmask=255.255.255.248
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clocks_in_mhz=1
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bootargs=$fei(0,0)host:/T221ppc/target/config/sbc8240/vxWorks.st e=192.168.193.102 h=192.168.193.99 u=target pw=hello f=0x08 tn=sbc8240 o=fei
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ipaddr=192.168.193.102
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loadfile=vxWorks.st
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loadaddr=0x01000000
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net_load=tftpboot $loadaddr $loadfile
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serverip=192.168.193.99
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ethact=i82559#0
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stdin=serial
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stdout=serial
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stderr=serial
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Environment size: 631/16380 bytes
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=> boot
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U-Boot 1.1.2 (Jun 24 2004 - 17:01:04)
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Using i82559#0 device
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TFTP from server 192.168.193.99; our IP address is 192.168.193.102
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Filename 'vxWorks.st'.
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Load address: 0x1000000
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Loading: #################################################################
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#################################################################
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##############################################################
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done
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Bytes transferred = 979927 (ef3d7 hex)
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||||
## Ethernet MAC address not copied to NV RAM
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||||
Loading .text @ 0x00100000 (758848 bytes)
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||||
Loading .data @ 0x001b9440 (79904 bytes)
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||||
Clearing .bss @ 0x001ccc60 (20288 bytes)
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## Using bootline (@ 0x4200): $fei(0,0)host:/T221ppc/target/config/sbc8240/vxWorks.st e=192.168.193.102 h=192.168.193.99 u=target pw=hello f=0x08 tn=sbc8240 o=fei
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## Starting vxWorks at 0x00100000 ...
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||||
|
||||
Adding 2845 symbols for standalone.
|
||||
|
||||
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
|
||||
]]]]]]]]]]] ]]]] ]]]]]]]]]] ]] ]]]] (R)
|
||||
] ]]]]]]]]] ]]]]]] ]]]]]]]] ]] ]]]]
|
||||
]] ]]]]]]] ]]]]]]]] ]]]]]] ] ]] ]]]]
|
||||
]]] ]]]]] ] ]]] ] ]]]] ]]] ]]]]]]]]] ]]]] ]] ]]]] ]] ]]]]]
|
||||
]]]] ]]] ]] ] ]]] ]] ]]]]] ]]]]]] ]] ]]]]]]] ]]]] ]] ]]]]
|
||||
]]]]] ] ]]]] ]]]]] ]]]]]]]] ]]]] ]] ]]]] ]]]]]]] ]]]]
|
||||
]]]]]] ]]]]] ]]]]]] ] ]]]]] ]]]] ]] ]]]] ]]]]]]]] ]]]]
|
||||
]]]]]]] ]]]]] ] ]]]]]] ] ]]] ]]]] ]] ]]]] ]]]] ]]]] ]]]]
|
||||
]]]]]]]] ]]]]] ]]] ]]]]]]] ] ]]]]]]] ]]]] ]]]] ]]]] ]]]]]
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]]]]]]
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]]]]] Development System
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]]]]
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]]] VxWorks version 5.5.1
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]]] KERNEL: WIND version 2.6
|
||||
]]]]]]]]]]]]]]]]]]]]]]]]] Copyright Wind River Systems, Inc., 1984-2003
|
||||
|
||||
CPU: MPC8240 -- Wind River BSP. SBC8240 Board. Processor #0.
|
||||
Memory Size: 0x2000000. BSP version 1.2/28.
|
||||
|
||||
->
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
#
|
||||
# (C) Copyright 2001
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
#
|
||||
# sbc8240 board
|
||||
#
|
||||
|
||||
TEXT_BASE = 0xFFF00000
|
||||
|
||||
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
|
||||
|
|
@ -0,0 +1,638 @@
|
|||
/*
|
||||
* (C) Copyright 2000-2004
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* Modified 4/5/2001
|
||||
* Wait for completion of each sector erase command issued
|
||||
* 4/5/2001
|
||||
* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <mpc824x.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
#if CFG_MAX_FLASH_BANKS != 1
|
||||
#error "CFG_MAX_FLASH_BANKS must be 1"
|
||||
#endif
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Functions
|
||||
*/
|
||||
static ulong flash_get_size (vu_long * addr, flash_info_t * info);
|
||||
static int write_word (flash_info_t * info, ulong dest, ulong data);
|
||||
static void flash_get_offsets (ulong base, flash_info_t * info);
|
||||
|
||||
#define ADDR0 0x5555
|
||||
#define ADDR1 0x2aaa
|
||||
#define FLASH_WORD_SIZE unsigned char
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
unsigned long flash_init (void)
|
||||
{
|
||||
unsigned long size_b0;
|
||||
|
||||
/* Init: no FLASHes known */
|
||||
flash_info[0].flash_id = FLASH_UNKNOWN;
|
||||
|
||||
/* Static FLASH Bank configuration here - FIXME XXX */
|
||||
|
||||
size_b0 = flash_get_size ((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
|
||||
|
||||
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
|
||||
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
|
||||
size_b0, size_b0 << 20);
|
||||
}
|
||||
|
||||
/* Only one bank */
|
||||
/* Setup offsets */
|
||||
flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
|
||||
|
||||
/* Monitor protection ON by default */
|
||||
(void) flash_protect (FLAG_PROTECT_SET,
|
||||
FLASH_BASE0_PRELIM,
|
||||
FLASH_BASE0_PRELIM + monitor_flash_len - 1,
|
||||
&flash_info[0]);
|
||||
flash_info[0].size = size_b0;
|
||||
|
||||
return size_b0;
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
static void flash_get_offsets (ulong base, flash_info_t * info)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* set up sector start address table */
|
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
|
||||
(info->flash_id == FLASH_AM040)) {
|
||||
for (i = 0; i < info->sector_count; i++)
|
||||
info->start[i] = base + (i * 0x00010000);
|
||||
} else {
|
||||
if (info->flash_id & FLASH_BTYPE) {
|
||||
/* set sector offsets for bottom boot block type */
|
||||
info->start[0] = base + 0x00000000;
|
||||
info->start[1] = base + 0x00004000;
|
||||
info->start[2] = base + 0x00006000;
|
||||
info->start[3] = base + 0x00008000;
|
||||
for (i = 4; i < info->sector_count; i++) {
|
||||
info->start[i] =
|
||||
base + (i * 0x00010000) - 0x00030000;
|
||||
}
|
||||
} else {
|
||||
/* set sector offsets for top boot block type */
|
||||
i = info->sector_count - 1;
|
||||
info->start[i--] = base + info->size - 0x00004000;
|
||||
info->start[i--] = base + info->size - 0x00006000;
|
||||
info->start[i--] = base + info->size - 0x00008000;
|
||||
for (; i >= 0; i--) {
|
||||
info->start[i] = base + i * 0x00010000;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
void flash_print_info (flash_info_t * info)
|
||||
{
|
||||
int i;
|
||||
int k;
|
||||
int size;
|
||||
int erased;
|
||||
volatile unsigned long *flash;
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("missing or unknown FLASH type\n");
|
||||
return;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) {
|
||||
case FLASH_MAN_AMD:
|
||||
printf ("AMD ");
|
||||
break;
|
||||
case FLASH_MAN_FUJ:
|
||||
printf ("FUJITSU ");
|
||||
break;
|
||||
case FLASH_MAN_SST:
|
||||
printf ("SST ");
|
||||
break;
|
||||
default:
|
||||
printf ("Unknown Vendor ");
|
||||
break;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) {
|
||||
case FLASH_AM040:
|
||||
printf ("AM29F040 (512 Kbit, uniform sector size)\n");
|
||||
break;
|
||||
case FLASH_AM400B:
|
||||
printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
|
||||
break;
|
||||
case FLASH_AM400T:
|
||||
printf ("AM29LV400T (4 Mbit, top boot sector)\n");
|
||||
break;
|
||||
case FLASH_AM800B:
|
||||
printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
|
||||
break;
|
||||
case FLASH_AM800T:
|
||||
printf ("AM29LV800T (8 Mbit, top boot sector)\n");
|
||||
break;
|
||||
case FLASH_AM160B:
|
||||
printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
|
||||
break;
|
||||
case FLASH_AM160T:
|
||||
printf ("AM29LV160T (16 Mbit, top boot sector)\n");
|
||||
break;
|
||||
case FLASH_AM320B:
|
||||
printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
|
||||
break;
|
||||
case FLASH_AM320T:
|
||||
printf ("AM29LV320T (32 Mbit, top boot sector)\n");
|
||||
break;
|
||||
case FLASH_SST800A:
|
||||
printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
|
||||
break;
|
||||
case FLASH_SST160A:
|
||||
printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
|
||||
break;
|
||||
default:
|
||||
printf ("Unknown Chip Type\n");
|
||||
break;
|
||||
}
|
||||
|
||||
printf (" Size: %ld KB in %d Sectors\n",
|
||||
info->size >> 10, info->sector_count);
|
||||
|
||||
printf (" Sector Start Addresses:");
|
||||
for (i = 0; i < info->sector_count; ++i) {
|
||||
/*
|
||||
* Check if whole sector is erased
|
||||
*/
|
||||
if (i != (info->sector_count - 1))
|
||||
size = info->start[i + 1] - info->start[i];
|
||||
else
|
||||
size = info->start[0] + info->size - info->start[i];
|
||||
erased = 1;
|
||||
flash = (volatile unsigned long *) info->start[i];
|
||||
size = size >> 2; /* divide by 4 for longword access */
|
||||
for (k = 0; k < size; k++) {
|
||||
if (*flash++ != 0xffffffff) {
|
||||
erased = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if ((i % 5) == 0)
|
||||
printf ("\n ");
|
||||
printf (" %08lX%s%s",
|
||||
info->start[i],
|
||||
erased ? " E" : " ", info->protect[i] ? "RO " : " "
|
||||
);
|
||||
}
|
||||
printf ("\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
* The following code cannot be run from FLASH!
|
||||
*/
|
||||
static ulong flash_get_size (vu_long * addr, flash_info_t * info)
|
||||
{
|
||||
short i;
|
||||
FLASH_WORD_SIZE value;
|
||||
ulong base = (ulong) addr;
|
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
|
||||
|
||||
/* Write auto select command: read Manufacturer ID */
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00900090;
|
||||
|
||||
value = addr2[0];
|
||||
|
||||
switch (value) {
|
||||
case (FLASH_WORD_SIZE) AMD_MANUFACT:
|
||||
info->flash_id = FLASH_MAN_AMD;
|
||||
break;
|
||||
case (FLASH_WORD_SIZE) FUJ_MANUFACT:
|
||||
info->flash_id = FLASH_MAN_FUJ;
|
||||
break;
|
||||
case (FLASH_WORD_SIZE) SST_MANUFACT:
|
||||
info->flash_id = FLASH_MAN_SST;
|
||||
break;
|
||||
default:
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
info->sector_count = 0;
|
||||
info->size = 0;
|
||||
return (0); /* no or unknown flash */
|
||||
}
|
||||
|
||||
value = addr2[1]; /* device ID */
|
||||
|
||||
switch (value) {
|
||||
case (FLASH_WORD_SIZE) AMD_ID_F040B:
|
||||
info->flash_id += FLASH_AM040;
|
||||
info->sector_count = 8;
|
||||
info->size = 0x0080000; /* => 512 ko */
|
||||
break;
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV040B:
|
||||
info->flash_id += FLASH_AM040;
|
||||
info->sector_count = 8;
|
||||
info->size = 0x0080000; /* => 512 ko */
|
||||
break;
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV400T:
|
||||
info->flash_id += FLASH_AM400T;
|
||||
info->sector_count = 11;
|
||||
info->size = 0x00080000;
|
||||
break; /* => 0.5 MB */
|
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV400B:
|
||||
info->flash_id += FLASH_AM400B;
|
||||
info->sector_count = 11;
|
||||
info->size = 0x00080000;
|
||||
break; /* => 0.5 MB */
|
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV800T:
|
||||
info->flash_id += FLASH_AM800T;
|
||||
info->sector_count = 19;
|
||||
info->size = 0x00100000;
|
||||
break; /* => 1 MB */
|
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV800B:
|
||||
info->flash_id += FLASH_AM800B;
|
||||
info->sector_count = 19;
|
||||
info->size = 0x00100000;
|
||||
break; /* => 1 MB */
|
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV160T:
|
||||
info->flash_id += FLASH_AM160T;
|
||||
info->sector_count = 35;
|
||||
info->size = 0x00200000;
|
||||
break; /* => 2 MB */
|
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV160B:
|
||||
info->flash_id += FLASH_AM160B;
|
||||
info->sector_count = 35;
|
||||
info->size = 0x00200000;
|
||||
break; /* => 2 MB */
|
||||
#if 0 /* enable when device IDs are available */
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV320T:
|
||||
info->flash_id += FLASH_AM320T;
|
||||
info->sector_count = 67;
|
||||
info->size = 0x00400000;
|
||||
break; /* => 4 MB */
|
||||
|
||||
case (FLASH_WORD_SIZE) AMD_ID_LV320B:
|
||||
info->flash_id += FLASH_AM320B;
|
||||
info->sector_count = 67;
|
||||
info->size = 0x00400000;
|
||||
break; /* => 4 MB */
|
||||
#endif
|
||||
case (FLASH_WORD_SIZE) SST_ID_xF800A:
|
||||
info->flash_id += FLASH_SST800A;
|
||||
info->sector_count = 16;
|
||||
info->size = 0x00100000;
|
||||
break; /* => 1 MB */
|
||||
|
||||
case (FLASH_WORD_SIZE) SST_ID_xF160A:
|
||||
info->flash_id += FLASH_SST160A;
|
||||
info->sector_count = 32;
|
||||
info->size = 0x00200000;
|
||||
break; /* => 2 MB */
|
||||
|
||||
default:
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
return (0); /* => no or unknown flash */
|
||||
|
||||
}
|
||||
|
||||
/* set up sector start address table */
|
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
|
||||
(info->flash_id == FLASH_AM040)) {
|
||||
for (i = 0; i < info->sector_count; i++)
|
||||
info->start[i] = base + (i * 0x00010000);
|
||||
} else {
|
||||
if (info->flash_id & FLASH_BTYPE) {
|
||||
/* set sector offsets for bottom boot block type */
|
||||
info->start[0] = base + 0x00000000;
|
||||
info->start[1] = base + 0x00004000;
|
||||
info->start[2] = base + 0x00006000;
|
||||
info->start[3] = base + 0x00008000;
|
||||
for (i = 4; i < info->sector_count; i++) {
|
||||
info->start[i] =
|
||||
base + (i * 0x00010000) - 0x00030000;
|
||||
}
|
||||
} else {
|
||||
/* set sector offsets for top boot block type */
|
||||
i = info->sector_count - 1;
|
||||
info->start[i--] = base + info->size - 0x00004000;
|
||||
info->start[i--] = base + info->size - 0x00006000;
|
||||
info->start[i--] = base + info->size - 0x00008000;
|
||||
for (; i >= 0; i--) {
|
||||
info->start[i] = base + i * 0x00010000;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* check for protected sectors */
|
||||
for (i = 0; i < info->sector_count; i++) {
|
||||
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
|
||||
/* D0 = 1 if protected */
|
||||
addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
|
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
|
||||
info->protect[i] = 0;
|
||||
else
|
||||
info->protect[i] = addr2[2] & 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* Prevent writes to uninitialized FLASH.
|
||||
*/
|
||||
if (info->flash_id != FLASH_UNKNOWN) {
|
||||
addr2 = (FLASH_WORD_SIZE *) info->start[0];
|
||||
*addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
|
||||
}
|
||||
|
||||
return (info->size);
|
||||
}
|
||||
|
||||
int wait_for_DQ7 (flash_info_t * info, int sect)
|
||||
{
|
||||
ulong start, now, last;
|
||||
volatile FLASH_WORD_SIZE *addr =
|
||||
(FLASH_WORD_SIZE *) (info->start[sect]);
|
||||
|
||||
start = get_timer (0);
|
||||
last = start;
|
||||
while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
|
||||
(FLASH_WORD_SIZE) 0x00800080) {
|
||||
if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
|
||||
printf ("Timeout\n");
|
||||
return -1;
|
||||
}
|
||||
/* show that we're waiting */
|
||||
if ((now - last) > 1000) { /* every second */
|
||||
putc ('.');
|
||||
last = now;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
int flash_erase (flash_info_t * info, int s_first, int s_last)
|
||||
{
|
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
|
||||
volatile FLASH_WORD_SIZE *addr2;
|
||||
int flag, prot, sect, l_sect;
|
||||
int i;
|
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) {
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("- missing\n");
|
||||
} else {
|
||||
printf ("- no sectors to erase\n");
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
printf ("Can't erase unknown flash type - aborted\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
prot = 0;
|
||||
for (sect = s_first; sect <= s_last; ++sect) {
|
||||
if (info->protect[sect]) {
|
||||
prot++;
|
||||
}
|
||||
}
|
||||
|
||||
if (prot) {
|
||||
printf ("- Warning: %d protected sectors will not be erased!\n", prot);
|
||||
} else {
|
||||
printf ("\n");
|
||||
}
|
||||
|
||||
l_sect = -1;
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts ();
|
||||
|
||||
/* Start erase on unprotected sectors */
|
||||
for (sect = s_first; sect <= s_last; sect++) {
|
||||
if (info->protect[sect] == 0) { /* not protected */
|
||||
addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
|
||||
printf ("Erasing sector %p\n", addr2); /* CLH */
|
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) ==
|
||||
FLASH_MAN_SST) {
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr2[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
|
||||
for (i = 0; i < 50; i++)
|
||||
udelay (1000); /* wait 1 ms */
|
||||
} else {
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
|
||||
}
|
||||
l_sect = sect;
|
||||
/*
|
||||
* Wait for each sector to complete, it's more
|
||||
* reliable. According to AMD Spec, you must
|
||||
* issue all erase commands within a specified
|
||||
* timeout. This has been seen to fail, especially
|
||||
* if printf()s are included (for debug)!!
|
||||
*/
|
||||
wait_for_DQ7 (info, sect);
|
||||
}
|
||||
}
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts ();
|
||||
|
||||
/* wait at least 80us - let's wait 1 ms */
|
||||
udelay (1000);
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* We wait for the last triggered sector
|
||||
*/
|
||||
if (l_sect < 0)
|
||||
goto DONE;
|
||||
wait_for_DQ7 (info, l_sect);
|
||||
|
||||
DONE:
|
||||
#endif
|
||||
/* reset to read mode */
|
||||
addr = (FLASH_WORD_SIZE *) info->start[0];
|
||||
addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
|
||||
|
||||
printf (" done\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp, data;
|
||||
int i, l, rc;
|
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
if ((l = addr - wp) != 0) {
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < l; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
for (; i < 4 && cnt > 0; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
for (; cnt == 0 && i < 4; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
wp += 4;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
while (cnt >= 4) {
|
||||
data = 0;
|
||||
for (i = 0; i < 4; ++i) {
|
||||
data = (data << 8) | *src++;
|
||||
}
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
wp += 4;
|
||||
cnt -= 4;
|
||||
}
|
||||
|
||||
if (cnt == 0) {
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
|
||||
data = (data << 8) | *src++;
|
||||
--cnt;
|
||||
}
|
||||
for (; i < 4; ++i, ++cp) {
|
||||
data = (data << 8) | (*(uchar *) cp);
|
||||
}
|
||||
|
||||
return (write_word (info, wp, data));
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns:
|
||||
* 0 - OK
|
||||
* 1 - write timeout
|
||||
* 2 - Flash not erased
|
||||
*/
|
||||
static int write_word (flash_info_t * info, ulong dest, ulong data)
|
||||
{
|
||||
volatile FLASH_WORD_SIZE *addr2 =
|
||||
(FLASH_WORD_SIZE *) (info->start[0]);
|
||||
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
|
||||
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
|
||||
ulong start;
|
||||
int i;
|
||||
|
||||
/* Check if Flash is (sufficiently) erased */
|
||||
if ((*((volatile FLASH_WORD_SIZE *) dest) &
|
||||
(FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
|
||||
return (2);
|
||||
}
|
||||
|
||||
for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
|
||||
int flag;
|
||||
|
||||
/* Disable interrupts which might cause a timeout here */
|
||||
flag = disable_interrupts ();
|
||||
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
|
||||
addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
|
||||
|
||||
dest2[i] = data2[i];
|
||||
|
||||
/* re-enable interrupts if necessary */
|
||||
if (flag)
|
||||
enable_interrupts ();
|
||||
|
||||
/* data polling for D7 */
|
||||
start = get_timer (0);
|
||||
while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
|
||||
(data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
|
||||
|
||||
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
|
||||
return (1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
@ -0,0 +1,105 @@
|
|||
/*
|
||||
* (C) Copyright 2001
|
||||
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
|
||||
*
|
||||
* (C) Copyright 2001, 2002
|
||||
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
|
||||
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <mpc824x.h>
|
||||
#include <asm/processor.h>
|
||||
#include <pci.h>
|
||||
|
||||
#define BOARD_REV_REG 0xFE80002B
|
||||
|
||||
int checkboard (void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
char revision = *(volatile char *)(BOARD_REV_REG);
|
||||
char buf[32];
|
||||
|
||||
puts ("Board: sbc8240 ");
|
||||
printf("Revision %d ", revision);
|
||||
printf("Local Bus at %s MHz\n", strmhz(buf, gd->bus_clk));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
long int initdram(int board_type)
|
||||
{
|
||||
long size;
|
||||
long new_bank0_end;
|
||||
long mear1;
|
||||
long emear1;
|
||||
|
||||
size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
|
||||
|
||||
new_bank0_end = size - 1;
|
||||
mear1 = mpc824x_mpc107_getreg(MEAR1);
|
||||
emear1 = mpc824x_mpc107_getreg(EMEAR1);
|
||||
mear1 = (mear1 & 0xFFFFFF00) |
|
||||
((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
|
||||
emear1 = (emear1 & 0xFFFFFF00) |
|
||||
((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
|
||||
mpc824x_mpc107_setreg(MEAR1, mear1);
|
||||
mpc824x_mpc107_setreg(EMEAR1, emear1);
|
||||
|
||||
return (size);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize PCI Devices, report devices found.
|
||||
*/
|
||||
#ifndef CONFIG_PCI_PNP
|
||||
static struct pci_config_table pci_sandpoint_config_table[] = {
|
||||
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
|
||||
pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
|
||||
PCI_ENET0_MEMADDR,
|
||||
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
|
||||
|
||||
{ }
|
||||
};
|
||||
#endif
|
||||
|
||||
struct pci_controller hose = {
|
||||
#ifndef CONFIG_PCI_PNP
|
||||
config_table: pci_sandpoint_config_table,
|
||||
#endif
|
||||
};
|
||||
|
||||
void pci_init_board(void)
|
||||
{
|
||||
pci_mpc824x_init(&hose);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MISC_INIT_R
|
||||
/* ------------------------------------------------------------------------- */
|
||||
int misc_init_r (void)
|
||||
{
|
||||
#ifdef CFG_LED_BASE
|
||||
*((unsigned char *) (CFG_LED_BASE)) = 0xFF;
|
||||
#endif /* CFG_LED_BASE */
|
||||
|
||||
return (0);
|
||||
}
|
||||
#endif /* CONFIG_MISC_INIT_R */
|
||||
|
|
@ -0,0 +1,133 @@
|
|||
/*
|
||||
* (C) Copyright 2001
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_ARCH(powerpc)
|
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
|
||||
/* Do we need any of these for elf?
|
||||
__DYNAMIC = 0; */
|
||||
SECTIONS
|
||||
{
|
||||
/* Read-only sections, merged into text segment: */
|
||||
. = + SIZEOF_HEADERS;
|
||||
.interp : { *(.interp) }
|
||||
.hash : { *(.hash) }
|
||||
.dynsym : { *(.dynsym) }
|
||||
.dynstr : { *(.dynstr) }
|
||||
.rel.text : { *(.rel.text) }
|
||||
.rela.text : { *(.rela.text) }
|
||||
.rel.data : { *(.rel.data) }
|
||||
.rela.data : { *(.rela.data) }
|
||||
.rel.rodata : { *(.rel.rodata) }
|
||||
.rela.rodata : { *(.rela.rodata) }
|
||||
.rel.got : { *(.rel.got) }
|
||||
.rela.got : { *(.rela.got) }
|
||||
.rel.ctors : { *(.rel.ctors) }
|
||||
.rela.ctors : { *(.rela.ctors) }
|
||||
.rel.dtors : { *(.rel.dtors) }
|
||||
.rela.dtors : { *(.rela.dtors) }
|
||||
.rel.bss : { *(.rel.bss) }
|
||||
.rela.bss : { *(.rela.bss) }
|
||||
.rel.plt : { *(.rel.plt) }
|
||||
.rela.plt : { *(.rela.plt) }
|
||||
.init : { *(.init) }
|
||||
.plt : { *(.plt) }
|
||||
.text :
|
||||
{
|
||||
cpu/mpc824x/start.o (.text)
|
||||
lib_ppc/board.o (.text)
|
||||
lib_ppc/ppcstring.o (.text)
|
||||
lib_generic/vsprintf.o (.text)
|
||||
lib_generic/crc32.o (.text)
|
||||
lib_generic/zlib.o (.text)
|
||||
|
||||
. = DEFINED(env_offset) ? env_offset : .;
|
||||
common/environment.o (.text)
|
||||
|
||||
*(.text)
|
||||
|
||||
*(.fixup)
|
||||
*(.got1)
|
||||
. = ALIGN(16);
|
||||
*(.rodata)
|
||||
*(.rodata1)
|
||||
*(.rodata.str1.4)
|
||||
}
|
||||
.fini : { *(.fini) } =0
|
||||
.ctors : { *(.ctors) }
|
||||
.dtors : { *(.dtors) }
|
||||
|
||||
/* Read-write section, merged into data segment: */
|
||||
. = (. + 0x0FFF) & 0xFFFFF000;
|
||||
_erotext = .;
|
||||
PROVIDE (erotext = .);
|
||||
.reloc :
|
||||
{
|
||||
*(.got)
|
||||
_GOT2_TABLE_ = .;
|
||||
*(.got2)
|
||||
_FIXUP_TABLE_ = .;
|
||||
*(.fixup)
|
||||
}
|
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
|
||||
__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata2)
|
||||
*(.dynamic)
|
||||
CONSTRUCTORS
|
||||
}
|
||||
_edata = .;
|
||||
PROVIDE (edata = .);
|
||||
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
|
||||
__start___ex_table = .;
|
||||
__ex_table : { *(__ex_table) }
|
||||
__stop___ex_table = .;
|
||||
|
||||
. = ALIGN(4096);
|
||||
__init_begin = .;
|
||||
.text.init : { *(.text.init) }
|
||||
.data.init : { *(.data.init) }
|
||||
. = ALIGN(4096);
|
||||
__init_end = .;
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.sbss) *(.scommon)
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(COMMON)
|
||||
}
|
||||
|
||||
_end = . ;
|
||||
PROVIDE (end = .);
|
||||
}
|
||||
|
|
@ -53,7 +53,6 @@ void serial_putc(const char c)
|
|||
if (c == '\n') serial_putc('\r');
|
||||
while (IO_SERIAL_STATUS & XUL_SR_TX_FIFO_FULL);
|
||||
IO_SERIAL_TX_FIFO = (unsigned char) (c & 0xff);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void serial_puts(const char * s)
|
||||
|
|
|
|||
|
|
@ -1,398 +0,0 @@
|
|||
/*
|
||||
* (C) Copyright 2002,2003 Motorola,Inc.
|
||||
* Xianghua Xiao <X.Xiao@motorola.com>
|
||||
*
|
||||
* (C) Copyright 2004 Wind River Systems Inc <www.windriver.com>.
|
||||
* Added support for Wind River SBC8560 board
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* mpc8560ads board configuration file */
|
||||
/* please refer to doc/README.mpc85xx for more info */
|
||||
/* make sure you change the MAC address and other network params first,
|
||||
* search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/* High Level Configuration Options */
|
||||
#define CONFIG_BOOKE 1 /* BOOKE */
|
||||
#define CONFIG_E500 1 /* BOOKE e500 family */
|
||||
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
|
||||
#define CONFIG_MPC85xx_REV1 1 /* MPC85xx Rev 1.0 chip */
|
||||
|
||||
|
||||
#define CONFIG_MPC8560 1 /* MPC8560 specific */
|
||||
#define CONFIG_SBC8560 1 /* configuration for SBC8560 board */
|
||||
|
||||
/* XXX flagging this as something I might want to delete */
|
||||
#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */
|
||||
|
||||
#define CONFIG_TSEC_ENET /* tsec ethernet support */
|
||||
#undef CONFIG_PCI /* pci ethernet support */
|
||||
#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
|
||||
|
||||
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
/* Using Localbus SDRAM to emulate flash before we can program the flash,
|
||||
* normally you need a flash-boot image(u-boot.bin), if so undef this.
|
||||
*/
|
||||
#undef CONFIG_RAM_AS_FLASH
|
||||
|
||||
#if defined(CONFIG_PCI_66) /* some PCI card is 33Mhz only */
|
||||
#define CONFIG_SYS_CLK_FREQ 66000000/* sysclk for MPC85xx */
|
||||
#else
|
||||
#define CONFIG_SYS_CLK_FREQ 33000000/* most pci cards are 33Mhz */
|
||||
#endif
|
||||
|
||||
/* below can be toggled for performance analysis. otherwise use default */
|
||||
#define CONFIG_L2_CACHE /* toggle L2 cache */
|
||||
#undef CONFIG_BTB /* toggle branch predition */
|
||||
#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */
|
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
|
||||
|
||||
#undef CFG_DRAM_TEST /* memory test, takes time */
|
||||
#define CFG_MEMTEST_START 0x00200000 /* memtest region */
|
||||
#define CFG_MEMTEST_END 0x00400000
|
||||
|
||||
#if (defined(CONFIG_PCI) && defined(CONFIG_TSEC_ENET) || \
|
||||
defined(CONFIG_PCI) && defined(CONFIG_ETHER_ON_FCC) || \
|
||||
defined(CONFIG_TSEC_ENET) && defined(CONFIG_ETHER_ON_FCC))
|
||||
#error "You can only use ONE of PCI Ethernet Card or TSEC Ethernet or CPM FCC."
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Base addresses -- Note these are effective addresses where the
|
||||
* actual resources get mapped (not physical addresses)
|
||||
*/
|
||||
#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
|
||||
|
||||
#if XXX
|
||||
#define CFG_CCSRBAR 0xfdf00000 /* relocated CCSRBAR */
|
||||
#else
|
||||
#define CFG_CCSRBAR 0xff700000 /* default CCSRBAR */
|
||||
#endif
|
||||
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
|
||||
|
||||
#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
|
||||
#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
|
||||
#define CFG_SDRAM_SIZE 512 /* DDR is 512MB */
|
||||
#define SPD_EEPROM_ADDRESS 0x55 /* DDR DIMM */
|
||||
|
||||
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
|
||||
#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
|
||||
|
||||
#if defined(CONFIG_MPC85xx_REV1)
|
||||
#define CONFIG_DDR_DLL /* possible DLL fix needed */
|
||||
#endif
|
||||
|
||||
#undef CONFIG_CLOCKS_IN_MHZ
|
||||
|
||||
#if defined(CONFIG_RAM_AS_FLASH)
|
||||
#define CFG_LBC_SDRAM_BASE 0xfc000000 /* Localbus SDRAM */
|
||||
#define CFG_FLASH_BASE 0xf8000000 /* start of FLASH 8M */
|
||||
#define CFG_BR0_PRELIM 0xf8000801 /* port size 8bit */
|
||||
#define CFG_OR0_PRELIM 0xf8000ff7 /* 8MB Flash */
|
||||
#else /* Boot from real Flash */
|
||||
#define CFG_LBC_SDRAM_BASE 0xf8000000 /* Localbus SDRAM */
|
||||
#define CFG_FLASH_BASE 0xff800000 /* start of FLASH 8M */
|
||||
#define CFG_BR0_PRELIM 0xff800801 /* port size 8bit */
|
||||
#define CFG_OR0_PRELIM 0xff800ff7 /* 8MB Flash */
|
||||
#endif
|
||||
#define CFG_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
|
||||
|
||||
/* local bus definitions */
|
||||
#define CFG_BR1_PRELIM 0xe4001801 /* 64M, 32-bit flash */
|
||||
#define CFG_OR1_PRELIM 0xfc000ff7
|
||||
|
||||
#define CFG_BR2_PRELIM 0x00000000 /* CS2 not used */
|
||||
#define CFG_OR2_PRELIM 0x00000000
|
||||
|
||||
#define CFG_BR3_PRELIM 0xf0001861 /* 64MB localbus SDRAM */
|
||||
#define CFG_OR3_PRELIM 0xfc000cc1
|
||||
|
||||
#if defined(CONFIG_RAM_AS_FLASH)
|
||||
#define CFG_BR4_PRELIM 0xf4001861 /* 64M localbus SDRAM */
|
||||
#else
|
||||
#define CFG_BR4_PRELIM 0xf8001861 /* 64M localbus SDRAM */
|
||||
#endif
|
||||
#define CFG_OR4_PRELIM 0xfc000cc1
|
||||
|
||||
#define CFG_BR5_PRELIM 0xfc000801 /* 16M CS5 misc devices */
|
||||
#if 1
|
||||
#define CFG_OR5_PRELIM 0xff000ff7
|
||||
#else
|
||||
#define CFG_OR5_PRELIM 0xff0000f0
|
||||
#endif
|
||||
|
||||
#define CFG_BR6_PRELIM 0xe0001801 /* 64M, 32-bit flash */
|
||||
#define CFG_OR6_PRELIM 0xfc000ff7
|
||||
#define CFG_LBC_LCRR 0x00030002 /* local bus freq */
|
||||
#define CFG_LBC_LBCR 0x00000000
|
||||
#define CFG_LBC_LSRT 0x20000000
|
||||
#define CFG_LBC_MRTPR 0x20000000
|
||||
#define CFG_LBC_LSDMR_1 0x2861b723
|
||||
#define CFG_LBC_LSDMR_2 0x0861b723
|
||||
#define CFG_LBC_LSDMR_3 0x0861b723
|
||||
#define CFG_LBC_LSDMR_4 0x1861b723
|
||||
#define CFG_LBC_LSDMR_5 0x4061b723
|
||||
|
||||
/* just hijack the MOT BCSR def for SBC8560 misc devices */
|
||||
#define CFG_BCSR ((CFG_BR5_PRELIM & 0xff000000)|0x00400000)
|
||||
/* the size of CS5 needs to be >= 16M for TLB and LAW setups */
|
||||
|
||||
#define CONFIG_L1_INIT_RAM
|
||||
#define CFG_INIT_RAM_LOCK 1
|
||||
#define CFG_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */
|
||||
#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
|
||||
|
||||
#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
|
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
|
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
|
||||
|
||||
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
|
||||
#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
|
||||
|
||||
/* Serial Port */
|
||||
#undef CONFIG_CONS_ON_SCC /* define if console on SCC */
|
||||
#undef CONFIG_CONS_NONE /* define if console on something else */
|
||||
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#undef CONFIG_SERIAL_SOFTWARE_FIFO
|
||||
#define CFG_NS16550
|
||||
#define CFG_NS16550_SERIAL
|
||||
#define CFG_NS16550_REG_SIZE 1
|
||||
#define CFG_NS16550_CLK 1843200 /* get_bus_freq(0) */
|
||||
#define CONFIG_BAUDRATE 9600
|
||||
|
||||
#define CFG_BAUDRATE_TABLE \
|
||||
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
|
||||
|
||||
#define CFG_NS16550_COM1 ((CFG_BR5_PRELIM & 0xff000000)+0x00700000)
|
||||
#define CFG_NS16550_COM2 ((CFG_BR5_PRELIM & 0xff000000)+0x00800000)
|
||||
|
||||
/* Use the HUSH parser */
|
||||
#define CFG_HUSH_PARSER
|
||||
#ifdef CFG_HUSH_PARSER
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CFG_I2C_SLAVE 0x7F
|
||||
#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
|
||||
#define CFG_PCI_MEM_BASE 0xC0000000
|
||||
#define CFG_PCI_MEM_PHYS 0xC0000000
|
||||
#define CFG_PCI_MEM_SIZE 0x10000000
|
||||
|
||||
#if defined(CONFIG_TSEC_ENET) /* TSEC Ethernet port */
|
||||
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#define CONFIG_PHY_BCM5421S 1 /* GigaBit Ether PHY */
|
||||
#define CONFIG_MII 1 /* MII PHY management */
|
||||
#define CONFIG_PHY_ADDR 25 /* PHY address */
|
||||
|
||||
#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
|
||||
|
||||
#undef CONFIG_ETHER_NONE /* define if ether on something else */
|
||||
#define CONFIG_ETHER_ON_FCC2 /* cpm FCC ethernet support */
|
||||
#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
|
||||
|
||||
#if (CONFIG_ETHER_INDEX == 2)
|
||||
/*
|
||||
* - Rx-CLK is CLK13
|
||||
* - Tx-CLK is CLK14
|
||||
* - Select bus for bd/buffers
|
||||
* - Full duplex
|
||||
*/
|
||||
#define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
|
||||
#define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
|
||||
#define CFG_CPMFCR_RAMTYPE 0
|
||||
#define CFG_FCC_PSMR (FCC_PSMR_FDE)
|
||||
|
||||
#elif (CONFIG_ETHER_INDEX == 3)
|
||||
/* need more definitions here for FE3 */
|
||||
#endif /* CONFIG_ETHER_INDEX */
|
||||
|
||||
#define CONFIG_MII /* MII PHY management */
|
||||
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
|
||||
/*
|
||||
* GPIO pins used for bit-banged MII communications
|
||||
*/
|
||||
#define MDIO_PORT 2 /* Port C */
|
||||
#define MDIO_ACTIVE (iop->pdir |= 0x00400000)
|
||||
#define MDIO_TRISTATE (iop->pdir &= ~0x00400000)
|
||||
#define MDIO_READ ((iop->pdat & 0x00400000) != 0)
|
||||
|
||||
#define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \
|
||||
else iop->pdat &= ~0x00400000
|
||||
|
||||
#define MDC(bit) if(bit) iop->pdat |= 0x00200000; \
|
||||
else iop->pdat &= ~0x00200000
|
||||
|
||||
#define MIIDELAY udelay(1)
|
||||
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization
|
||||
*/
|
||||
|
||||
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
|
||||
#if 0
|
||||
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
|
||||
#define CFG_FLASH_PROTECTION /* use hardware protection */
|
||||
#endif
|
||||
#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
|
||||
#undef CFG_FLASH_CHECKSUM
|
||||
#define CFG_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */
|
||||
|
||||
#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
|
||||
|
||||
#if 0
|
||||
/* XXX This doesn't work and I don't want to fix it */
|
||||
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
|
||||
#define CFG_RAMBOOT
|
||||
#else
|
||||
#undef CFG_RAMBOOT
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Environment */
|
||||
#if !defined(CFG_RAMBOOT)
|
||||
#if defined(CONFIG_RAM_AS_FLASH)
|
||||
#define CFG_ENV_IS_NOWHERE
|
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x100000)
|
||||
#define CFG_ENV_SIZE 0x2000
|
||||
#else
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
|
||||
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SECT_SIZE)
|
||||
#define CFG_ENV_SIZE 0x2000 /* CFG_ENV_SECT_SIZE */
|
||||
#endif
|
||||
#else
|
||||
#define CFG_NO_FLASH 1 /* Flash is not usable now */
|
||||
#define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
|
||||
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
|
||||
#define CFG_ENV_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=192.168.0.251:/tftpboot ip=192.168.0.105:192.168.0.251::255.255.255.0:sbc8560:eth0:off console=ttyS0,9600"
|
||||
/*#define CONFIG_BOOTARGS "root=/dev/ram rw console=ttyS0,115200"*/
|
||||
#define CONFIG_BOOTCOMMAND "bootm 0xff800000 0xffa00000"
|
||||
#define CONFIG_BOOTDELAY 5 /* -1 disable autoboot */
|
||||
|
||||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
|
||||
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
|
||||
|
||||
#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
|
||||
#if defined(CONFIG_PCI)
|
||||
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PCI | \
|
||||
CFG_CMD_PING | CFG_CMD_I2C) & \
|
||||
~(CFG_CMD_ENV | \
|
||||
CFG_CMD_LOADS ))
|
||||
#elif (defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC))
|
||||
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_MII | \
|
||||
CFG_CMD_PING | CFG_CMD_I2C) & \
|
||||
~(CFG_CMD_ENV))
|
||||
#endif
|
||||
#else
|
||||
#if defined(CONFIG_PCI)
|
||||
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | \
|
||||
CFG_CMD_PING | CFG_CMD_I2C)
|
||||
#elif (defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC))
|
||||
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MII | \
|
||||
CFG_CMD_PING | CFG_CMD_I2C)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#include <cmd_confdefs.h>
|
||||
|
||||
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_PROMPT "SBC8560=> " /* Monitor Command Prompt */
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
|
||||
#else
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#endif
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CFG_LOAD_ADDR 0x1000000 /* default load address */
|
||||
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
|
||||
/* Cache Configuration */
|
||||
#define CFG_DCACHE_SIZE 32768
|
||||
#define CFG_CACHELINE_SIZE 32
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Internal Definitions
|
||||
*
|
||||
* Boot Flags
|
||||
*/
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
|
||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
|
||||
#endif
|
||||
|
||||
/*Note: change below for your network setting!!! */
|
||||
#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
|
||||
#define CONFIG_ETHADDR 00:01:af:07:9b:8a
|
||||
#define CONFIG_ETH1ADDR 00:01:af:07:9b:8b
|
||||
#define CONFIG_ETH2ADDR 00:01:af:07:9b:8c
|
||||
#endif
|
||||
|
||||
#define CONFIG_SERVERIP 192.168.0.131
|
||||
#define CONFIG_IPADDR 192.168.0.105
|
||||
#define CONFIG_GATEWAYIP 0.0.0.0
|
||||
#define CONFIG_NETMASK 255.255.255.0
|
||||
#define CONFIG_HOSTNAME SBC8560
|
||||
#define CONFIG_ROOTPATH /home/ppc
|
||||
#define CONFIG_BOOTFILE pImage
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
@ -0,0 +1,365 @@
|
|||
/*
|
||||
* (C) Copyright 2001
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* Configuration settings for the sbc8240 board.
|
||||
*/
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
|
||||
/*
|
||||
* board/config.h - configuration options, board specific
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
|
||||
#define CONFIG_MPC824X 1
|
||||
#define CONFIG_MPC8240 1
|
||||
#define CONFIG_WRSBC8240 1
|
||||
|
||||
#define CONFIG_CONS_INDEX 1
|
||||
#define CONFIG_BAUDRATE 9600
|
||||
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
#define CONFIG_PREBOOT "echo;echo Welcome to U-Boot for the sbc8240;echo;echo Type \"? or help\" to get on-line help;echo"
|
||||
|
||||
#undef CONFIG_BOOTARGS
|
||||
|
||||
#define CONFIG_BOOTCOMMAND "version;echo;tftpboot $loadaddr $loadfile;bootvx" /* autoboot command */
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"bootargs=$fei(0,0)host:/T221ppc/target/config/sbc8240/vxWorks.st " \
|
||||
"e=192.168.193.102 h=192.168.193.99 u=target pw=hello f=0x08 " \
|
||||
"tn=sbc8240 o=fei \0" \
|
||||
"env_startaddr=FFF70000\0" \
|
||||
"env_endaddr=FFF7FFFF\0" \
|
||||
"loadfile=vxWorks.st\0" \
|
||||
"loadaddr=0x01000000\0" \
|
||||
"net_load=tftpboot $loadaddr $loadfile\0" \
|
||||
"uboot_startaddr=FFF00000\0" \
|
||||
"uboot_endaddr=FFF3FFFF\0" \
|
||||
"update=tftp $loadaddr /u-boot.bin;" \
|
||||
"protect off $uboot_startaddr $uboot_endaddr;" \
|
||||
"era $uboot_startaddr $uboot_endaddr;" \
|
||||
"cp.b $loadaddr $uboot_startaddr $filesize;" \
|
||||
"protect on $uboot_startaddr $uboot_endaddr\0" \
|
||||
"zapenv=protect off $env_startaddr $env_endaddr;" \
|
||||
"era $env_startaddr $env_endaddr;" \
|
||||
"protect on $env_startaddr $env_endaddr\0"
|
||||
|
||||
#define CONFIG_BOOTDELAY 5
|
||||
|
||||
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
|
||||
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
|
||||
CFG_CMD_BSP | \
|
||||
CFG_CMD_DIAG | \
|
||||
CFG_CMD_ELF | \
|
||||
CFG_CMD_ENV | \
|
||||
CFG_CMD_FLASH | \
|
||||
CFG_CMD_PCI | \
|
||||
CFG_CMD_PING | \
|
||||
CFG_CMD_SDRAM | \
|
||||
0 )
|
||||
|
||||
/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
|
||||
*/
|
||||
#include <cmd_confdefs.h>
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
|
||||
#if 1
|
||||
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
|
||||
#endif
|
||||
#ifdef CFG_HUSH_PARSER
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
#define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */
|
||||
#define CONFIG_IPADDR 192.168.193.102
|
||||
#define CONFIG_NETMASK 255.255.255.248
|
||||
#define CONFIG_SERVERIP 192.168.193.99
|
||||
|
||||
#define CONFIG_STATUS_LED /* Status LED enabled */
|
||||
#define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */
|
||||
|
||||
#define STATUS_LED_BIT 0x00000001
|
||||
#define STATUS_LED_PERIOD (CFG_HZ / 2)
|
||||
#define STATUS_LED_STATE STATUS_LED_BLINKING
|
||||
#define STATUS_LED_ACTIVE 0 /* LED on for bit == 0 */
|
||||
#define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/* LEDs */
|
||||
typedef unsigned int led_id_t;
|
||||
|
||||
#define __led_toggle(_msk) \
|
||||
do { \
|
||||
*((volatile char *) (CFG_LED_BASE)) ^= (_msk); \
|
||||
} while(0)
|
||||
|
||||
#define __led_set(_msk, _st) \
|
||||
do { \
|
||||
if ((_st)) \
|
||||
*((volatile char *) (CFG_LED_BASE)) |= (_msk); \
|
||||
else \
|
||||
*((volatile char *) (CFG_LED_BASE)) &= ~(_msk); \
|
||||
} while(0)
|
||||
|
||||
#define __led_init(msk, st) __led_set(msk, st)
|
||||
|
||||
#endif
|
||||
|
||||
#define CONFIG_MISC_INIT_R
|
||||
#define CFG_LED_BASE 0xFFE80000
|
||||
|
||||
/* Print Buffer Size
|
||||
*/
|
||||
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
|
||||
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||||
#define CFG_LOAD_ADDR 0x00100000 /* Default load address */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration
|
||||
* (Set up by the startup code)
|
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CFG_SDRAM_BASE 0x00000000
|
||||
#define CFG_FLASH_BASE 0xFFF00000
|
||||
|
||||
#define CFG_RESET_ADDRESS 0xFFF00100
|
||||
|
||||
#define CFG_EUMB_ADDR 0xFCE00000
|
||||
|
||||
#define CFG_MONITOR_BASE TEXT_BASE
|
||||
|
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
|
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
|
||||
|
||||
#define CFG_MEMTEST_START 0x00004000 /* memtest works on */
|
||||
#define CFG_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */
|
||||
|
||||
/* Maximum amount of RAM.
|
||||
*/
|
||||
#define CFG_MAX_RAM_SIZE 0x10000000
|
||||
|
||||
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
|
||||
#undef CFG_RAMBOOT
|
||||
#else
|
||||
#define CFG_RAMBOOT
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area
|
||||
*/
|
||||
|
||||
/* Size in bytes reserved for initial data
|
||||
*/
|
||||
#define CFG_GBL_DATA_SIZE 128
|
||||
|
||||
#define CFG_INIT_RAM_ADDR 0x40000000
|
||||
#define CFG_INIT_RAM_END 0x1000
|
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
|
||||
|
||||
/*
|
||||
* NS16550 Configuration
|
||||
*/
|
||||
#define CFG_NS16550
|
||||
#define CFG_NS16550_SERIAL
|
||||
|
||||
#define CFG_NS16550_REG_SIZE 1
|
||||
|
||||
#define CFG_NS16550_CLK 3686400
|
||||
|
||||
#define CFG_NS16550_COM1 0xFFF80000
|
||||
|
||||
/*
|
||||
* Low Level Configuration Settings
|
||||
* (address mappings, register initial values, etc.)
|
||||
* You should know what you are doing if you make changes here.
|
||||
* For the detail description refer to the MPC8240 user's manual.
|
||||
*/
|
||||
|
||||
#define CONFIG_SYS_CLK_FREQ 33000000
|
||||
#define CFG_HZ 1000
|
||||
#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 3
|
||||
|
||||
/* Bit-field values for MCCR1.
|
||||
*/
|
||||
#define CFG_ROMNAL 0
|
||||
#define CFG_ROMFAL 7
|
||||
|
||||
/* Bit-field values for MCCR2.
|
||||
*/
|
||||
#define CFG_REFINT 430 /* Refresh interval */
|
||||
|
||||
/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.
|
||||
*/
|
||||
#define CFG_BSTOPRE 192
|
||||
|
||||
/* Bit-field values for MCCR3.
|
||||
*/
|
||||
#define CFG_REFREC 2 /* Refresh to activate interval */
|
||||
#define CFG_RDLAT 3 /* Data latancy from read command */
|
||||
|
||||
/* Bit-field values for MCCR4.
|
||||
*/
|
||||
#define CFG_PRETOACT 2 /* Precharge to activate interval */
|
||||
#define CFG_ACTTOPRE 5 /* Activate to Precharge interval */
|
||||
#define CFG_SDMODE_CAS_LAT 2 /* SDMODE CAS latancy */
|
||||
#define CFG_SDMODE_WRAP 0 /* SDMODE wrap type */
|
||||
#define CFG_SDMODE_BURSTLEN 2 /* SDMODE Burst length */
|
||||
#define CFG_ACTORW 2
|
||||
#define CFG_REGISTERD_TYPE_BUFFER 1
|
||||
|
||||
/* Memory bank settings.
|
||||
* Only bits 20-29 are actually used from these vales to set the
|
||||
* start/end addresses. The upper two bits will always be 0, and the lower
|
||||
* 20 bits will be 0x00000 for a start address, or 0xfffff for an end
|
||||
* address. Refer to the MPC8240 book.
|
||||
*/
|
||||
|
||||
#define CFG_BANK0_START 0x00000000
|
||||
#define CFG_BANK0_END (CFG_MAX_RAM_SIZE - 1)
|
||||
#define CFG_BANK0_ENABLE 1
|
||||
#define CFG_BANK1_START 0x3ff00000
|
||||
#define CFG_BANK1_END 0x3fffffff
|
||||
#define CFG_BANK1_ENABLE 0
|
||||
#define CFG_BANK2_START 0x3ff00000
|
||||
#define CFG_BANK2_END 0x3fffffff
|
||||
#define CFG_BANK2_ENABLE 0
|
||||
#define CFG_BANK3_START 0x3ff00000
|
||||
#define CFG_BANK3_END 0x3fffffff
|
||||
#define CFG_BANK3_ENABLE 0
|
||||
#define CFG_BANK4_START 0x3ff00000
|
||||
#define CFG_BANK4_END 0x3fffffff
|
||||
#define CFG_BANK4_ENABLE 0
|
||||
#define CFG_BANK5_START 0x3ff00000
|
||||
#define CFG_BANK5_END 0x3fffffff
|
||||
#define CFG_BANK5_ENABLE 0
|
||||
#define CFG_BANK6_START 0x3ff00000
|
||||
#define CFG_BANK6_END 0x3fffffff
|
||||
#define CFG_BANK6_ENABLE 0
|
||||
#define CFG_BANK7_START 0x3ff00000
|
||||
#define CFG_BANK7_END 0x3fffffff
|
||||
#define CFG_BANK7_ENABLE 0
|
||||
|
||||
#define CFG_ODCR 0xff
|
||||
|
||||
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
|
||||
#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_IBAT1L (CFG_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
|
||||
#define CFG_IBAT1U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
|
||||
#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_IBAT3L (0xFC000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
|
||||
#define CFG_IBAT3U (0xFC000000 | BATU_BL_64M | BATU_VS | BATU_VP)
|
||||
|
||||
#define CFG_DBAT0L CFG_IBAT0L
|
||||
#define CFG_DBAT0U CFG_IBAT0U
|
||||
#define CFG_DBAT1L CFG_IBAT1L
|
||||
#define CFG_DBAT1U CFG_IBAT1U
|
||||
#define CFG_DBAT2L CFG_IBAT2L
|
||||
#define CFG_DBAT2U CFG_IBAT2U
|
||||
#define CFG_DBAT3L CFG_IBAT3L
|
||||
#define CFG_DBAT3U CFG_IBAT3U
|
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data
|
||||
* have to be in the first 8 MB of memory, since this is
|
||||
* the maximum mapped by the Linux kernel during initialization.
|
||||
*/
|
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization
|
||||
*/
|
||||
#define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */
|
||||
#define CFG_MAX_FLASH_SECT 256 /* Max number of sectors in one bank */
|
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
|
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
|
||||
|
||||
/*
|
||||
* Init Memory Controller:
|
||||
*
|
||||
* BR0/1 and OR0/1 (FLASH)
|
||||
*/
|
||||
|
||||
#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
|
||||
#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
|
||||
|
||||
/* Warining: environment is not EMBEDDED in the U-Boot code.
|
||||
* It's stored in flash separately.
|
||||
*/
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_ADDR 0xFFF70000
|
||||
#define CFG_ENV_SIZE 0x4000 /* Size of the Environment */
|
||||
#define CFG_ENV_OFFSET 0 /* starting right at the beginning */
|
||||
#define CFG_ENV_SECT_SIZE 0x40000 /* Size of the Environment Sector */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration
|
||||
*/
|
||||
#define CFG_CACHELINE_SIZE 32
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
|
||||
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Internal Definitions
|
||||
*
|
||||
* Boot Flags
|
||||
*/
|
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
|
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_PCI /* include pci support */
|
||||
#define CONFIG_PCI_PNP /* we need Plug 'n Play */
|
||||
#define CONFIG_NET_MULTI /* Multi ethernet cards support */
|
||||
#define CONFIG_TULIP
|
||||
#define CONFIG_EEPRO100
|
||||
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
|
||||
#endif /* __CONFIG_H */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -336,6 +336,9 @@ void status_led_set (int led, int state);
|
|||
/***** NetPhone ********************************************************/
|
||||
#elif defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
|
||||
/* XXX empty just to avoid the error */
|
||||
/***** sbc8240 ********************************************************/
|
||||
#elif defined(CONFIG_WRSBC8240)
|
||||
/* XXX empty just to avoid the error */
|
||||
/************************************************************************/
|
||||
#else
|
||||
# error Status LED configuration missing
|
||||
|
|
|
|||
|
|
@ -77,62 +77,63 @@ typedef struct table_entry {
|
|||
} table_entry_t;
|
||||
|
||||
table_entry_t arch_name[] = {
|
||||
{ IH_CPU_INVALID, NULL, "Invalid CPU", },
|
||||
{ IH_CPU_ALPHA, "alpha", "Alpha", },
|
||||
{ IH_CPU_ARM, "arm", "ARM", },
|
||||
{ IH_CPU_I386, "x86", "Intel x86", },
|
||||
{ IH_CPU_IA64, "ia64", "IA64", },
|
||||
{ IH_CPU_MIPS, "mips", "MIPS", },
|
||||
{ IH_CPU_MIPS64, "mips64", "MIPS 64 Bit", },
|
||||
{ IH_CPU_PPC, "ppc", "PowerPC", },
|
||||
{ IH_CPU_S390, "s390", "IBM S390", },
|
||||
{ IH_CPU_SH, "sh", "SuperH", },
|
||||
{ IH_CPU_SPARC, "sparc", "SPARC", },
|
||||
{ IH_CPU_SPARC64, "sparc64", "SPARC 64 Bit", },
|
||||
{ IH_CPU_M68K, "m68k", "MC68000", },
|
||||
{ -1, "", "", },
|
||||
{ IH_CPU_INVALID, NULL, "Invalid CPU", },
|
||||
{ IH_CPU_ALPHA, "alpha", "Alpha", },
|
||||
{ IH_CPU_ARM, "arm", "ARM", },
|
||||
{ IH_CPU_I386, "x86", "Intel x86", },
|
||||
{ IH_CPU_IA64, "ia64", "IA64", },
|
||||
{ IH_CPU_M68K, "m68k", "MC68000", },
|
||||
{ IH_CPU_MICROBLAZE, "microblaze", "MicroBlaze", },
|
||||
{ IH_CPU_MIPS, "mips", "MIPS", },
|
||||
{ IH_CPU_MIPS64, "mips64", "MIPS 64 Bit", },
|
||||
{ IH_CPU_PPC, "ppc", "PowerPC", },
|
||||
{ IH_CPU_S390, "s390", "IBM S390", },
|
||||
{ IH_CPU_SH, "sh", "SuperH", },
|
||||
{ IH_CPU_SPARC, "sparc", "SPARC", },
|
||||
{ IH_CPU_SPARC64, "sparc64", "SPARC 64 Bit", },
|
||||
{ -1, "", "", },
|
||||
};
|
||||
|
||||
table_entry_t os_name[] = {
|
||||
{ IH_OS_INVALID, NULL, "Invalid OS", },
|
||||
{ IH_OS_OPENBSD, "openbsd", "OpenBSD", },
|
||||
{ IH_OS_NETBSD, "netbsd", "NetBSD", },
|
||||
{ IH_OS_FREEBSD, "freebsd", "FreeBSD", },
|
||||
{ IH_OS_4_4BSD, "4_4bsd", "4_4BSD", },
|
||||
{ IH_OS_LINUX, "linux", "Linux", },
|
||||
{ IH_OS_SVR4, "svr4", "SVR4", },
|
||||
{ IH_OS_ESIX, "esix", "Esix", },
|
||||
{ IH_OS_SOLARIS, "solaris", "Solaris", },
|
||||
{ IH_OS_IRIX, "irix", "Irix", },
|
||||
{ IH_OS_SCO, "sco", "SCO", },
|
||||
{ IH_OS_ARTOS, "artos", "ARTOS", },
|
||||
{ IH_OS_DELL, "dell", "Dell", },
|
||||
{ IH_OS_NCR, "ncr", "NCR", },
|
||||
{ IH_OS_ESIX, "esix", "Esix", },
|
||||
{ IH_OS_FREEBSD, "freebsd", "FreeBSD", },
|
||||
{ IH_OS_IRIX, "irix", "Irix", },
|
||||
{ IH_OS_LINUX, "linux", "Linux", },
|
||||
{ IH_OS_LYNXOS, "lynxos", "LynxOS", },
|
||||
{ IH_OS_VXWORKS, "vxworks", "VxWorks", },
|
||||
{ IH_OS_NCR, "ncr", "NCR", },
|
||||
{ IH_OS_NETBSD, "netbsd", "NetBSD", },
|
||||
{ IH_OS_OPENBSD, "openbsd", "OpenBSD", },
|
||||
{ IH_OS_PSOS, "psos", "pSOS", },
|
||||
{ IH_OS_QNX, "qnx", "QNX", },
|
||||
{ IH_OS_U_BOOT, "u-boot", "U-Boot", },
|
||||
{ IH_OS_RTEMS, "rtems", "RTEMS", },
|
||||
{ IH_OS_ARTOS, "artos", "ARTOS", },
|
||||
{ IH_OS_SCO, "sco", "SCO", },
|
||||
{ IH_OS_SOLARIS, "solaris", "Solaris", },
|
||||
{ IH_OS_SVR4, "svr4", "SVR4", },
|
||||
{ IH_OS_U_BOOT, "u-boot", "U-Boot", },
|
||||
{ IH_OS_VXWORKS, "vxworks", "VxWorks", },
|
||||
{ -1, "", "", },
|
||||
};
|
||||
|
||||
table_entry_t type_name[] = {
|
||||
{ IH_TYPE_INVALID, NULL, "Invalid Image", },
|
||||
{ IH_TYPE_STANDALONE, "standalone", "Standalone Program", },
|
||||
{ IH_TYPE_KERNEL, "kernel", "Kernel Image", },
|
||||
{ IH_TYPE_RAMDISK, "ramdisk", "RAMDisk Image", },
|
||||
{ IH_TYPE_MULTI, "multi", "Multi-File Image", },
|
||||
{ IH_TYPE_FIRMWARE, "firmware", "Firmware", },
|
||||
{ IH_TYPE_SCRIPT, "script", "Script", },
|
||||
{ IH_TYPE_FILESYSTEM, "filesystem", "Filesystem Image", },
|
||||
{ IH_TYPE_FIRMWARE, "firmware", "Firmware", },
|
||||
{ IH_TYPE_KERNEL, "kernel", "Kernel Image", },
|
||||
{ IH_TYPE_MULTI, "multi", "Multi-File Image", },
|
||||
{ IH_TYPE_RAMDISK, "ramdisk", "RAMDisk Image", },
|
||||
{ IH_TYPE_SCRIPT, "script", "Script", },
|
||||
{ IH_TYPE_STANDALONE, "standalone", "Standalone Program", },
|
||||
{ -1, "", "", },
|
||||
};
|
||||
|
||||
table_entry_t comp_name[] = {
|
||||
{ IH_COMP_NONE, "none", "uncompressed", },
|
||||
{ IH_COMP_GZIP, "gzip", "gzip compressed", },
|
||||
{ IH_COMP_BZIP2, "bzip2", "bzip2 compressed", },
|
||||
{ IH_COMP_GZIP, "gzip", "gzip compressed", },
|
||||
{ -1, "", "", },
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue