phone-side
/
uboot-mt623x
9
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Use jr as register jump instruction 

Current assembler codes are inconsistent in the way of register jump
instruction usage; some use jr, some use j. Of course GNU as allows both
usages, but as can be expected from `Jump Register' the mnemonic `jr' is
more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
at all.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
This commit is contained in:
Shinya Kuribayashi 2008-04-17 23:35:13 +09:00 committed by Wolfgang Denk
parent 7ce6370982
commit 43c509254f
9 changed files with 15 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
board/dbau1x00/lowlevel_init.S
View File

@ -586,5 +586,5 @@ noCacheJump:
sw t1, 0(t0) sw t1, 0(t0)
sync sync
j ra jr ra
nop nop

2
board/gth2/lowlevel_init.S
View File

@ -450,7 +450,7 @@ mtc: sw zero, 0(t0)
nop nop
nop nop
memtestend: memtestend:
j ra jr ra
nop nop
memhang: memhang:

8
board/incaip/lowlevel_init.S
View File

@ -105,7 +105,7 @@ __ebu_init:
li t2, 0x684143FD li t2, 0x684143FD
sw t2, EBU_BUSCON1(t1) sw t2, EBU_BUSCON1(t1)
3: 3:
j ra jr ra
nop nop
.end ebu_init .end ebu_init
@ -170,7 +170,7 @@ __cgu_init:
li t2, 0x80000001 li t2, 0x80000001
sw t2, CGU_MUXCR(t1) sw t2, CGU_MUXCR(t1)
5: 5:
j ra jr ra
nop nop
.end cgu_init .end cgu_init
@ -266,7 +266,7 @@ __sdram_init:
li t2, 0x00000001 li t2, 0x00000001
sw t2, MC_CTRLENA(t1) sw t2, MC_CTRLENA(t1)
j ra jr ra
nop nop
.end sdram_init .end sdram_init
@ -298,7 +298,7 @@ lowlevel_init:
nop nop
move ra, t0 move ra, t0
j ra jr ra
nop nop
.end lowlevel_init .end lowlevel_init

2
board/pb1x00/lowlevel_init.S
View File

@ -388,5 +388,5 @@ skip_memsetup:
*/ */
sync sync
j ra jr ra
nop nop

2
board/purple/lowlevel_init.S
View File

@ -33,5 +33,5 @@ lowlevel_init:
li t0, MC_IOGP li t0, MC_IOGP
li t1, 0xf24 li t1, 0xf24
sw t1, 0(t0) sw t1, 0(t0)
j ra jr ra
nop nop

2
board/qemu-mips/lowlevel_init.S
View File

@ -37,5 +37,5 @@ lowlevel_init:
mtc0 zero, CP0_WIRED mtc0 zero, CP0_WIRED
nop nop
j ra jr ra
nop nop

4
cpu/mips/cache.S
View File

@ -282,7 +282,7 @@ LEAF(dcache_disable)
and t0, t0, t1 and t0, t0, t1
ori t0, t0, CONF_CM_UNCACHED ori t0, t0, CONF_CM_UNCACHED
mtc0 t0, CP0_CONFIG mtc0 t0, CP0_CONFIG
j ra jr ra
END(dcache_disable) END(dcache_disable)
#ifdef CFG_INIT_RAM_LOCK_MIPS #ifdef CFG_INIT_RAM_LOCK_MIPS
@ -308,7 +308,7 @@ mips_cache_lock:
move a1, a2 move a1, a2
icacheop(a0,a1,a2,a3,0x1d) icacheop(a0,a1,a2,a3,0x1d)
j ra jr ra
.end mips_cache_lock .end mips_cache_lock
#endif /* CFG_INIT_RAM_LOCK_MIPS */ #endif /* CFG_INIT_RAM_LOCK_MIPS */

2
cpu/mips/incaip_wdt.S
View File

@ -68,5 +68,5 @@ disable_incaip_wdt:
li t1, WD_WRITE_ENDINIT li t1, WD_WRITE_ENDINIT
sw t1, WD_CON0(t0) /* end command */ sw t1, WD_CON0(t0) /* end command */
j ra jr ra
nop nop

6
cpu/mips/start.S
View File

@ -286,7 +286,7 @@ reset:
la sp, 0(t0) la sp, 0(t0)
la t9, board_init_f la t9, board_init_f
j t9 jr t9
nop nop
/* /*
@ -342,7 +342,7 @@ relocate_code:
/* Jump to where we've relocated ourselves. /* Jump to where we've relocated ourselves.
*/ */
addi t0, a2, in_ram - _start addi t0, a2, in_ram - _start
j t0 jr t0
nop nop
.gpword _GLOBAL_OFFSET_TABLE_ /* _GLOBAL_OFFSET_TABLE_ - _gp */ .gpword _GLOBAL_OFFSET_TABLE_ /* _GLOBAL_OFFSET_TABLE_ - _gp */
@ -387,7 +387,7 @@ in_ram:
move a0, a1 move a0, a1
la t9, board_init_r la t9, board_init_r
j t9 jr t9
move a1, a2 /* delay slot */ move a1, a2 /* delay slot */
.end relocate_code .end relocate_code