sh: Fix receive FIFO level register of SH4A

Receive FIFO level register is different in SH4A.
Because register is different, cannot occasionally receive data.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Nobuhiro Iwamatsu 2008-03-06 14:05:53 +09:00
parent c133c1fb0b
commit 3ecff1d70a
1 changed files with 30 additions and 22 deletions

View File

@ -53,18 +53,22 @@
# define SCLSR (vu_short *)(SCIF_BASE + 0x28)
# define SCRER (vu_short *)(SCIF_BASE + 0x2C)
# define LSR_ORER 1
# define FIFOLEVEL_MASK 0xFF
#elif defined(CONFIG_CPU_SH7750) || \
defined(CONFIG_CPU_SH7722)
# define SCSPTR (vu_short *)(SCIF_BASE + 0x20)
# define SCLSR (vu_short *)(SCIF_BASE + 0x24)
# define LSR_ORER 1
# define FIFOLEVEL_MASK 0x1F
#elif defined(CONFIG_CPU_SH7720)
# define SCLSR (vu_short *)(SCIF_BASE + 0x24)
# define LSR_ORER 0x0200
# define FIFOLEVEL_MASK 0x1F
#elif defined(CONFIG_CPU_SH7710)
defined(CONFIG_CPU_SH7712)
# define SCLSR SCFSR /* SCSSR */
# define LSR_ORER 1
# define FIFOLEVEL_MASK 0x1F
#endif
/* SCBRR register value setting */
@ -109,12 +113,16 @@ int serial_init (void)
static int serial_tx_fifo_level (void)
{
return (*SCFDR >> 8) & 0x1F;
return (*SCFDR >> 8) & FIFOLEVEL_MASK;
}
static int serial_rx_fifo_level (void)
{
return (*SCFDR >> 0) & 0x1F;
#if defined(CONFIG_SH4A)
return (*SCRFDR >> 0) & FIFOLEVEL_MASK;
#else
return (*SCFDR >> 0) & FIFOLEVEL_MASK;
#endif
}
void serial_raw_putc (const char c)