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Patch by Markus Pietrek, 04 May 2004: 

Fix clear_bss code for ARM systems (all except s3c44b0 which
doesn't clear BSS at all?)
This commit is contained in:
wdenk 2004-06-09 00:10:59 +00:00
parent 1eaeb58e3c
commit 356a0d9f31
10 changed files with 20 additions and 10 deletions
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10
CHANGELOG
View File

@ -2,6 +2,16 @@
Changes since U-Boot 1.1.1:
======================================================================
* Patch by Markus Pietrek, 04 May 2004:
Fix clear_bss code for ARM systems (all except s3c44b0 which
doesn't clear BSS at all?)
* Fix "ping" problem on INC-IP board. Strange problem:
Sometimes the store word instruction hangs while writing to one of
the Switch registers, but only if the next instruction is 16-byte
aligned. Moving the instruction into a separate function somehow
makes the problem go away.
* Patch by Rishi Bhattacharya, 08 May 2004:
Add support for TI OMAP5912 OSK Board

1
cpu/arm720t/start.S
View File

@ -154,7 +154,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

1
cpu/arm920t/start.S
View File

@ -191,7 +191,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

1
cpu/arm925t/start.S
View File

@ -197,7 +197,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

1
cpu/arm926ejs/start.S
View File

@ -172,7 +172,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

1
cpu/at91rm9200/start.S
View File

@ -147,7 +147,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

1
cpu/ixp/start.S
View File

@ -289,7 +289,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

1
cpu/pxa/start.S
View File

@ -141,7 +141,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

1
cpu/sa1100/start.S
View File

@ -154,7 +154,6 @@ stack_setup:
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
add r0, r0, #4 /* start at first byte of bss */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */

12
drivers/inca-ip_sw.c
View File

@ -41,13 +41,21 @@
#define DELAY udelay(10000)
/* Sometimes the store word instruction hangs while writing to one
* of the Switch registers. Moving the instruction into a separate
* function somehow makes the problem go away.
*/
static void SWORD(volatile u32 * reg, u32 value)
{
*reg = value;
}
#define DMA_WRITE_REG(reg, value) *((volatile u32 *)reg) = (u32)value;
#define DMA_READ_REG(reg, value) value = (u32)*((volatile u32*)reg)
#define SW_WRITE_REG(reg, value) \
*((volatile u32*)reg) = (u32)value;\
SWORD(reg, value);\
DELAY;\
*((volatile u32*)reg) = (u32)value;
SWORD(reg, value);
#define SW_READ_REG(reg, value) \
value = (u32)*((volatile u32*)reg);\