Fix timer handling on MPC85xx systems

This commit is contained in:
wdenk 2005-05-13 22:49:36 +00:00
parent 9dd41a7b0c
commit 343117bf12
4 changed files with 168 additions and 160 deletions

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@ -2,6 +2,8 @@
Changes for U-Boot 1.1.3:
======================================================================
* Fix timer handling on MPC85xx systems
* Fix debug code in omap5912osk flash driver
* Add support for MPC8247 based "IDS8247" board.

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@ -49,6 +49,22 @@ static __inline__ void set_msr(unsigned long msr)
asm volatile("isync");
}
static __inline__ unsigned long get_dec (void)
{
unsigned long val;
asm volatile ("mfdec %0":"=r" (val):);
return val;
}
static __inline__ void set_dec (unsigned long val)
{
if (val)
asm volatile ("mtdec %0"::"r" (val));
}
void enable_interrupts (void)
{
set_msr (get_msr() | MSR_EE);
@ -62,9 +78,17 @@ int disable_interrupts (void)
return ((msr & MSR_EE) != 0);
}
/* interrupt is not supported yet */
int interrupt_init (void)
{
volatile immap_t *immr = (immap_t *)CFG_IMMR;
immr->im_pic.gcr = MPC85xx_PICGCR_RST;
while (immr->im_pic.gcr & MPC85xx_PICGCR_RST);
immr->im_pic.gcr = MPC85xx_PICGCR_M;
decrementer_count = get_tbclk() / CFG_HZ;
mtspr(SPRN_TCR, TCR_PIE);
set_dec (decrementer_count);
set_msr (get_msr () | MSR_EE);
return (0);
}
@ -96,9 +120,9 @@ volatile ulong timestamp = 0;
*/
void timer_interrupt(struct pt_regs *regs)
{
printf ("*** Timer Interrupt *** ");
timestamp++;
set_dec (decrementer_count);
mtspr(SPRN_TSR, TSR_PIS);
#if defined(CONFIG_WATCHDOG)
if ((timestamp % 1000) == 0)
reset_85xx_watchdog();

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@ -177,7 +177,7 @@ _start_e500:
isync
/* Setup interrupt vectors */
lis r1,0xfff8
lis r1,TEXT_BASE@h
mtspr IVPR, r1
li r1,0x0100
@ -196,16 +196,20 @@ _start_e500:
mtspr IVOR6,r1 /* 6: Program check */
li r1,0x0800
mtspr IVOR7,r1 /* 7: floating point unavailable */
li r1,0x0c00
li r1,0x0900
mtspr IVOR8,r1 /* 8: System call */
/* 9: Auxiliary processor unavailable(unsupported) */
li r1,0x1000
li r1,0x0a00
mtspr IVOR10,r1 /* 10: Decrementer */
li r1,0x1400
li r1,0x0b00
mtspr IVOR11,r1 /* 11: Interval timer */
li r1,0x0c00
mtspr IVOR12,r1 /* 11: Watchdog timer */
li r10,0x0d00
mtspr IVOR13,r1 /* 13: Data TLB error */
li r1,0x1300
li r1,0x0e00
mtspr IVOR14,r1 /* 14: Instruction TLB error */
li r1,0x2000
li r1,0x0f00
mtspr IVOR15,r1 /* 15: Debug */
/*
@ -485,11 +489,8 @@ ProgramCheck:
/* No FPU on MPC85xx. This exception is not supposed to happen.
*/
STD_EXCEPTION(0x0800, FPUnavailable, UnknownException)
STD_EXCEPTION(0x0900, Decrementer, timer_interrupt)
STD_EXCEPTION(0x0a00, Trap_0a, UnknownException)
STD_EXCEPTION(0x0b00, Trap_0b, UnknownException)
. = 0x0c00
. = 0x0900
/*
* r0 - SYSCALL number
* r3-... arguments
@ -556,32 +557,14 @@ _back:
rfi
_end_back:
STD_EXCEPTION(0xd00, SingleStep, UnknownException)
STD_EXCEPTION(0x0a00, Decrementer, timer_interrupt)
STD_EXCEPTION(0x0b00, IntervalTimer, UnknownException)
STD_EXCEPTION(0x0c00, WatchdogTimer, UnknownException)
STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
STD_EXCEPTION(0x0d00, DataTLBError, UnknownException)
STD_EXCEPTION(0x0e00, InstructionTLBError, UnknownException)
STD_EXCEPTION(0x1000, PIT, PITException)
STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
STD_EXCEPTION(0x1500, Reserved5, UnknownException)
STD_EXCEPTION(0x1600, Reserved6, UnknownException)
STD_EXCEPTION(0x1700, Reserved7, UnknownException)
STD_EXCEPTION(0x1800, Reserved8, UnknownException)
STD_EXCEPTION(0x1900, Reserved9, UnknownException)
STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
STD_EXCEPTION(0x1d00, InstructionBreakpoint, UnknownException)
STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
CRIT_EXCEPTION(0x2000, DebugBreakpoint, DebugException )
CRIT_EXCEPTION(0x0f00, DebugBreakpoint, DebugException )
.globl _end_of_vectors
_end_of_vectors:
@ -1100,34 +1083,31 @@ trap_init:
* relocate `hdlr' and `int_return' entries
*/
li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
li r8, Alignment - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_DataStorage - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_InstStorage - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_ExtInterrupt - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_Decrementer - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_IntervalTimer - _start + EXC_OFF_SYS_RESET
li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
2:
bl trap_reloc
addi r7, r7, 0x100 /* next exception vector */
cmplw 0, r7, r8
blt 2b
li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
bl trap_reloc
li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
li r8, SystemCall - _start + EXC_OFF_SYS_RESET
3:
bl trap_reloc
addi r7, r7, 0x100 /* next exception vector */
cmplw 0, r7, r8
blt 3b
li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
4:
bl trap_reloc
addi r7, r7, 0x100 /* next exception vector */
cmplw 0, r7, r8
blt 4b
lis r7,0x0
mtspr IVPR, r7
mtlr r4 /* restore link register */
blr

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@ -741,6 +741,8 @@ typedef struct ccsr_pic {
uint frr; /* 0x41000 - Feature Reporting Register */
char res10[28];
uint gcr; /* 0x41020 - Global Configuration Register */
#define MPC85xx_PICGCR_RST 0x80000000
#define MPC85xx_PICGCR_M 0x20000000
char res11[92];
uint vir; /* 0x41080 - Vendor Identification Register */
char res12[12];