Fix timer handling on MPC85xx systems
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9dd41a7b0c
commit
343117bf12
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@ -2,6 +2,8 @@
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Changes for U-Boot 1.1.3:
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======================================================================
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* Fix timer handling on MPC85xx systems
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* Fix debug code in omap5912osk flash driver
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* Add support for MPC8247 based "IDS8247" board.
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@ -49,6 +49,22 @@ static __inline__ void set_msr(unsigned long msr)
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asm volatile("isync");
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}
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static __inline__ unsigned long get_dec (void)
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{
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unsigned long val;
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asm volatile ("mfdec %0":"=r" (val):);
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return val;
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}
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static __inline__ void set_dec (unsigned long val)
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{
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if (val)
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asm volatile ("mtdec %0"::"r" (val));
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}
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void enable_interrupts (void)
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{
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set_msr (get_msr() | MSR_EE);
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@ -62,9 +78,17 @@ int disable_interrupts (void)
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return ((msr & MSR_EE) != 0);
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}
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/* interrupt is not supported yet */
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int interrupt_init (void)
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{
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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immr->im_pic.gcr = MPC85xx_PICGCR_RST;
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while (immr->im_pic.gcr & MPC85xx_PICGCR_RST);
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immr->im_pic.gcr = MPC85xx_PICGCR_M;
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decrementer_count = get_tbclk() / CFG_HZ;
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mtspr(SPRN_TCR, TCR_PIE);
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set_dec (decrementer_count);
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set_msr (get_msr () | MSR_EE);
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return (0);
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}
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@ -96,9 +120,9 @@ volatile ulong timestamp = 0;
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*/
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void timer_interrupt(struct pt_regs *regs)
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{
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printf ("*** Timer Interrupt *** ");
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timestamp++;
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set_dec (decrementer_count);
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mtspr(SPRN_TSR, TSR_PIS);
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#if defined(CONFIG_WATCHDOG)
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if ((timestamp % 1000) == 0)
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reset_85xx_watchdog();
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@ -177,7 +177,7 @@ _start_e500:
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isync
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/* Setup interrupt vectors */
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lis r1,0xfff8
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lis r1,TEXT_BASE@h
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mtspr IVPR, r1
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li r1,0x0100
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@ -196,16 +196,20 @@ _start_e500:
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mtspr IVOR6,r1 /* 6: Program check */
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li r1,0x0800
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mtspr IVOR7,r1 /* 7: floating point unavailable */
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li r1,0x0c00
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li r1,0x0900
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mtspr IVOR8,r1 /* 8: System call */
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/* 9: Auxiliary processor unavailable(unsupported) */
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li r1,0x1000
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li r1,0x0a00
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mtspr IVOR10,r1 /* 10: Decrementer */
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li r1,0x1400
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li r1,0x0b00
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mtspr IVOR11,r1 /* 11: Interval timer */
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li r1,0x0c00
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mtspr IVOR12,r1 /* 11: Watchdog timer */
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li r10,0x0d00
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mtspr IVOR13,r1 /* 13: Data TLB error */
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li r1,0x1300
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li r1,0x0e00
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mtspr IVOR14,r1 /* 14: Instruction TLB error */
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li r1,0x2000
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li r1,0x0f00
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mtspr IVOR15,r1 /* 15: Debug */
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/*
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@ -485,11 +489,8 @@ ProgramCheck:
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/* No FPU on MPC85xx. This exception is not supposed to happen.
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*/
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STD_EXCEPTION(0x0800, FPUnavailable, UnknownException)
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STD_EXCEPTION(0x0900, Decrementer, timer_interrupt)
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STD_EXCEPTION(0x0a00, Trap_0a, UnknownException)
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STD_EXCEPTION(0x0b00, Trap_0b, UnknownException)
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. = 0x0c00
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. = 0x0900
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/*
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* r0 - SYSCALL number
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* r3-... arguments
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@ -556,32 +557,14 @@ _back:
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rfi
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_end_back:
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STD_EXCEPTION(0xd00, SingleStep, UnknownException)
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STD_EXCEPTION(0x0a00, Decrementer, timer_interrupt)
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STD_EXCEPTION(0x0b00, IntervalTimer, UnknownException)
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STD_EXCEPTION(0x0c00, WatchdogTimer, UnknownException)
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STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
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STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
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STD_EXCEPTION(0x0d00, DataTLBError, UnknownException)
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STD_EXCEPTION(0x0e00, InstructionTLBError, UnknownException)
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STD_EXCEPTION(0x1000, PIT, PITException)
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STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
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STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
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STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
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STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
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STD_EXCEPTION(0x1500, Reserved5, UnknownException)
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STD_EXCEPTION(0x1600, Reserved6, UnknownException)
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STD_EXCEPTION(0x1700, Reserved7, UnknownException)
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STD_EXCEPTION(0x1800, Reserved8, UnknownException)
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STD_EXCEPTION(0x1900, Reserved9, UnknownException)
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STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
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STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
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STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
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STD_EXCEPTION(0x1d00, InstructionBreakpoint, UnknownException)
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STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
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STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
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CRIT_EXCEPTION(0x2000, DebugBreakpoint, DebugException )
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CRIT_EXCEPTION(0x0f00, DebugBreakpoint, DebugException )
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.globl _end_of_vectors
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_end_of_vectors:
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@ -1100,34 +1083,31 @@ trap_init:
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* relocate `hdlr' and `int_return' entries
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*/
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li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
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li r8, Alignment - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_DataStorage - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_InstStorage - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_ExtInterrupt - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_Decrementer - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_IntervalTimer - _start + EXC_OFF_SYS_RESET
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li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
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2:
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bl trap_reloc
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addi r7, r7, 0x100 /* next exception vector */
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cmplw 0, r7, r8
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blt 2b
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li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
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bl trap_reloc
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li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
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li r8, SystemCall - _start + EXC_OFF_SYS_RESET
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3:
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bl trap_reloc
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addi r7, r7, 0x100 /* next exception vector */
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cmplw 0, r7, r8
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blt 3b
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li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
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li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
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4:
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bl trap_reloc
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addi r7, r7, 0x100 /* next exception vector */
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cmplw 0, r7, r8
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blt 4b
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lis r7,0x0
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mtspr IVPR, r7
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mtlr r4 /* restore link register */
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blr
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@ -741,6 +741,8 @@ typedef struct ccsr_pic {
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uint frr; /* 0x41000 - Feature Reporting Register */
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char res10[28];
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uint gcr; /* 0x41020 - Global Configuration Register */
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#define MPC85xx_PICGCR_RST 0x80000000
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#define MPC85xx_PICGCR_M 0x20000000
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char res11[92];
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uint vir; /* 0x41080 - Vendor Identification Register */
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char res12[12];
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