microblaze: Change microblaze-generic config file
Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
Michal Simek
parent
52a822ed9c
commit
330e55459b
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@ -25,6 +25,8 @@
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* Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
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*/
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#define XILINX_BOARD_NAME microblaze-generic
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/* System Clock Frequency */
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#define XILINX_CLOCK_FREQ 100000000
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@ -32,24 +32,26 @@
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/* uart */
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#ifdef XILINX_UARTLITE_BASEADDR
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#define CONFIG_XILINX_UARTLITE
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#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
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#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
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#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
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#define CONFIG_XILINX_UARTLITE
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#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
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#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
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#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
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#define CONSOLE_ARG "console=console=ttyUL0,115200\0"
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#elif XILINX_UART16550_BASEADDR
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#define CONFIG_SYS_NS16550 1
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
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#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_NS16550 1
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
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#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
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#define CONFIG_BAUDRATE 115200
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/* The following table includes the supported baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
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/* The following table includes the supported baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
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#define CONSOLE_ARG "console=console=ttyS0,115200\0"
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#else
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#error Undefined uart
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#error Undefined uart
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#endif
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/* setting reset address */
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@ -57,44 +59,44 @@
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/* ethernet */
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#ifdef XILINX_EMAC_BASEADDR
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#define CONFIG_XILINX_EMAC 1
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#define CONFIG_SYS_ENET
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#else
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#ifdef XILINX_EMACLITE_BASEADDR
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#define CONFIG_XILINX_EMACLITE 1
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#define CONFIG_SYS_ENET
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#endif
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#define CONFIG_XILINX_EMAC 1
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#define CONFIG_SYS_ENET
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#elif XILINX_EMACLITE_BASEADDR
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#define CONFIG_XILINX_EMACLITE 1
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#define CONFIG_SYS_ENET
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#elif XILINX_LLTEMAC_BASEADDR
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#define CONFIG_XILINX_LL_TEMAC 1
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#define CONFIG_SYS_ENET
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#endif
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#undef ET_DEBUG
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/* gpio */
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#ifdef XILINX_GPIO_BASEADDR
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#define CONFIG_SYS_GPIO_0 1
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#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
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#define CONFIG_SYS_GPIO_0 1
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#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
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#endif
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/* interrupt controller */
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#ifdef XILINX_INTC_BASEADDR
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#define CONFIG_SYS_INTC_0 1
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#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
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#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
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#define CONFIG_SYS_INTC_0 1
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#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
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#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
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#endif
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/* timer */
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#ifdef XILINX_TIMER_BASEADDR
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#if (XILINX_TIMER_IRQ != -1)
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#define CONFIG_SYS_TIMER_0 1
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#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
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#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
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#define FREQUENCE XILINX_CLOCK_FREQ
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#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
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#endif
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#if (XILINX_TIMER_IRQ != -1)
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#define CONFIG_SYS_TIMER_0 1
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#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
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#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
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#define FREQUENCE XILINX_CLOCK_FREQ
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#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
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#endif
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#elif XILINX_CLOCK_FREQ
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#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
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#else
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#ifdef XILINX_CLOCK_FREQ
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#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
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#else
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#error BAD CLOCK FREQ
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#endif
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#error BAD CLOCK FREQ
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#endif
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/* FSL */
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/* #define CONFIG_SYS_FSL_2 */
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@ -159,7 +161,7 @@
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#define CONFIG_FLASH_CFI_DRIVER 1
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#define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
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#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
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#define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
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#ifdef RAMENV
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@ -169,9 +171,9 @@
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#else /* !RAMENV */
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#define CONFIG_ENV_IS_IN_FLASH 1
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#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
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#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
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#define CONFIG_ENV_SIZE 0x40000
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#define CONFIG_ENV_SIZE 0x20000
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#endif /* !RAMBOOT */
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#else /* !FLASH */
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/* ENV in RAM */
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@ -209,6 +211,7 @@
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_MFSL
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#define CONFIG_CMD_ECHO
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#ifndef CONFIG_SYS_ENET
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#undef CONFIG_CMD_NET
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@ -232,7 +235,9 @@
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#define CONFIG_CMD_SAVES
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#endif
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#else
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_JFFS2
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#endif
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#if defined(CONFIG_CMD_JFFS2)
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@ -252,11 +257,11 @@
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
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#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */
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#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */
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#define CONFIG_BOOTDELAY 30
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#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
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#define CONFIG_BOOTARGS "root=romfs"
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#define CONFIG_HOSTNAME "ml401"
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#define CONFIG_HOSTNAME XILINX_BOARD_NAME
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#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
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#define CONFIG_IPADDR 192.168.0.3
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#define CONFIG_SERVERIP 192.168.0.5
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@ -267,7 +272,7 @@
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#define CONFIG_SYS_USR_EXCEP /* user exception */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
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#define CONFIG_PREBOOT "echo U-BOOT for $(hostname);setenv preboot;echo"
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#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
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"nor0=ml401-0\0"\
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