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Move DECLARE_GLOBAL_DATA_PTR to file scope 

It can be optimised out by the compiler otherwise resulting
in obscure errors like a board not booting.

This has been documented in README since 2006 when these were
first fixed up for GCC 4.x.

Signed-off-by: John Rigby <john.rigby@linaro.org>

Fix some additional places.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
This commit is contained in:
John Rigby 2010-12-20 18:27:51 -07:00 committed by Wolfgang Denk
parent 71aab09b2c
commit 2956532625
32 changed files with 65 additions and 63 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/cpu/armv7/mx5/speed.c
View File

@ -28,10 +28,12 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#ifdef CONFIG_FSL_ESDHC
DECLARE_GLOBAL_DATA_PTR;
#endif
int get_clocks(void)
{
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_FSL_ESDHC
gd->sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
#endif

3
arch/blackfin/cpu/serial.c
View File

@ -42,6 +42,8 @@
#include <asm/blackfin.h>
#include <asm/mach-common/bits/uart.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_UART_CONSOLE
#include "serial.h"
@ -95,7 +97,6 @@ void serial_set_baud(uint32_t baud)
*/
void serial_setbrg(void)
{
DECLARE_GLOBAL_DATA_PTR;
serial_set_baud(gd->baudrate);
}

3
arch/m68k/cpu/mcf52x2/cpu.c
View File

@ -74,8 +74,7 @@ int watchdog_disable(void)
{
volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
wdt->sr = 0x5555; /* reset watchdog counteDECLARE_GLOBAL_DATA_PTR;
r */
wdt->sr = 0x5555; /* reset watchdog counter */
wdt->sr = 0xAAAA;
wdt->cr = 0; /* disable watchdog timer */

4
arch/m68k/cpu/mcf547x_8x/speed.c
View File

@ -30,13 +30,13 @@
#include <asm/immap.h>
DECLARE_GLOBAL_DATA_PTR;
/*
* get_clocks() fills in gd->cpu_clock and gd->bus_clk
*/
int get_clocks(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bus_clk = CONFIG_SYS_CLK;
gd->cpu_clk = (gd->bus_clk * 2);

7
arch/sh/lib/board.c
View File

@ -32,6 +32,8 @@
#include <miiphy.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
extern int cpu_init(void);
extern int board_init(void);
extern int dram_init(void);
@ -43,8 +45,6 @@ unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
static int sh_flash_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_flashsize = flash_init();
printf("FLASH: %ldMB\n", gd->bd->bi_flashsize / (1024*1024));
@ -99,7 +99,6 @@ static int sh_mem_env_init(void)
#if defined(CONFIG_CMD_NET)
static int sh_net_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr");
return 0;
}
@ -139,8 +138,6 @@ init_fnc_t *init_sequence[] =
void sh_generic_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
bd_t *bd;
init_fnc_t **init_fnc_ptr;

4
board/espt/espt.c
View File

@ -24,6 +24,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
puts("BOARD: ESPT-GIGA\n");
@ -37,8 +39,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/isee/igep0020/igep0020.c
View File

@ -32,6 +32,8 @@
#include <asm/mach-types.h>
#include "igep0020.h"
DECLARE_GLOBAL_DATA_PTR;
/* GPMC definitions for LAN9221 chips */
static const u32 gpmc_lan_config[] = {
NET_LAN9221_GPMC_CONFIG1,
@ -48,8 +50,6 @@ static const u32 gpmc_lan_config[] = {
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_IGEP0020;

4
board/isee/igep0030/igep0030.c
View File

@ -30,14 +30,14 @@
#include <asm/mach-types.h>
#include "igep0030.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_IGEP0030;

3
board/linkstation/linkstation.c
View File

@ -32,11 +32,12 @@
#include <pci.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
extern void init_AVR_DUART(void);
int checkboard (void)
{
DECLARE_GLOBAL_DATA_PTR;
char *p;
bd_t *bd = gd->bd;

4
board/logicpd/zoom1/zoom1.c
View File

@ -39,14 +39,14 @@
#include <asm/mach-types.h>
#include "zoom1.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* Routine: board_init
* Description: Early hardware init.
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_LDP;

3
board/logicpd/zoom2/zoom2.c
View File

@ -43,6 +43,8 @@
#include "zoom2.h"
#include "zoom2_serial.h"
DECLARE_GLOBAL_DATA_PTR;
/*
* This the the zoom2, board specific, gpmc configuration for the
* quad uart on the debug board. The more general gpmc configurations
@ -120,7 +122,6 @@ void zoom2_identify(void)
*/
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
u32 *gpmc_config;
gpmc_init (); /* in SRAM or SDRAM, finish GPMC */

4
board/mpr2/mpr2.c
View File

@ -24,6 +24,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
puts("BOARD: MPR2\n");
@ -152,8 +154,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("SDRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/ms7720se/ms7720se.c
View File

@ -30,6 +30,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
#define LED_BASE 0xB0800000
int checkboard(void)
@ -45,8 +47,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/ms7722se/ms7722se.c
View File

@ -28,6 +28,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
#define LED_BASE 0xB0800000
int checkboard(void)
@ -46,8 +48,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/ms7750se/ms7750se.c
View File

@ -24,6 +24,8 @@
#include <common.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
puts("BOARD: SH7750/SH7750S/SH7750R Solution Engine\n");
@ -37,8 +39,6 @@ int board_init(void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/overo/overo.c
View File

@ -40,6 +40,8 @@
#include <asm/mach-types.h>
#include "overo.h"
DECLARE_GLOBAL_DATA_PTR;
#define TWL4030_I2C_BUS 0
#define EXPANSION_EEPROM_I2C_BUS 2
#define EXPANSION_EEPROM_I2C_ADDRESS 0x51
@ -87,8 +89,6 @@ static const u32 gpmc_lan_config[] = {
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OVERO;

4
board/pandora/pandora.c
View File

@ -37,6 +37,8 @@
#include <asm/mach-types.h>
#include "pandora.h"
DECLARE_GLOBAL_DATA_PTR;
#define TWL4030_BB_CFG_BBCHEN (1 << 4)
#define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2)
#define TWL4030_BB_CFG_BBISEL_500UA 2
@ -47,8 +49,6 @@
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;

4
board/renesas/MigoR/migo_r.c
View File

@ -28,6 +28,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
puts("BOARD: Renesas MigoR\n");
@ -41,8 +43,6 @@ int board_init(void)
int dram_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/renesas/ap325rxa/ap325rxa.c
View File

@ -23,6 +23,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
/* PRI control register */
#define PRPRICR5 0xFF800048 /* LMB */
#define PRPRICR5_D 0x2a
@ -143,8 +145,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/renesas/r2dplus/r2dplus.c
View File

@ -28,6 +28,8 @@
#include <asm/io.h>
#include <asm/pci.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
puts("BOARD: Renesas Solutions R2D Plus\n");
@ -41,8 +43,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/renesas/r7780mp/r7780mp.c
View File

@ -26,6 +26,8 @@
#include <netdev.h>
#include "r7780mp.h"
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
#if defined(CONFIG_R7780MP)
@ -46,8 +48,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/renesas/rsk7203/rsk7203.c
View File

@ -26,6 +26,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
puts("BOARD: Renesas Technology RSK7203\n");
@ -39,8 +41,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/renesas/sh7763rdp/sh7763rdp.c
View File

@ -25,6 +25,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
#define CPU_CMDREG 0xB1000006
#define PDCR 0xffef0006
#define PECR 0xffef0008
@ -64,8 +66,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

4
board/renesas/sh7785lcr/sh7785lcr.c
View File

@ -23,6 +23,8 @@
#include <asm/pci.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
puts("BOARD: Renesas Technology Corp. R0P7785LC0011RL\n");
@ -36,8 +38,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));

6
board/samsung/smdk6400/smdk6400.c
View File

@ -32,6 +32,8 @@
#include <netdev.h>
#include <asm/arch/s3c6400.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
#define CS8900_Tacs 0x0 /* 0clk address set-up */
#define CS8900_Tcos 0x4 /* 4clk chip selection set-up */
@ -63,8 +65,6 @@ static void cs8900_pre_init(void)
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
cs8900_pre_init();
/* NOR-flash in SROM0 */
@ -80,8 +80,6 @@ int board_init(void)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

4
board/ti/beagle/beagle.c
View File

@ -51,6 +51,8 @@
#define BEAGLE_NO_EEPROM 0xffffffff
DECLARE_GLOBAL_DATA_PTR;
static struct {
unsigned int device_vendor;
unsigned char revision;
@ -66,8 +68,6 @@ static struct {
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;

4
board/ti/evm/evm.c
View File

@ -37,6 +37,8 @@
#include <asm/mach-types.h>
#include "evm.h"
DECLARE_GLOBAL_DATA_PTR;
static u32 omap3_evm_version;
u32 get_omap3_evm_rev(void)
@ -103,8 +105,6 @@ u8 omap3_evm_need_extvbus(void)
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;

4
board/ti/sdp3430/sdp.c
View File

@ -31,6 +31,8 @@
#include <asm/mach-types.h>
#include "sdp.h"
DECLARE_GLOBAL_DATA_PTR;
const omap3_sysinfo sysinfo = {
DDR_DISCRETE,
"OMAP3 SDP3430 board",
@ -101,8 +103,6 @@ extern struct gpmc *gpmc_cfg;
*/
int board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* TODO: Dynamically pop out CS mapping and program accordingly */
/* Configure devices for default ON ON ON settings */

3
drivers/i2c/omap24xx_i2c.c
View File

@ -27,6 +27,8 @@
#include "omap24xx_i2c.h"
DECLARE_GLOBAL_DATA_PTR;
#define I2C_TIMEOUT 1000
static void wait_for_bb (void);
@ -40,7 +42,6 @@ static unsigned int current_bus;
void i2c_init (int speed, int slaveadd)
{
DECLARE_GLOBAL_DATA_PTR;
int psc, fsscll, fssclh;
int hsscll = 0, hssclh = 0;
u32 scll, sclh;

3
drivers/serial/s3c64xx.c
View File

@ -25,6 +25,8 @@
#include <asm/arch/s3c6400.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SERIAL1
#define UART_NR S3C64XX_UART0
@ -68,7 +70,6 @@ static const int udivslot[] = {
void serial_setbrg(void)
{
DECLARE_GLOBAL_DATA_PTR;
s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
u32 pclk = get_PCLK();
u32 baudrate = gd->baudrate;

3
drivers/serial/serial_s5p.c
View File

@ -27,6 +27,8 @@
#include <asm/arch/clk.h>
#include <serial.h>
DECLARE_GLOBAL_DATA_PTR;
static inline struct s5p_uart *s5p_get_base_uart(int dev_index)
{
u32 offset = dev_index * sizeof(struct s5p_uart);
@ -61,7 +63,6 @@ static const int udivslot[] = {
void serial_setbrg_dev(const int dev_index)
{
DECLARE_GLOBAL_DATA_PTR;
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
u32 uclk = get_uart_clk(dev_index);
u32 baudrate = gd->baudrate;

4
drivers/serial/serial_sh.c
View File

@ -21,6 +21,8 @@
#include <asm/io.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_CONS_SCIF0)
# define SCIF_BASE SCIF0_BASE
#elif defined(CONFIG_CONS_SCIF1)
@ -131,8 +133,6 @@
void serial_setbrg(void)
{
DECLARE_GLOBAL_DATA_PTR;
writeb(SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ), SCBRR);
}