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sbc8548: allow enabling PCI via a make config option 

Prior to this commit, to enable PCI, you had to go manually
edit the board config header, and if you had 33MHz PCI, you
had to manually change CONFIG_SYS_NS16550_CLK too, which was
not real user friendly,

This adds the typical PCI and clock speed make targets to the
toplevel Makefile in accordance with what is being done with
other boards (i.e. using the "-t" to mkconfig).

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Paul Gortmaker 2009-09-20 20:36:06 -04:00 committed by Kumar Gala
parent fdc7eb90b5
commit 2738bc8df6
3 changed files with 43 additions and 12 deletions
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4
MAKEALL
View File

@ -399,6 +399,10 @@ LIST_85xx=" \
PM856 \
sbc8540 \
sbc8548 \
sbc8548_PCI_33 \
sbc8548_PCI_66 \
sbc8548_PCI_33_PCIE \
sbc8548_PCI_66_PCIE \
sbc8560 \
socrates \
stxgp3 \

8
Makefile
View File

@ -2544,8 +2544,12 @@ sbc8540_66_config: unconfig
fi
@$(MKCONFIG) -a SBC8540 ppc mpc85xx sbc8560
sbc8548_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx sbc8548
sbc8548_config \
sbc8548_PCI_33_config \
sbc8548_PCI_66_config \
sbc8548_PCI_33_PCIE_config \
sbc8548_PCI_66_PCIE_config: unconfig
@$(MKCONFIG) -t $(@:_config=) sbc8548 ppc mpc85xx sbc8548
sbc8560_config \
sbc8560_33_config \

43
include/configs/sbc8548.h
View File

@ -1,5 +1,5 @@
/*
* Copyright 2007 Wind River Systems <www.windriver.com>
* Copyright 2007,2009 Wind River Systems <www.windriver.com>
* Copyright 2007 Embedded Specialties, Inc.
* Copyright 2004, 2007 Freescale Semiconductor.
*
@ -24,23 +24,40 @@
/*
* sbc8548 board configuration file
*
* Please refer to doc/README.sbc85xx for more info.
*
* Please refer to doc/README.sbc8548 for more info.
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/* High Level Configuration Options */
/*
* Top level Makefile configuration choices
*/
#ifdef CONFIG_MK_PCI
#define CONFIG_PCI
#define CONFIG_PCI1
#endif
#ifdef CONFIG_MK_66
#define CONFIG_SYS_CLK_DIV 1
#endif
#ifdef CONFIG_MK_33
#define CONFIG_SYS_CLK_DIV 2
#endif
#ifdef CONFIG_MK_PCIE
#define CONFIG_PCIE1
#endif
/*
* High Level Configuration Options
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_SBC8548 1 /* SBC8548 board specific */
#undef CONFIG_PCI /* enable any pci type devices */
#undef CONFIG_PCI1 /* PCI controller 1 */
#undef CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
#undef CONFIG_RIO
#ifdef CONFIG_PCI
@ -58,7 +75,13 @@
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_SYS_CLK_FREQ 66000000 /* SBC8548 default SYSCLK */
/*
* Below assumes that CCB:SYSCLK remains unchanged at 6:1 via SW2:[1-4]
*/
#ifndef CONFIG_SYS_CLK_DIV
#define CONFIG_SYS_CLK_DIV 1 /* 2, if 33MHz PCI card installed */
#endif
#define CONFIG_SYS_CLK_FREQ (66000000 / CONFIG_SYS_CLK_DIV)
/*
* These can be toggled for performance analysis, otherwise use default.
@ -316,7 +339,7 @@
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK 400000000 /* get_bus_freq(0) */
#define CONFIG_SYS_NS16550_CLK (400000000 / CONFIG_SYS_CLK_DIV)
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}