PXA: Fix ZipitZ2 for Reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This commit is contained in:
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720a650caa
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@ -29,17 +29,15 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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LIB = $(obj)lib$(BOARD).a
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COBJS := zipitz2.o
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COBJS := zipitz2.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(LIB): $(obj).depend $(OBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS)
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clean:
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clean:
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rm -f $(SOBJS) $(OBJS)
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rm -f $(OBJS)
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distclean: clean
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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rm -f $(LIB) core *.bak $(obj).depend
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@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0xa1000000
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@ -1,40 +0,0 @@
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/*
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* Aeronix Zipit Z2 Lowlevel Hardware Initialization
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*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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*
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <version.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/macro.h>
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.globl lowlevel_init
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lowlevel_init:
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pxa_gpio_setup
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pxa_wait_ticks 0x8000
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pxa_mem_setup
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pxa_wakeup
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pxa_intr_setup
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pxa_clock_setup
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mov pc, lr
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@ -44,10 +44,11 @@ inline void lcd_start(void) {};
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int board_init (void)
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int board_init (void)
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{
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{
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/* memory and cpu-speed are setup before relocation */
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/* We have RAM, disable cache */
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/* so we do _nothing_ here */
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dcache_disable();
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icache_disable();
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/* arch number of Lubbock-Board */
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/* arch number of Z2 */
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gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
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gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
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/* adress of boot parameters */
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/* adress of boot parameters */
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@ -59,24 +60,23 @@ int board_init (void)
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return 0;
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return 0;
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}
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}
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int board_late_init(void)
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{
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setenv("stdout", "serial");
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setenv("stderr", "serial");
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return 0;
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}
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struct serial_device *default_serial_console (void)
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struct serial_device *default_serial_console (void)
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{
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{
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return &serial_stuart_device;
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return &serial_stuart_device;
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}
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}
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int dram_init (void)
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extern void pxa_dram_init(void);
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int dram_init(void)
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{
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pxa_dram_init();
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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void dram_init_banksize(void)
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{
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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}
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#ifdef CONFIG_CMD_SPI
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#ifdef CONFIG_CMD_SPI
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@ -41,8 +41,9 @@
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#define CONFIG_ENV_ADDR 0x40000
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#define CONFIG_ENV_ADDR 0x40000
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#define CONFIG_ENV_SIZE 0x20000
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#define CONFIG_ENV_SIZE 0x20000
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_STACKSIZE)
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#define CONFIG_SYS_MALLOC_LEN (128*1024)
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#define CONFIG_SYS_GBL_DATA_SIZE 512
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#define CONFIG_SYS_GBL_DATA_SIZE 512
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_BOOTCOMMAND \
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#define CONFIG_BOOTCOMMAND \
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"if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \
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"if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \
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@ -56,7 +57,7 @@
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#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
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#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_SYS_TEXT_BASE 0x0
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#define CONFIG_LZMA /* LZMA compression support */
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#define CONFIG_LZMA /* LZMA compression support */
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/*
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/*
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@ -176,7 +177,7 @@ unsigned char zipitz2_spi_read(void);
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
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/*
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/*
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* NOR FLASH
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* NOR FLASH
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@ -221,7 +222,7 @@ unsigned char zipitz2_spi_read(void);
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#define CONFIG_SYS_GPCR3_VAL 0x00000000
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#define CONFIG_SYS_GPCR3_VAL 0x00000000
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#define CONFIG_SYS_GPDR0_VAL 0xdafcee00
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#define CONFIG_SYS_GPDR0_VAL 0xdafcee00
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#define CONFIG_SYS_GPDR1_VAL 0xffa3aaab
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#define CONFIG_SYS_GPDR1_VAL 0xffa3aaab
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#define CONFIG_SYS_GPDR2_VAL 0x8fe1ffff
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#define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff
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#define CONFIG_SYS_GPDR3_VAL 0x001b1f8a
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#define CONFIG_SYS_GPDR3_VAL 0x001b1f8a
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#define CONFIG_SYS_GPSR0_VAL 0x06080400
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#define CONFIG_SYS_GPSR0_VAL 0x06080400
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#define CONFIG_SYS_GPSR1_VAL 0x007f0000
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#define CONFIG_SYS_GPSR1_VAL 0x007f0000
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