AT91: MCI: add SD/MMC driver using mmc framework
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
This commit is contained in:
Reinhard Meyer
parent
c982d866ea
commit
1592ef8596
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@ -194,3 +194,24 @@ void at91_macb_hw_init(void)
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#endif
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}
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#endif
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#if defined(CONFIG_ATMEL_MCI) || defined(CONFIG_GENERIC_ATMEL_MCI)
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void at91_mci_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTA, 8, 1); /* MCCK */
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#if defined(CONFIG_ATMEL_MCI_PORTB)
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at91_set_b_periph(AT91_PIO_PORTA, 1, 1); /* MCCDB */
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at91_set_b_periph(AT91_PIO_PORTA, 0, 1); /* MCDB0 */
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at91_set_b_periph(AT91_PIO_PORTA, 5, 1); /* MCDB1 */
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at91_set_b_periph(AT91_PIO_PORTA, 4, 1); /* MCDB2 */
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at91_set_b_periph(AT91_PIO_PORTA, 3, 1); /* MCDB3 */
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#else
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at91_set_a_periph(AT91_PIO_PORTA, 7, 1); /* MCCDA */
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at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* MCDA0 */
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at91_set_a_periph(AT91_PIO_PORTA, 9, 1); /* MCDA1 */
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at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* MCDA2 */
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at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* MCDA3 */
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#endif
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}
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#endif
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@ -27,6 +27,7 @@
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void at91_can_hw_init(void);
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void at91_macb_hw_init(void);
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void at91_mci_hw_init(void);
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void at91_serial_hw_init(void);
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void at91_serial0_hw_init(void);
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void at91_serial1_hw_init(void);
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@ -59,5 +59,10 @@ static inline unsigned long get_twi_clk_rate(unsigned int dev_id)
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return get_mck_clk_rate();
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}
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static inline unsigned long get_mci_clk_rate(void)
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{
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return get_mck_clk_rate();
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}
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int at91_clock_init(unsigned long main_clock);
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#endif /* __ASM_ARM_ARCH_CLK_H__ */
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@ -20,6 +20,7 @@
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#include <asm/arch-at91/at91rm9200.h>
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#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
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#include <asm/arch/at91sam9260.h>
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#define AT91_BASE_MCI AT91SAM9260_BASE_MCI
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#define AT91_BASE_SPI AT91SAM9260_BASE_SPI0
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#define AT91_ID_UHP AT91SAM9260_ID_UHP
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#define AT91_PMC_UHP AT91SAM926x_PMC_UHP
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@ -0,0 +1,86 @@
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How to use SD/MMC cards with Atmel SoCs having MCI hardware
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-----------------------------------------------------------
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2010-08-16 Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
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This is a new approach to use Atmel MCI hardware with the
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general MMC framework. Therefore it benefits from that
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framework's abilities to handle SDHC Cards and the ability
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to write blocks.
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- AT91SAM9XE512 (tested, will definitely work with XE128 and XE256)
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- AT91SAM9260 (not tested, but MCI is to AT91SAM9XE)
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- AT91SAM9G20 (not tested, should work)
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It should work with all other ATMEL devices that have MCI,
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including AVR32.
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The generic driver does NOT assign port pins to the MCI block
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nor does it start the MCI clock. This has to be handled in a
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board/SoC specific manner before the driver is initialized:
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example: this is added to at91sam9260_devices.c:
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#if defined(CONFIG_ATMEL_MCI) || defined(CONFIG_GENERIC_ATMEL_MCI)
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void at91_mci_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTA, 8, PUP); /* MCCK */
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#if defined(CONFIG_ATMEL_MCI_PORTB)
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at91_set_b_periph(AT91_PIO_PORTA, 1, PUP); /* MCCDB */
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at91_set_b_periph(AT91_PIO_PORTA, 0, PUP); /* MCDB0 */
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at91_set_b_periph(AT91_PIO_PORTA, 5, PUP); /* MCDB1 */
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at91_set_b_periph(AT91_PIO_PORTA, 4, PUP); /* MCDB2 */
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at91_set_b_periph(AT91_PIO_PORTA, 3, PUP); /* MCDB3 */
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#else
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at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* MCCDA */
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at91_set_a_periph(AT91_PIO_PORTA, 6, PUP); /* MCDA0 */
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at91_set_a_periph(AT91_PIO_PORTA, 9, PUP); /* MCDA1 */
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at91_set_a_periph(AT91_PIO_PORTA, 10, PUP); /* MCDA2 */
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at91_set_a_periph(AT91_PIO_PORTA, 11, PUP); /* MCDA3 */
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#endif
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}
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#endif
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the board specific file need added:
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...
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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# include <mmc.h>
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#endif
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...
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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/* this is a weak define that we are overriding */
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int board_mmc_init(bd_t *bd)
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{
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/* Enable clock */
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI);
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at91_mci_hw_init();
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/* This calls the atmel_mci_init in gen_atmel_mci.c */
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return atmel_mci_init((void *)AT91_BASE_MCI);
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}
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/* this is a weak define that we are overriding */
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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{
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/*
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* the only currently existing use of this function
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* (fsl_esdhc.c) suggests this function must return
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* *cs = TRUE if a card is NOT detected -> in most
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* cases the value of the pin when the detect switch
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* closes to GND
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*/
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*cd = at91_get_gpio_value (CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
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return 0;
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}
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#endif
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and the board definition files needs:
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/* SD/MMC card */
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#define CONFIG_MMC 1
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#define CONFIG_GENERIC_MMC 1
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#define CONFIG_GENERIC_ATMEL_MCI 1
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#define CONFIG_ATMEL_MCI_PORTB 1 /* Atmel XE-EK uses port B */
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#define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9
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#define CONFIG_CMD_MMC 1
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@ -25,12 +25,13 @@ include $(TOPDIR)/config.mk
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LIB := $(obj)libmmc.a
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COBJS-$(CONFIG_GENERIC_MMC) += mmc.o
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COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o
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COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o
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COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o
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COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
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COBJS-$(CONFIG_GENERIC_MMC) += mmc.o
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COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
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COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o
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COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o
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COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o
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COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o
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@ -22,7 +22,45 @@
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#ifndef __CPU_AT32AP_ATMEL_MCI_H__
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#define __CPU_AT32AP_ATMEL_MCI_H__
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/* Atmel MultiMedia Card Interface (MCI) registers */
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#ifndef __ASSEMBLY__
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/*
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* Structure for struct SoC access.
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* Names starting with '_' are fillers.
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*/
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typedef struct atmel_mci {
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/* reg Offset */
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u32 cr; /* 0x00 */
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u32 mr; /* 0x04 */
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u32 dtor; /* 0x08 */
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u32 sdcr; /* 0x0c */
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u32 argr; /* 0x10 */
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u32 cmdr; /* 0x14 */
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u32 _18; /* 0x18 */
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u32 _1c; /* 0x1c */
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u32 rspr; /* 0x20 */
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u32 rspr1; /* 0x24 */
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u32 rspr2; /* 0x28 */
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u32 rspr3; /* 0x2c */
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u32 rdr; /* 0x30 */
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u32 tdr; /* 0x34 */
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u32 _38; /* 0x38 */
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u32 _3c; /* 0x3c */
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u32 sr; /* 0x40 */
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u32 ier; /* 0x44 */
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u32 idr; /* 0x48 */
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u32 imr; /* 0x4c */
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} atmel_mci_t;
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#endif /* __ASSEMBLY__ */
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/*
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* NOTICE: Use of registers offsets is depreciated.
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* These defines will be removed once the old driver
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* is taken out of commision.
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*
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* Atmel MultiMedia Card Interface (MCI) registers
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*/
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#define MMCI_CR 0x0000
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#define MMCI_MR 0x0004
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#define MMCI_DTOR 0x0008
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@ -192,7 +230,13 @@
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<< MMCI_##name##_OFFSET)) \
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| MMCI_BF(name,value))
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/* Register access macros */
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/*
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* NOTICE: Use of registers offsets is depreciated.
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* These defines will be removed once the old driver
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* is taken out of commision.
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*
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* Register access macros
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*/
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#define mmci_readl(reg) \
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readl((void *)MMCI_BASE + MMCI_##reg)
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#define mmci_writel(reg,value) \
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@ -0,0 +1,353 @@
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/*
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* Copyright (C) 2010
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* Rob Emanuele <rob@emanuele.us>
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* Reinhard Meyer, EMK Elektronik <reinhard.meyer@emk-elektronik.de>
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*
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* Original Driver:
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mmc.h>
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#include <part.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/byteorder.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/memory-map.h>
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#include "atmel_mci.h"
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#ifndef CONFIG_SYS_MMC_CLK_OD
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# define CONFIG_SYS_MMC_CLK_OD 150000
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#endif
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#define MMC_DEFAULT_BLKLEN 512
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#if defined(CONFIG_ATMEL_MCI_PORTB)
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# define MCI_BUS 1
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#else
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# define MCI_BUS 0
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#endif
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static int initialized = 0;
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/*
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* Print command and status:
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*
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* - always when DEBUG is defined
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* - on command errors
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*/
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static void dump_cmd(u32 cmdr, u32 arg, u32 status, const char* msg)
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{
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printf("gen_atmel_mci: CMDR %08x (%2u) ARGR %08x (SR: %08x) %s\n",
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cmdr, cmdr&0x3F, arg, status, msg);
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}
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/* Setup for MCI Clock and Block Size */
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static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
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{
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atmel_mci_t *mci = (atmel_mci_t *)mmc->priv;
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u32 bus_hz = get_mci_clk_rate();
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u32 clkdiv = 255;
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debug("mci: bus_hz is %u, setting clock %u Hz, block size %u\n",
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bus_hz, hz, blklen);
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if (hz > 0) {
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/* find lowest clkdiv yielding a rate <= than requested */
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for (clkdiv=0; clkdiv<255; clkdiv++) {
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if ((bus_hz / (clkdiv+1) / 2) <= hz)
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break;
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}
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}
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printf("mci: setting clock %u Hz, block size %u\n",
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(bus_hz / (clkdiv+1)) / 2, blklen);
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blklen &= 0xfffc;
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/* On some platforms RDPROOF and WRPROOF are ignored */
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writel((MMCI_BF(CLKDIV, clkdiv)
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| MMCI_BF(BLKLEN, blklen)
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| MMCI_BIT(RDPROOF)
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| MMCI_BIT(WRPROOF)), &mci->mr);
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initialized = 1;
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}
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/* Return the CMDR with flags for a given command and data packet */
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static u32 mci_encode_cmd(
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struct mmc_cmd *cmd, struct mmc_data *data, u32* error_flags)
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{
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u32 cmdr = 0;
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/* Default Flags for Errors */
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*error_flags |= (MMCI_BIT(DTOE) | MMCI_BIT(RDIRE) | MMCI_BIT(RENDE) |
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MMCI_BIT(RINDE) | MMCI_BIT(RTOE));
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/* Default Flags for the Command */
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cmdr |= MMCI_BIT(MAXLAT);
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if (data) {
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cmdr |= MMCI_BF(TRCMD, 1);
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if (data->blocks > 1)
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cmdr |= MMCI_BF(TRTYP, 1);
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if (data->flags & MMC_DATA_READ)
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cmdr |= MMCI_BIT(TRDIR);
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}
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if (cmd->resp_type & MMC_RSP_CRC)
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*error_flags |= MMCI_BIT(RCRCE);
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if (cmd->resp_type & MMC_RSP_136)
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cmdr |= MMCI_BF(RSPTYP, 2);
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else if (cmd->resp_type & MMC_RSP_BUSY)
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cmdr |= MMCI_BF(RSPTYP, 3);
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else if (cmd->resp_type & MMC_RSP_PRESENT)
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cmdr |= MMCI_BF(RSPTYP, 1);
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return cmdr | MMCI_BF(CMDNB, cmd->cmdidx);
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}
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/* Entered into function pointer in mci_send_cmd */
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static u32 mci_data_read(atmel_mci_t *mci, u32* data, u32 error_flags)
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{
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u32 status;
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do {
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status = readl(&mci->sr);
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if (status & (error_flags | MMCI_BIT(OVRE)))
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goto io_fail;
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} while (!(status & MMCI_BIT(RXRDY)));
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if (status & MMCI_BIT(RXRDY)) {
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*data = readl(&mci->rdr);
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status = 0;
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}
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io_fail:
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return status;
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}
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/* Entered into function pointer in mci_send_cmd */
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static u32 mci_data_write(atmel_mci_t *mci, u32* data, u32 error_flags)
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{
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u32 status;
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do {
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status = readl(&mci->sr);
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if (status & (error_flags | MMCI_BIT(UNRE)))
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goto io_fail;
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} while (!(status & MMCI_BIT(TXRDY)));
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if (status & MMCI_BIT(TXRDY)) {
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writel(*data, &mci->tdr);
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status = 0;
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}
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io_fail:
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return status;
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}
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/*
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* Entered into mmc structure during driver init
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*
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* Sends a command out on the bus and deals with the block data.
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* Takes the mmc pointer, a command pointer, and an optional data pointer.
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*/
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static int
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mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
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{
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atmel_mci_t *mci = (atmel_mci_t *)mmc->priv;
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u32 cmdr;
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u32 error_flags = 0;
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u32 status;
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if (!initialized) {
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puts ("MCI not initialized!\n");
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return COMM_ERR;
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}
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/* Figure out the transfer arguments */
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cmdr = mci_encode_cmd(cmd, data, &error_flags);
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/* Send the command */
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writel(cmd->cmdarg, &mci->argr);
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writel(cmdr, &mci->cmdr);
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#ifdef DEBUG
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dump_cmd(cmdr, cmd->cmdarg, 0, "DEBUG");
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#endif
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/* Wait for the command to complete */
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while (!((status = readl(&mci->sr)) & MMCI_BIT(CMDRDY)));
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if (status & error_flags) {
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dump_cmd(cmdr, cmd->cmdarg, status, "Command Failed");
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return COMM_ERR;
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}
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/* Copy the response to the response buffer */
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if (cmd->resp_type & MMC_RSP_136) {
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cmd->response[0] = readl(&mci->rspr);
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cmd->response[1] = readl(&mci->rspr1);
|
||||
cmd->response[2] = readl(&mci->rspr2);
|
||||
cmd->response[3] = readl(&mci->rspr3);
|
||||
} else
|
||||
cmd->response[0] = readl(&mci->rspr);
|
||||
|
||||
/* transfer all of the blocks */
|
||||
if (data) {
|
||||
u32 word_count, block_count;
|
||||
u32* ioptr;
|
||||
u32 sys_blocksize, dummy, i;
|
||||
u32 (*mci_data_op)
|
||||
(atmel_mci_t *mci, u32* data, u32 error_flags);
|
||||
|
||||
if (data->flags & MMC_DATA_READ) {
|
||||
mci_data_op = mci_data_read;
|
||||
sys_blocksize = mmc->read_bl_len;
|
||||
ioptr = (u32*)data->dest;
|
||||
} else {
|
||||
mci_data_op = mci_data_write;
|
||||
sys_blocksize = mmc->write_bl_len;
|
||||
ioptr = (u32*)data->src;
|
||||
}
|
||||
|
||||
status = 0;
|
||||
for (block_count = 0;
|
||||
block_count < data->blocks && !status;
|
||||
block_count++) {
|
||||
word_count = 0;
|
||||
do {
|
||||
status = mci_data_op(mci, ioptr, error_flags);
|
||||
word_count++;
|
||||
ioptr++;
|
||||
} while (!status && word_count < (data->blocksize/4));
|
||||
#ifdef DEBUG
|
||||
if (data->flags & MMC_DATA_READ)
|
||||
{
|
||||
printf("Read Data:\n");
|
||||
print_buffer(0, data->dest, 1,
|
||||
word_count*4, 0);
|
||||
}
|
||||
#endif
|
||||
#ifdef DEBUG
|
||||
if (!status && word_count < (sys_blocksize / 4))
|
||||
printf("filling rest of block...\n");
|
||||
#endif
|
||||
/* fill the rest of a full block */
|
||||
while (!status && word_count < (sys_blocksize / 4)) {
|
||||
status = mci_data_op(mci, &dummy,
|
||||
error_flags);
|
||||
word_count++;
|
||||
}
|
||||
if (status) {
|
||||
dump_cmd(cmdr, cmd->cmdarg, status,
|
||||
"Data Transfer Failed");
|
||||
return COMM_ERR;
|
||||
}
|
||||
}
|
||||
|
||||
/* Wait for Transfer End */
|
||||
i = 0;
|
||||
do {
|
||||
status = readl(&mci->sr);
|
||||
|
||||
if (status & error_flags) {
|
||||
dump_cmd(cmdr, cmd->cmdarg, status,
|
||||
"DTIP Wait Failed");
|
||||
return COMM_ERR;
|
||||
}
|
||||
i++;
|
||||
} while ((status & MMCI_BIT(DTIP)) && i < 10000);
|
||||
if (status & MMCI_BIT(DTIP)) {
|
||||
dump_cmd(cmdr, cmd->cmdarg, status,
|
||||
"XFER DTIP never unset, ignoring");
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Entered into mmc structure during driver init */
|
||||
static void mci_set_ios(struct mmc *mmc)
|
||||
{
|
||||
atmel_mci_t *mci = (atmel_mci_t *)mmc->priv;
|
||||
int busw = (mmc->bus_width == 4) ? 1 : 0;
|
||||
|
||||
/* Set the clock speed */
|
||||
mci_set_mode(mmc, mmc->clock, MMC_DEFAULT_BLKLEN);
|
||||
|
||||
/*
|
||||
* set the bus width and select slot for this interface
|
||||
* there is no capability for multiple slots on the same interface yet
|
||||
* Bitfield SCDBUS needs to be expanded to 2 bits for 8-bit buses
|
||||
*/
|
||||
writel(MMCI_BF(SCDBUS, busw) | MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr);
|
||||
}
|
||||
|
||||
/* Entered into mmc structure during driver init */
|
||||
static int mci_init(struct mmc *mmc)
|
||||
{
|
||||
atmel_mci_t *mci = (atmel_mci_t *)mmc->priv;
|
||||
|
||||
/* Initialize controller */
|
||||
writel(MMCI_BIT(SWRST), &mci->cr); /* soft reset */
|
||||
writel(MMCI_BIT(PWSDIS), &mci->cr); /* disable power save */
|
||||
writel(MMCI_BIT(MCIEN), &mci->cr); /* enable mci */
|
||||
|
||||
/* Initial Time-outs */
|
||||
writel(0x5f, &mci->dtor);
|
||||
/* Disable Interrupts */
|
||||
writel(~0UL, &mci->idr);
|
||||
|
||||
/* Set default clocks and blocklen */
|
||||
mci_set_mode(mmc, CONFIG_SYS_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is the only exported function
|
||||
*
|
||||
* Call it with the MCI register base address
|
||||
*/
|
||||
int atmel_mci_init(void *regs)
|
||||
{
|
||||
struct mmc *mmc = malloc(sizeof(struct mmc));
|
||||
|
||||
if (!mmc)
|
||||
return -1;
|
||||
strcpy(mmc->name, "mci");
|
||||
mmc->priv = regs;
|
||||
mmc->send_cmd = mci_send_cmd;
|
||||
mmc->set_ios = mci_set_ios;
|
||||
mmc->init = mci_init;
|
||||
|
||||
/* need to be able to pass these in on a board by board basis */
|
||||
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
mmc->host_caps = MMC_MODE_4BIT;
|
||||
/*
|
||||
* min and max frequencies determined by
|
||||
* max and min of clock divider
|
||||
*/
|
||||
mmc->f_min = get_mci_clk_rate() / (2*256);
|
||||
mmc->f_max = get_mci_clk_rate() / (2*1);
|
||||
|
||||
mmc_register(mmc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -179,6 +179,16 @@ struct mmc_cid {
|
|||
char pnm[7];
|
||||
};
|
||||
|
||||
/*
|
||||
* WARNING!
|
||||
*
|
||||
* This structure is used by atmel_mci.c only.
|
||||
* It works for the AVR32 architecture but NOT
|
||||
* for ARM/AT91 architectures.
|
||||
* Its use is highly depreciated.
|
||||
* After the atmel_mci.c driver for AVR32 has
|
||||
* been replaced this structure will be removed.
|
||||
*/
|
||||
struct mmc_csd
|
||||
{
|
||||
u8 csd_structure:2,
|
||||
|
|
@ -275,7 +285,10 @@ int mmc_set_dev(int dev_num);
|
|||
void print_mmc_devices(char separator);
|
||||
int board_mmc_getcd(u8 *cd, struct mmc *mmc);
|
||||
|
||||
#ifndef CONFIG_GENERIC_MMC
|
||||
#ifdef CONFIG_GENERIC_MMC
|
||||
int atmel_mci_init(void *regs);
|
||||
#else
|
||||
int mmc_legacy_init(int verbose);
|
||||
#endif
|
||||
|
||||
#endif /* _MMC_H_ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue