mpc83xx: fix pcie configuration space read/write
This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Leo Liu <liucai.lfn@gmail.com> fix codingstyle and compiler warning: 'pcie_priv' defined but not used Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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@ -48,11 +48,26 @@ static struct {
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#ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
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#ifdef CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
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/* private structure for mpc83xx pcie hose */
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static struct mpc83xx_pcie_priv {
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u8 index;
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} pcie_priv[PCIE_MAX_BUSES] = {
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{
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/* pcie controller 1 */
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.index = 0,
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},
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{
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/* pcie controller 2 */
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.index = 1,
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},
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};
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static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
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static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
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{
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{
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int bus = PCI_BUS(dev) - hose->first_busno;
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int bus = PCI_BUS(dev) - hose->first_busno;
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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pex83xx_t *pex = &immr->pciexp[bus];
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struct mpc83xx_pcie_priv *pcie_priv = hose->priv_data;
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pex83xx_t *pex = &immr->pciexp[pcie_priv->index];
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struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0];
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struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0];
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u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev);
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u8 devfn = PCI_DEV(dev) << 3 | PCI_FUNC(dev);
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u32 dev_base = bus << 24 | devfn << 16;
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u32 dev_base = bus << 24 | devfn << 16;
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@ -142,6 +157,8 @@ static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
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hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
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hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
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hose->priv_data = &pcie_priv[bus];
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pci_set_ops(hose,
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pci_set_ops(hose,
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pcie_read_config_byte,
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pcie_read_config_byte,
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pcie_read_config_word,
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pcie_read_config_word,
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@ -420,6 +420,8 @@ struct pci_controller {
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/* Used by ppc405 autoconfig*/
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/* Used by ppc405 autoconfig*/
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struct pci_region *pci_fb;
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struct pci_region *pci_fb;
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int current_busno;
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int current_busno;
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void *priv_data;
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};
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};
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extern __inline__ void pci_set_ops(struct pci_controller *hose,
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extern __inline__ void pci_set_ops(struct pci_controller *hose,
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