phone-side
/
uboot-mt623x
9
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

i2c: Update references to individual i2c commands 

The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop,
and isdram are no longer available so all references to them have been
updated to the new form of "i2c <cmd>".

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This commit is contained in:
Peter Tyser 2009-04-18 22:34:03 -05:00 committed by Wolfgang Denk
parent d48eb5131d
commit 0f89c54be9
14 changed files with 42 additions and 78 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
README
View File

@ -1430,9 +1430,9 @@ The following options need to be configured:
CONFIG_SYS_I2C_NOPROBES
This option specifies a list of I2C devices that will be skipped
when the 'i2c probe' command is issued (or 'iprobe' using the legacy
command). If CONFIG_I2C_MULTI_BUS is set, specify a list of bus-device
pairs. Otherwise, specify a 1D array of device addresses
when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
is set, specify a list of bus-device pairs. Otherwise, specify
a 1D array of device addresses
e.g.
#undef CONFIG_I2C_MULTI_BUS
@ -2866,14 +2866,7 @@ mw - memory write (fill)
cp - memory copy
cmp - memory compare
crc32 - checksum calculation
imd - i2c memory display
imm - i2c memory modify (auto-incrementing)
inm - i2c memory modify (constant address)
imw - i2c memory write (fill)
icrc32 - i2c checksum calculation
iprobe - probe to discover valid I2C chip addresses
iloop - infinite loop on address range
isdram - print SDRAM configuration information
i2c - I2C sub-system
sspi - SPI utility commands
base - print or set address offset
printenv- print environment variables

4
board/esd/tasreg/tasreg.c
View File

@ -231,7 +231,7 @@ int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
addr = simple_strtol (argv[1], NULL, 16);
printf("iprobe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
for (;;) {
i2c_probe(addr);
@ -249,7 +249,7 @@ int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
}
U_BOOT_CMD(
iploop, 2, 1, do_iploop,
"iprobe loop <addr>",
"i2c probe loop <addr>",
NULL
);

27
common/cmd_i2c.c
View File

@ -27,11 +27,6 @@
* There are several parameters in many of the commands that bear further
* explanations:
*
* Two of the commands (imm and imw) take a byte/word/long modifier
* (e.g. imm.w specifies the word-length modifier). This was done to
* allow manipulating word-length registers. It was not done on any other
* commands because it was not deemed useful.
*
* {i2c_chip} is the I2C chip address (the first byte sent on the bus).
* Each I2C chip on the bus has a unique address. On the I2C data bus,
* the address is the upper seven bits and the LSB is the "read/write"
@ -69,11 +64,11 @@
* {addr} field (since .1 is the default, it doesn't actually have to
* be specified). Examples: given a memory chip at I2C chip address
* 0x50, the following would happen...
* imd 50 0 10 display 16 bytes starting at 0x000
* i2c md 50 0 10 display 16 bytes starting at 0x000
* On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
* imd 50 100 10 display 16 bytes starting at 0x100
* i2c md 50 100 10 display 16 bytes starting at 0x100
* On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
* imd 50 210 10 display 16 bytes starting at 0x210
* i2c md 50 210 10 display 16 bytes starting at 0x210
* On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
* This is awfully ugly. It would be nice if someone would think up
* a better way of handling this.
@ -158,7 +153,7 @@ int i2c_set_bus_speed(unsigned int)
/*
* Syntax:
* imd {i2c_chip} {addr}{.0, .1, .2} {len}
* i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
*/
#define DISP_LINE_LEN 16
@ -275,7 +270,7 @@ int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* Write (fill) memory
*
* Syntax:
* imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
* i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
*/
int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@ -359,7 +354,7 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* Calculate a CRC on memory
*
* Syntax:
* icrc32 {i2c_chip} {addr}{.0, .1, .2} {count}
* i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
*/
int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@ -428,8 +423,8 @@ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* Modify memory.
*
* Syntax:
* imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
* inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
* i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
* i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
*/
static int
@ -562,7 +557,7 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
/*
* Syntax:
* iprobe {addr}{.0, .1, .2}
* i2c probe {addr}{.0, .1, .2}
*/
int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@ -604,7 +599,7 @@ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/*
* Syntax:
* iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
* i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
* {length} - Number of bytes to read
* {delay} - A DECIMAL number and defaults to 1000 uSec
*/
@ -726,7 +721,7 @@ static void decode_bits (u_char const b, char const *str[], int const do_once)
/*
* Syntax:
* sdram {i2c_chip}
* i2c sdram {i2c_chip}
*/
int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{

20
doc/README.ebony
View File

@ -31,17 +31,17 @@ J42: open
All others are factory default.
I2C iprobe
I2C probe
=====================
The i2c utilities have been tested on both Rev B. and Rev C. and
look good. The CONFIG_SYS_I2C_NOPROBES macro is defined to prevent
probing the CDCV850 clock controller at address 0x69 (since reading
it causes the i2c implementation to misbehave. The output of
iprobe should look like this (assuming you are only using a single
'i2c probe' should look like this (assuming you are only using a single
SO-DIMM:
=> iprobe
=> i2c probe
Valid chip addresses: 50 53 54
Excluded chip addresses: 69
@ -63,13 +63,13 @@ J42 - strapped
This will select the default sys0 and sys1 settings (the serial
eeproms are not used). Then power up the board and fix the serial
eeprom using the imm command. Here are the values I currently
eeprom using the 'i2c mm' command. Here are the values I currently
use:
=> imd 50 0 10
=> i2c md 50 0 10
0000: bf a2 04 01 ae 94 11 00 00 00 00 00 00 00 00 00 ................
=> imd 54 0 10
=> i2c md 54 0 10
0000: 8f b3 24 01 4d 14 11 00 00 00 00 00 00 00 00 00 ..$.M...........
Once you have the eeproms set correctly change the
@ -83,8 +83,8 @@ the SPD to initialize the DDR SDRAM control registers. So if the SPD
eeprom is corrupted, U-Boot will never get into ram. Here's how I got
out of this situation:
0. First, _before_ playing with the i2c utilities, do an iprobe, then
use imd to capture the various device contents to a file. Some day
0. First, _before_ playing with the i2c utilities, do an 'i2c probe', then
use 'i2c md' to capture the various device contents to a file. Some day
you may be glad you did this ... trust me :-). Otherwise try the
following:
@ -100,12 +100,12 @@ settings without using the SPD eeprom.
3. Load the new U-Boot image and reboot ebony.
4. Repair the SPD eeprom using the imm command. Here's the eeprom
4. Repair the SPD eeprom using the 'i2c mm' command. Here's the eeprom
contents that work with the default SO-DIMM that comes with the
ebony board (micron 8VDDT164AG-265A1). Note: these are probably
_not_ the factory settings ... but they work.
=> imd 53 0 10 80
=> i2c md 53 0 10 80
0000: 80 08 07 0c 0a 01 40 00 04 75 75 00 80 08 00 01 ......@..uu.....
0010: 0e 04 0c 01 02 20 00 a0 75 00 00 50 3c 50 2d 20 ..... ..u..P<P-
0020: 90 90 50 50 00 00 00 00 00 41 4b 34 32 75 00 00 ..PP.....AK42u..

8
doc/README.m52277evb
View File

@ -204,16 +204,10 @@ erase - erase FLASH memory
flinfo - print FLASH memory information
go - start application at address 'addr'
help - print online help
i2c - I2C sub-system
icache - enable or disable instruction cache
icrc32 - checksum calculation
iloop - infinite loop on address range
imd - i2c memory display
iminfo - print header information for application image
imls - list all images found in flash
imm - i2c memory modify (auto-incrementing)
imw - memory write (fill)
inm - memory modify (constant address)
iprobe - probe to discover valid I2C chip addresses
itest - return true/false on integer compare
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line

8
doc/README.m5373evb
View File

@ -215,16 +215,10 @@ erase - erase FLASH memory
flinfo - print FLASH memory information
go - start application at address 'addr'
help - print online help
i2c - I2C sub-system
icache - enable or disable instruction cache
icrc32 - checksum calculation
iloop - infinite loop on address range
imd - i2c memory display
iminfo - print header information for application image
imls - list all images found in flash
imm - i2c memory modify (auto-incrementing)
imw - memory write (fill)
inm - memory modify (constant address)
iprobe - probe to discover valid I2C chip addresses
itest - return true/false on integer compare
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line

8
doc/README.m54455evb
View File

@ -304,17 +304,11 @@ fsinfo - print information about filesystems
fsload - load binary file from a filesystem image
go - start application at address 'addr'
help - print online help
i2c - I2C sub-system
icache - enable or disable instruction cache
icrc32 - checksum calculation
ide - IDE sub-system
iloop - infinite loop on address range
imd - i2c memory display
iminfo - print header information for application image
imls - list all images found in flash
imm - i2c memory modify (auto-incrementing)
imw - memory write (fill)
inm - memory modify (constant address)
iprobe - probe to discover valid I2C chip addresses
itest - return true/false on integer compare
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line

8
doc/README.m5475evb
View File

@ -234,16 +234,10 @@ erase - erase FLASH memory
flinfo - print FLASH memory information
go - start application at address 'addr'
help - print online help
i2c - I2C sub-system
icache - enable or disable instruction cache
icrc32 - checksum calculation
iloop - infinite loop on address range
imd - i2c memory display
iminfo - print header information for application image
imls - list all images found in flash
imm - i2c memory modify (auto-incrementing)
imw - memory write (fill)
inm - memory modify (constant address)
iprobe - probe to discover valid I2C chip addresses
itest - return true/false on integer compare
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line

4
doc/README.ppc440
View File

@ -88,7 +88,7 @@ I2C
=================
The i2c utilities have been tested on both Rev B. and Rev C. and
look good. The iprobe command implementation has been updated to
look good. The 'i2c probe' command implementation has been updated to
allow for 'skipped' addresses. Some i2c slaves are write only and
cause problems when a probe (read) is performed (for example the
CDCV850 clock controller at address 0x69 on the ebony board).
@ -97,7 +97,7 @@ To prevent probing certain addresses you can define the
CONFIG_SYS_I2C_NOPROBES macro in your board-specific header file. When
defined, all specified addresses are skipped during a probe.
The addresses that are skipped will be displayed in the output
of the iprobe command.
of the 'i2c probe' command.
For example, to prevent probing address 0x69, define the macro as
follows:

6
doc/README.xpedite1k
View File

@ -23,7 +23,7 @@ strappings and the 2 EMAC HW Ethernet addresses. Be careful not to
change the 1st page of the EEPROM! Unpopulated jumper J560 can get you
out of trouble as it disables the strapping read from EEPROM.
I2C iprobe
I2C probe
=====================
The i2c utilities work and have been tested on Rev B. of the 440GX. See
@ -47,10 +47,10 @@ J560 - closed
This will select the default sys0 and sys1 settings (the serial
eeproms are not used). Then power up the board and fix the serial
eeprom using the imm command. Here are the values I currently
eeprom using the 'i2c mm' command. Here are the values I currently
use:
=> imd 50 0 10
=> i2c md 50 0 10
0000: 85 7d 42 06 07 80 11 00 00 00 00 00 00 00 00 00 .}B.............

2
drivers/i2c/tsi108_i2c.c
View File

@ -129,7 +129,7 @@ static int i2c_read_byte (
* chip_addr: I2C chip address, range 0..127
* (to read from SPD channel EEPROM use (0xD0 ... 0xD7)
* NOTE: The bit 7 in the chip_addr serves as a channel select.
* This hack is for enabling "isdram" command on Tsi108 boards
* This hack is for enabling "i2c sdram" command on Tsi108 boards
* without changes to common code. Used for I2C reads only.
* byte_addr: Memory or register address within the chip
* alen: Number of bytes to use for addr (typically 1, 2 for larger

2
include/configs/bubinga.h
View File

@ -134,7 +134,7 @@
*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
#if defined(CONFIG_CMD_EEPROM)

6
include/configs/sacsng.h
View File

@ -408,9 +408,9 @@
"echo hostname ${hostname}\0" \
"ana=run adc ; run dac\0" \
"adc=run adc-12 ; run adc-34\0" \
"adc-12=echo ### ADC-12 ; imd.b e 81 e\0" \
"adc-34=echo ### ADC-34 ; imd.b f 81 e\0" \
"dac=echo ### DAC ; imd.b 11 81 5\0" \
"adc-12=echo ### ADC-12 ; i2c md e 81 e\0" \
"adc-34=echo ### ADC-34 ; i2c md f 81 e\0" \
"dac=echo ### DAC ; i2c md 11 81 5\0" \
"boot-hook=echo\0"
/* What should the console's baud rate be? */

2
include/configs/taihu.h
View File

@ -139,7 +139,7 @@
*/
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */