8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx
The number of CPUs are getting detected dynamically by checking the processor SVR value. Also removed CONFIG_NUM_CPUS references from all the platforms with 85xx/86xx processors. This can help to use the same u-boot image across the platforms. Also revamped and corrected few Freescale Copyright messages. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
18bacc2027
commit
0e870980a6
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2008 Freescale Semiconductor, Inc.
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* Copyright 2008-2009 Freescale Semiconductor, Inc.
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*
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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@ -34,9 +34,9 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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}
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}
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cpuid = simple_strtoul(argv[1], NULL, 10);
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cpuid = simple_strtoul(argv[1], NULL, 10);
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if (cpuid >= CONFIG_NUM_CPUS) {
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if (cpuid >= cpu_numcores()) {
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printf ("Core num: %lu is out of range[0..%d]\n",
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printf ("Core num: %lu is out of range[0..%d]\n",
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cpuid, CONFIG_NUM_CPUS - 1);
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cpuid, cpu_numcores() - 1);
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return 1;
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return 1;
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}
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}
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@ -54,24 +54,23 @@ int checkcpu (void)
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int i;
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int i;
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svr = get_svr();
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svr = get_svr();
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ver = SVR_SOC_VER(svr);
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major = SVR_MAJ(svr);
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major = SVR_MAJ(svr);
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#ifdef CONFIG_MPC8536
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#ifdef CONFIG_MPC8536
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major &= 0x7; /* the msb of this nibble is a mfg code */
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major &= 0x7; /* the msb of this nibble is a mfg code */
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#endif
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#endif
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minor = SVR_MIN(svr);
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minor = SVR_MIN(svr);
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#if (CONFIG_NUM_CPUS > 1)
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if (cpu_numcores() > 1) {
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volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
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volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
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printf("CPU%d: ", pic->whoami);
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printf("CPU%d: ", pic->whoami);
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#else
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} else {
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puts("CPU: ");
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puts("CPU: ");
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#endif
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}
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cpu = identify_cpu(ver);
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cpu = gd->cpu;
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if (cpu) {
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if (cpu->name) {
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puts(cpu->name);
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puts(cpu->name);
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if (IS_E_PROCESSOR(svr))
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if (IS_E_PROCESSOR(svr))
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puts("E");
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puts("E");
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} else {
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} else {
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@ -104,7 +103,7 @@ int checkcpu (void)
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get_sys_info(&sysinfo);
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get_sys_info(&sysinfo);
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puts("Clock Configuration:");
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puts("Clock Configuration:");
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for (i = 0; i < CONFIG_NUM_CPUS; i++) {
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for (i = 0; i < cpu_numcores(); i++) {
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if (!(i & 3))
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if (!(i & 3))
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printf ("\n ");
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printf ("\n ");
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printf("CPU%d:%-4s MHz, ",
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printf("CPU%d:%-4s MHz, ",
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2008 Freescale Semiconductor.
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* Copyright 2008-2009 Freescale Semiconductor, Inc.
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*
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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@ -157,7 +157,7 @@ static void pq3_mp_up(unsigned long bootpg)
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out_be32(&gur->devdisr, devdisr);
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out_be32(&gur->devdisr, devdisr);
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/* release the hounds */
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/* release the hounds */
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up = ((1 << CONFIG_NUM_CPUS) - 1);
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up = ((1 << cpu_numcores()) - 1);
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bpcr = in_be32(&ecm->eebpcr);
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bpcr = in_be32(&ecm->eebpcr);
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bpcr |= (up << 24);
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bpcr |= (up << 24);
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out_be32(&ecm->eebpcr, bpcr);
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out_be32(&ecm->eebpcr, bpcr);
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@ -167,7 +167,7 @@ static void pq3_mp_up(unsigned long bootpg)
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/* wait for everyone */
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/* wait for everyone */
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while (timeout) {
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while (timeout) {
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int i;
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int i;
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for (i = 0; i < CONFIG_NUM_CPUS; i++) {
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for (i = 0; i < cpu_numcores(); i++) {
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if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
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if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
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cpu_up_mask |= (1 << i);
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cpu_up_mask |= (1 << i);
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};
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};
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@ -1,3 +1,26 @@
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/*
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* Copyright 2008-2009 Freescale Semiconductor, Inc.
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* Kumar Gala <kumar.gala@freescale.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <config.h>
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#include <mpc85xx.h>
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#include <mpc85xx.h>
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#include <version.h>
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#include <version.h>
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@ -203,7 +226,7 @@ __secondary_start_page:
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.align L1_CACHE_SHIFT
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.align L1_CACHE_SHIFT
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.globl __spin_table
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.globl __spin_table
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__spin_table:
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__spin_table:
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.space CONFIG_NUM_CPUS*ENTRY_SIZE
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.space CONFIG_MAX_CPUS*ENTRY_SIZE
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/* Fill in the empty space. The actual reset vector is
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/* Fill in the empty space. The actual reset vector is
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* the last word of the page */
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* the last word of the page */
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2004, 2007-2009 Freescale Semiconductor Inc.
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* Copyright 2004, 2007-2009 Freescale Semiconductor, Inc.
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* (C) Copyright 2003 Motorola Inc.
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* (C) Copyright 2003 Motorola Inc.
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* Xianghua Xiao, (X.Xiao@motorola.com)
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* Xianghua Xiao, (X.Xiao@motorola.com)
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*
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*
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@ -51,7 +51,7 @@ void get_sys_info (sys_info_t * sysInfo)
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/* Divide before multiply to avoid integer
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/* Divide before multiply to avoid integer
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* overflow for processor speeds above 2GHz */
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* overflow for processor speeds above 2GHz */
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half_freqSystemBus = sysInfo->freqSystemBus/2;
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half_freqSystemBus = sysInfo->freqSystemBus/2;
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for (i = 0; i < CONFIG_NUM_CPUS; i++) {
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for (i = 0; i < cpu_numcores(); i++) {
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e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f;
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e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f;
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sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus;
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sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus;
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}
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}
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@ -30,6 +30,8 @@
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#include <mpc86xx.h>
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#include <mpc86xx.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_law.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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/*
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* Default board reset function
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* Default board reset function
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*/
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*/
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@ -61,12 +63,12 @@ checkcpu(void)
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puts("CPU: ");
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puts("CPU: ");
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cpu = identify_cpu(ver);
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cpu = gd->cpu;
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if (cpu) {
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if (cpu->name)
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puts(cpu->name);
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puts(cpu->name);
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} else {
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else
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puts("Unknown");
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puts("Unknown");
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}
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printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
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printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
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puts("Core: ");
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puts("Core: ");
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright 2004 Freescale Semiconductor.
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* Copyright 2004,2009 Freescale Semiconductor, Inc.
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* Jeff Brown
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* Jeff Brown
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
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*
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*
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@ -129,7 +129,7 @@ void cpu_init_f(void)
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*/
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*/
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int cpu_init_r(void)
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int cpu_init_r(void)
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{
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{
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#if (CONFIG_NUM_CPUS > 1)
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#if defined(CONFIG_MP)
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setup_mp();
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setup_mp();
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#endif
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#endif
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return 0;
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return 0;
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@ -35,41 +35,41 @@ DECLARE_GLOBAL_DATA_PTR;
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struct cpu_type cpu_type_list [] = {
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struct cpu_type cpu_type_list [] = {
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#if defined(CONFIG_MPC85xx)
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#if defined(CONFIG_MPC85xx)
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CPU_TYPE_ENTRY(8533, 8533),
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CPU_TYPE_ENTRY(8533, 8533, 1),
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CPU_TYPE_ENTRY(8533, 8533_E),
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CPU_TYPE_ENTRY(8533, 8533_E, 1),
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CPU_TYPE_ENTRY(8535, 8535),
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CPU_TYPE_ENTRY(8535, 8535, 1),
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CPU_TYPE_ENTRY(8535, 8535_E),
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CPU_TYPE_ENTRY(8535, 8535_E, 1),
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CPU_TYPE_ENTRY(8536, 8536),
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CPU_TYPE_ENTRY(8536, 8536, 1),
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CPU_TYPE_ENTRY(8536, 8536_E),
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CPU_TYPE_ENTRY(8536, 8536_E, 1),
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CPU_TYPE_ENTRY(8540, 8540),
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CPU_TYPE_ENTRY(8540, 8540, 1),
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CPU_TYPE_ENTRY(8541, 8541),
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CPU_TYPE_ENTRY(8541, 8541, 1),
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CPU_TYPE_ENTRY(8541, 8541_E),
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CPU_TYPE_ENTRY(8541, 8541_E, 1),
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CPU_TYPE_ENTRY(8543, 8543),
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CPU_TYPE_ENTRY(8543, 8543, 1),
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CPU_TYPE_ENTRY(8543, 8543_E),
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CPU_TYPE_ENTRY(8543, 8543_E, 1),
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CPU_TYPE_ENTRY(8544, 8544),
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CPU_TYPE_ENTRY(8544, 8544, 1),
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CPU_TYPE_ENTRY(8544, 8544_E),
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CPU_TYPE_ENTRY(8544, 8544_E, 1),
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CPU_TYPE_ENTRY(8545, 8545),
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CPU_TYPE_ENTRY(8545, 8545, 1),
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CPU_TYPE_ENTRY(8545, 8545_E),
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CPU_TYPE_ENTRY(8545, 8545_E, 1),
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CPU_TYPE_ENTRY(8547, 8547_E),
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CPU_TYPE_ENTRY(8547, 8547_E, 1),
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CPU_TYPE_ENTRY(8548, 8548),
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CPU_TYPE_ENTRY(8548, 8548, 1),
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CPU_TYPE_ENTRY(8548, 8548_E),
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CPU_TYPE_ENTRY(8548, 8548_E, 1),
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CPU_TYPE_ENTRY(8555, 8555),
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CPU_TYPE_ENTRY(8555, 8555, 1),
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CPU_TYPE_ENTRY(8555, 8555_E),
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CPU_TYPE_ENTRY(8555, 8555_E, 1),
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CPU_TYPE_ENTRY(8560, 8560),
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CPU_TYPE_ENTRY(8560, 8560, 1),
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CPU_TYPE_ENTRY(8567, 8567),
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CPU_TYPE_ENTRY(8567, 8567, 1),
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CPU_TYPE_ENTRY(8567, 8567_E),
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CPU_TYPE_ENTRY(8567, 8567_E, 1),
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CPU_TYPE_ENTRY(8568, 8568),
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CPU_TYPE_ENTRY(8568, 8568, 1),
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CPU_TYPE_ENTRY(8568, 8568_E),
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CPU_TYPE_ENTRY(8568, 8568_E, 1),
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CPU_TYPE_ENTRY(8569, 8569),
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CPU_TYPE_ENTRY(8569, 8569, 1),
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CPU_TYPE_ENTRY(8569, 8569_E),
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CPU_TYPE_ENTRY(8569, 8569_E, 1),
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CPU_TYPE_ENTRY(8572, 8572),
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CPU_TYPE_ENTRY(8572, 8572, 2),
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CPU_TYPE_ENTRY(8572, 8572_E),
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CPU_TYPE_ENTRY(8572, 8572_E, 2),
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CPU_TYPE_ENTRY(P2020, P2020),
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CPU_TYPE_ENTRY(P2020, P2020, 2),
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CPU_TYPE_ENTRY(P2020, P2020_E),
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CPU_TYPE_ENTRY(P2020, P2020_E, 2),
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#elif defined(CONFIG_MPC86xx)
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#elif defined(CONFIG_MPC86xx)
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CPU_TYPE_ENTRY(8610, 8610),
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CPU_TYPE_ENTRY(8610, 8610, 1),
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CPU_TYPE_ENTRY(8641, 8641),
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CPU_TYPE_ENTRY(8641, 8641, 2),
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CPU_TYPE_ENTRY(8641D, 8641D),
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CPU_TYPE_ENTRY(8641D, 8641D, 2),
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#endif
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#endif
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};
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};
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@ -84,6 +84,31 @@ struct cpu_type *identify_cpu(u32 ver)
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return NULL;
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return NULL;
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}
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}
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int cpu_numcores() {
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struct cpu_type *cpu;
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cpu = gd->cpu;
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return cpu->num_cores;
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}
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int probecpu (void)
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{
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uint svr;
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uint ver;
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svr = get_svr();
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ver = SVR_SOC_VER(svr);
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gd->cpu = identify_cpu(ver);
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#ifndef CONFIG_MP
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if (cpu_numcores() > 1) {
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puts("Unicore software on multiprocessor system!!\n"
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"To enable mutlticore build define CONFIG_MP\n");
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}
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#endif
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return 0;
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}
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/*
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/*
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* Initializes on-chip ethernet controllers.
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* Initializes on-chip ethernet controllers.
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* to override, implement board_eth_init()
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* to override, implement board_eth_init()
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@ -38,4 +38,11 @@
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#endif
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#endif
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#endif
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#endif
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#if defined(CONFIG_MPC8572) || defined(CONFIG_P2020) \
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|| defined(CONFIG_MPC8641)
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#define CONFIG_MAX_CPUS 2
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#else
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#define CONFIG_MAX_CPUS 1
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#endif
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#endif /* _ASM_CONFIG_H_ */
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#endif /* _ASM_CONFIG_H_ */
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@ -91,6 +91,7 @@ typedef struct global_data {
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#endif
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#endif
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#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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u32 lbc_clk;
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u32 lbc_clk;
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void *cpu;
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#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
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#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
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#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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u32 i2c1_clk;
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u32 i2c1_clk;
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@ -1065,13 +1065,14 @@ n:
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struct cpu_type {
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struct cpu_type {
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char name[15];
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char name[15];
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u32 soc_ver;
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u32 soc_ver;
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u32 num_cores;
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};
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};
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struct cpu_type *identify_cpu(u32 ver);
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struct cpu_type *identify_cpu(u32 ver);
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#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
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#define CPU_TYPE_ENTRY(n, v) \
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#define CPU_TYPE_ENTRY(n, v, nc) \
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{ .name = #n, .soc_ver = SVR_##v, }
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{ .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), }
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#else
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#else
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#if defined(CONFIG_MPC83xx)
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#if defined(CONFIG_MPC83xx)
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#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
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#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
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@ -441,6 +441,8 @@ void ppcDWstore(unsigned int *addr, unsigned int *value);
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#endif
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#endif
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/* $(CPU)/cpu.c */
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/* $(CPU)/cpu.c */
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int cpu_numcores (void);
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int probecpu (void);
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int checkcpu (void);
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int checkcpu (void);
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int checkicache (void);
|
int checkicache (void);
|
||||||
int checkdcache (void);
|
int checkdcache (void);
|
||||||
|
|
|
@ -34,7 +34,6 @@
|
||||||
#define CONFIG_MPC8572 1
|
#define CONFIG_MPC8572 1
|
||||||
#define CONFIG_MPC8572DS 1
|
#define CONFIG_MPC8572DS 1
|
||||||
#define CONFIG_MP 1 /* support multiple processors */
|
#define CONFIG_MP 1 /* support multiple processors */
|
||||||
#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
|
|
||||||
|
|
||||||
#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
|
#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
|
||||||
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
|
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
|
||||||
|
|
|
@ -17,7 +17,6 @@
|
||||||
#define CONFIG_MPC86xx 1 /* MPC86xx */
|
#define CONFIG_MPC86xx 1 /* MPC86xx */
|
||||||
#define CONFIG_MPC8610 1 /* MPC8610 specific */
|
#define CONFIG_MPC8610 1 /* MPC8610 specific */
|
||||||
#define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */
|
#define CONFIG_MPC8610HPCD 1 /* MPC8610HPCD board specific */
|
||||||
#define CONFIG_NUM_CPUS 1 /* Number of CPUs in the system */
|
|
||||||
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
||||||
|
|
||||||
#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
|
#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
|
||||||
|
|
|
@ -37,7 +37,6 @@
|
||||||
#define CONFIG_MPC8641 1 /* MPC8641 specific */
|
#define CONFIG_MPC8641 1 /* MPC8641 specific */
|
||||||
#define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */
|
#define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */
|
||||||
#define CONFIG_MP 1 /* support multiple processors */
|
#define CONFIG_MP 1 /* support multiple processors */
|
||||||
#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
|
|
||||||
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
||||||
/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */
|
/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */
|
||||||
#define CONFIG_ADDR_MAP 1 /* Use addr map */
|
#define CONFIG_ADDR_MAP 1 /* Use addr map */
|
||||||
|
|
|
@ -34,7 +34,6 @@
|
||||||
#define CONFIG_P2020 1
|
#define CONFIG_P2020 1
|
||||||
#define CONFIG_P2020DS 1
|
#define CONFIG_P2020DS 1
|
||||||
#define CONFIG_MP 1 /* support multiple processors */
|
#define CONFIG_MP 1 /* support multiple processors */
|
||||||
#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
|
|
||||||
|
|
||||||
#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
|
#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
|
||||||
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
|
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
|
||||||
|
|
|
@ -34,7 +34,6 @@
|
||||||
#define CONFIG_MPC8641 1 /* MPC8641 specific */
|
#define CONFIG_MPC8641 1 /* MPC8641 specific */
|
||||||
#define CONFIG_XPEDITE5140 1 /* MPC8641HPCN board specific */
|
#define CONFIG_XPEDITE5140 1 /* MPC8641HPCN board specific */
|
||||||
#define CONFIG_SYS_BOARD_NAME "XPedite5170"
|
#define CONFIG_SYS_BOARD_NAME "XPedite5170"
|
||||||
#define CONFIG_NUM_CPUS 1 /* Number of CPUs in the system */
|
|
||||||
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
||||||
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */
|
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */
|
||||||
#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */
|
#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */
|
||||||
|
|
|
@ -36,7 +36,6 @@
|
||||||
#define CONFIG_MPC8572 1
|
#define CONFIG_MPC8572 1
|
||||||
#define CONFIG_XPEDITE5370 1
|
#define CONFIG_XPEDITE5370 1
|
||||||
#define CONFIG_SYS_BOARD_NAME "XPedite5370"
|
#define CONFIG_SYS_BOARD_NAME "XPedite5370"
|
||||||
#define CONFIG_NUM_CPUS 2 /* 2 Cores */
|
|
||||||
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */
|
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */
|
||||||
#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */
|
#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */
|
||||||
|
|
||||||
|
|
|
@ -41,7 +41,6 @@
|
||||||
#define CONFIG_MPC8641 1 /* MPC8641 specific */
|
#define CONFIG_MPC8641 1 /* MPC8641 specific */
|
||||||
#define CONFIG_SBC8641D 1 /* SBC8641D board specific */
|
#define CONFIG_SBC8641D 1 /* SBC8641D board specific */
|
||||||
#define CONFIG_MP 1 /* support multiple processors */
|
#define CONFIG_MP 1 /* support multiple processors */
|
||||||
#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
|
|
||||||
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
|
||||||
|
|
||||||
#ifdef RUN_DIAG
|
#ifdef RUN_DIAG
|
||||||
|
|
|
@ -8,13 +8,9 @@
|
||||||
|
|
||||||
#ifndef __ASSEMBLY__
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
#ifndef CONFIG_NUM_CPUS
|
|
||||||
#define CONFIG_NUM_CPUS 1
|
|
||||||
#endif
|
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
unsigned long freqProcessor[CONFIG_NUM_CPUS];
|
unsigned long freqProcessor[CONFIG_MAX_CPUS];
|
||||||
unsigned long freqSystemBus;
|
unsigned long freqSystemBus;
|
||||||
unsigned long freqDDRBus;
|
unsigned long freqDDRBus;
|
||||||
unsigned long freqLocalBus;
|
unsigned long freqLocalBus;
|
||||||
|
|
|
@ -291,6 +291,9 @@ init_fnc_t *init_sequence[] = {
|
||||||
board_early_init_f,
|
board_early_init_f,
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
|
||||||
|
probecpu,
|
||||||
|
#endif
|
||||||
#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
|
#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
|
||||||
get_clocks, /* get CPU and bus clocks (etc.) */
|
get_clocks, /* get CPU and bus clocks (etc.) */
|
||||||
#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
|
#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
|
||||||
|
|
|
@ -172,7 +172,7 @@ void arch_lmb_reserve(struct lmb *lmb)
|
||||||
|
|
||||||
static void boot_prep_linux(void)
|
static void boot_prep_linux(void)
|
||||||
{
|
{
|
||||||
#if (CONFIG_NUM_CPUS > 1)
|
#ifdef CONFIG_MP
|
||||||
/* if we are MP make sure to flush the dcache() to any changes are made
|
/* if we are MP make sure to flush the dcache() to any changes are made
|
||||||
* visibile to all other cores */
|
* visibile to all other cores */
|
||||||
flush_dcache();
|
flush_dcache();
|
||||||
|
|
Loading…
Reference in New Issue