4xx: Remove binary cpld bitstream from PMC405 board
This patch removes the cpld binary bitstream that is used by esd's cpld command on PMC405 boards. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
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@ -34,13 +34,6 @@ DECLARE_GLOBAL_DATA_PTR;
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extern void lxt971_no_sleep(void);
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extern void lxt971_no_sleep(void);
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/* fpga configuration data - not compressed, generated by bin2c */
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const unsigned char fpgadata[] =
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{
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#include "fpgadata.c"
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};
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int filesize = sizeof(fpgadata);
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int board_early_init_f (void)
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int board_early_init_f (void)
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{
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{
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/*
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/*
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@ -282,9 +282,6 @@
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/*
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/*
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* FPGA stuff
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* FPGA stuff
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*/
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*/
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#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */
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#define CONFIG_SYS_FPGA_MAX_SIZE (32 * 1024) /* 32kByte for CPLD */
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/* FPGA program pin configuration */
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/* FPGA program pin configuration */
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#define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (output) */
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#define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (output) */
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#define CONFIG_SYS_FPGA_CLK 0x02000000 /* JTAG TCK pin (output) */
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#define CONFIG_SYS_FPGA_CLK 0x02000000 /* JTAG TCK pin (output) */
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