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Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode 

Patch by Andy Fleming, 14 Jun 2005
This commit is contained in:
Wolfgang Denk 2006-03-12 18:09:47 +01:00
parent d8169c9f3b
commit 0346983290
2 changed files with 4 additions and 1 deletions
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3
CHANGELOG
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@ -2,6 +2,9 @@
Changes since U-Boot 1.1.4:
======================================================================
* Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
Patch by Andy Fleming, 14 Jun 2005
* Fix bad register definitions for LTX971 PHY on MPC85xx boards.
Patch by Gerhard Jaeger, 21 Jun 2005

2
drivers/tsec.h
View File

@ -124,7 +124,7 @@
/* Cicada 8204 Extended PHY Control Register 1 */
#define MIIM_CIS8204_EPHY_CON 0x17
#define MIIM_CIS8204_EPHYCON_INIT 0x0006
#define MIIM_CIS8204_EPHYCON_RGMII 0x1000
#define MIIM_CIS8204_EPHYCON_RGMII 0x1100
/* Cicada 8204 Serial LED Control Register */
#define MIIM_CIS8204_SLED_CON 0x1b