66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/* Calypso DBB internal PWL (Pulse Width / Light) Driver */
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/* (C) 2010 by Harald Welte <laforge@gnumonks.org>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <stdint.h>
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#include <memory.h>
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#define BASE_ADDR_PWL 0xfffe8000
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#define PWL_REG(m) (BASE_ADDR_PWL + (m))
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#define ASIC_CONF_REG 0xfffef008
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#define LIGHT_LEVEL_REG 0xfffe4810
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enum pwl_reg {
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PWL_LEVEL = 0,
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PWL_CTRL = 1,
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};
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#define ASCONF_PWL_ENA (1 << 4)
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void bl_mode_pwl(int on)
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{
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uint16_t reg;
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reg = readw(ASIC_CONF_REG);
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if (on) {
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/* Enable pwl */
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writeb(0x01, PWL_REG(PWL_CTRL));
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/* Switch pin from LT to PWL */
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reg |= ASCONF_PWL_ENA;
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writew(reg, ASIC_CONF_REG);
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} else {
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/* Switch pin from PWL to LT */
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reg &= ~ASCONF_PWL_ENA;
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writew(reg, ASIC_CONF_REG);
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/* Disable pwl */
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writeb(0x00, PWL_REG(PWL_CTRL));
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}
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}
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void bl_level(uint8_t level)
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{
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if (readw(ASIC_CONF_REG) & ASCONF_PWL_ENA) {
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writeb(level, PWL_REG(PWL_LEVEL));
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} else {
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/* we need to scale the light level, as the
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* ARMIO light controller only knows 0..63 */
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writeb(level>>2, LIGHT_LEVEL_REG);
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}
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}
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