fw/calypso: Add a new driver for the buzzer control

Written-by: Jose Luis Pereira <onaips@gmail.com>
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2011-04-24 19:32:42 +02:00
parent 03ce0a402c
commit d9639bb010
3 changed files with 121 additions and 1 deletions

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@ -1,4 +1,4 @@
LIBRARIES+=calypso
calypso_DIR=calypso
calypso_SRCS=arm.c clock.c delay.c dma.c dsp.c du.c i2c.c irq.c rtc.c sim.c spi.c tpu.c tsp.c keypad.c misc.c timer.c backlight.c uart.c uwire.c
calypso_SRCS=arm.c buzzer.c clock.c delay.c dma.c dsp.c du.c i2c.c irq.c rtc.c sim.c spi.c tpu.c tsp.c keypad.c misc.c timer.c backlight.c uart.c uwire.c

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/* Calypso DBB internal PWT (Pulse Width / T) Buzzer Driver */
/* (C) 2010 by Jose Pereira <onaips@gmail.com>
*
* All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*/
#include <stdint.h>
#include <memory.h>
#define BASE_ADDR_PWL 0xfffe8800
#define PWT_REG(m) (BASE_ADDR_PWL + (m))
#define ASIC_CONF_REG 0xfffef008
#define BUZZ_LEVEL_REG 0xfffe480e
enum pwt_reg {
FRC_REG = 0,
VRC_REG = 1,
GCR_REG = 2,
};
#define ASCONF_PWT_ENA (1 << 5)
void buzzer_mode_pwt(int on)
{
uint16_t reg;
reg = readw(ASIC_CONF_REG);
if (on) {
/* Enable pwt */
writeb(0x01, PWT_REG(GCR_REG));
/* Switch pin from LT to PWL */
reg |= ASCONF_PWT_ENA;
writew(reg, ASIC_CONF_REG);
} else {
/* Switch pin from PWT to BU */
reg |= ~ASCONF_PWT_ENA;
writew(reg, ASIC_CONF_REG);
/* Disable pwt */
writeb(0x00, PWT_REG(GCR_REG));
}
}
void buzzer_volume(uint8_t level)
{
if (readw(ASIC_CONF_REG) & ASCONF_PWT_ENA) {
if (level) {
//scaling the volume as pwt only knows 0..63
level = level >> 1;
//if level > 0 buzzer is on
level |= 0x01;
}
writeb(level,PWT_REG(VRC_REG));
} else {
/* we need to scale the buzz level, as the
* ARMIO buzz controller only knows 0..63 */
writeb(level>>2, BUZZ_LEVEL_REG);
}
}
void buzzer_note(uint8_t note)
{
if ( (readw(ASIC_CONF_REG) & ASCONF_PWT_ENA) )
writeb(note,PWT_REG(FRC_REG));
}

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#ifndef _CAL_BUZZER_H
#define _CAL_BUZZER_H
#define NOTE(n,oct) (n<<2 | (oct & 0x03))
#define NOTE_E 0x00
#define NOTE_DIS 0x01
#define NOTE_D 0x02
#define NOTE_CIS 0x03
#define NOTE_C 0x04
#define NOTE_H 0x05
#define NOTE_AIS 0x06
#define NOTE_A 0x07
#define NOTE_GIS 0x08
#define NOTE_G 0x09
#define NOTE_FIS 0x0A
#define NOTE_F 0x0B
#define OCTAVE_5 OCTAVE(0x00)
#define OCTAVE_4 OCTAVE(0x01)
#define OCTAVE_3 OCTAVE(0x02)
#define OCTAVE_2 OCTAVE(0x03)
#define OCTAVE_1 OCTAVE(0x04)
#define OCTAVE(m) (m>NOTE_C?m+1:m)
/* Switch buzzer to PWT mode (or back) */
void buzzer_mode_pwt(int on);
/* Set the buzzer level */
void buzzer_volume(uint8_t level);
/* Set the buzzer note */
void buzzer_note(uint8_t note);
#endif /* _CAL_BUZZER_H */