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layer1/tpu_window: Add experimental support for TS != 0 

This is flawed, but allows testing ...

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2010-06-22 01:50:35 +02:00
parent 802637bf9b
commit 1453c43202
7 changed files with 18 additions and 15 deletions
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4
src/target/firmware/include/layer1/tpu_window.h
View File

@ -15,8 +15,8 @@ enum l1_txwin_type {
_NUM_L1_TXWIN
};
void l1s_rx_win_ctrl(uint16_t arfcn, enum l1_rxwin_type wtype);
void l1s_tx_win_ctrl(uint16_t arfcn, enum l1_txwin_type wtype, uint8_t pwr);
void l1s_rx_win_ctrl(uint16_t arfcn, enum l1_rxwin_type wtype, uint8_t tn);
void l1s_tx_win_ctrl(uint16_t arfcn, enum l1_txwin_type wtype, uint8_t pwr, uint8_t tn);
void tpu_end_scenario(void);

4
src/target/firmware/layer1/prim_fbsb.c
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@ -280,7 +280,7 @@ static int l1s_sbdet_cmd(__unused uint8_t p1, __unused uint8_t p2,
dsp_end_scenario();
/* Program TPU */
l1s_rx_win_ctrl(rf_arfcn, L1_RXWIN_SB);
l1s_rx_win_ctrl(rf_arfcn, L1_RXWIN_SB, 0);
tpu_end_scenario();
return 0;
@ -382,7 +382,7 @@ static int l1s_fbdet_cmd(__unused uint8_t p1, __unused uint8_t p2,
dsp_end_scenario();
/* Program TPU */
l1s_rx_win_ctrl(fbs.req.band_arfcn, L1_RXWIN_FB);
l1s_rx_win_ctrl(fbs.req.band_arfcn, L1_RXWIN_FB, 0);
tpu_end_scenario();
return 0;

2
src/target/firmware/layer1/prim_pm.c
View File

@ -72,7 +72,7 @@ static int l1s_pm_cmd(uint8_t num_meas,
/* Program TPU */
/* FIXME: RXWIN_PW needs to set up multiple times in case
* num_meas > 1 */
l1s_rx_win_ctrl(arfcn, L1_RXWIN_PW);
l1s_rx_win_ctrl(arfcn, L1_RXWIN_PW, 0);
//l1s_rx_win_ctrl(arfcn, L1_RXWIN_NB);
tpu_end_scenario();

2
src/target/firmware/layer1/prim_rach.c
View File

@ -73,7 +73,7 @@ static int l1s_tx_rach_cmd(__unused uint8_t p1, __unused uint8_t p2, __unused ui
dsp_api.db_w->d_task_ra = RACH_DSP_TASK;
dsp_end_scenario();
l1s_tx_win_ctrl(l1s.serving_cell.arfcn, L1_TXWIN_AB, 0);
l1s_tx_win_ctrl(l1s.serving_cell.arfcn, L1_TXWIN_AB, 0, 0);
tpu_end_scenario();
return 0;

2
src/target/firmware/layer1/prim_rx_nb.c
View File

@ -182,7 +182,7 @@ static int l1s_nb_cmd(__unused uint8_t p1, uint8_t burst_id,
dsp_load_rx_task(ALLC_DSP_TASK, burst_id, tsc);
dsp_end_scenario();
l1s_rx_win_ctrl(arfcn, L1_RXWIN_NB);
l1s_rx_win_ctrl(arfcn, L1_RXWIN_NB, tn);
tpu_end_scenario();
return 0;

2
src/target/firmware/layer1/prim_tx_nb.c
View File

@ -158,7 +158,7 @@ static int l1s_tx_cmd(uint8_t p1, uint8_t burst_id, uint16_t p3)
dsp_load_tx_task(DUL_DSP_TASK, burst_id, tsc);
dsp_end_scenario();
l1s_tx_win_ctrl(arfcn, L1_TXWIN_NB, 0);
l1s_tx_win_ctrl(arfcn, L1_TXWIN_NB, 0, tn);
tpu_end_scenario();
return 0;

17
src/target/firmware/layer1/tpu_window.c
View File

@ -30,6 +30,7 @@
#include <abb/twl3025.h>
#include <rf/trf6151.h>
#include <layer1/sync.h>
#include <layer1/tpu_window.h>
/* all units in GSM quarter-bits (923.1ns) */
@ -64,7 +65,7 @@ static const uint16_t tx_burst_duration[_NUM_L1_TXWIN] = {
[L1_TXWIN_AB] = L1_TX_AB_DURATION_Q,
};
void l1s_rx_win_ctrl(uint16_t arfcn, enum l1_rxwin_type wtype)
void l1s_rx_win_ctrl(uint16_t arfcn, enum l1_rxwin_type wtype, uint8_t tn)
{
int16_t start = DSP_SETUP_TIME;
int16_t stop = start + rx_burst_duration[wtype] - 1;
@ -72,6 +73,10 @@ void l1s_rx_win_ctrl(uint16_t arfcn, enum l1_rxwin_type wtype)
/* FIXME: AGC */
/* FIXME: RF PLL */
/* Alignement */
tpu_enq_offset( (5000 + l1s.tpu_offset + (L1_BURST_LENGTH_Q * tn)) % 5000 );
tpu_enq_at(5000 - 1000 - (L1_BURST_LENGTH_Q * tn));
/* window open for TRF6151 */
/* FIXME: why do we need the magic value 100 ? */
rffe_mode(gsm_arfcn2band(arfcn), 0);
@ -96,16 +101,14 @@ void l1s_rx_win_ctrl(uint16_t arfcn, enum l1_rxwin_type wtype)
trf6151_set_mode(TRF6151_IDLE);
}
void l1s_tx_win_ctrl(uint16_t arfcn, enum l1_txwin_type wtype, uint8_t pwr)
void l1s_tx_win_ctrl(uint16_t arfcn, enum l1_txwin_type wtype, uint8_t pwr, uint8_t tn)
{
/* uplink is three TS after downlink ( "+ 32" gives a TA of 1) */
uint16_t offset = (L1_BURST_LENGTH_Q * 3) + 28;
/* this is needed to cause a delay of one more TDMA frame,
* otherwise we have an off-by-one error and send the bursts
* at the wrong point in time, resulting in only 3 out of 4
* bursts arriving at the BTS */
tpu_enq_at(5000 - 10); /* TPU_CLOCK_RANGE - EPSILON_SYNC */
/* Alignement */
tpu_enq_offset( (5000 + l1s.tpu_offset + (L1_BURST_LENGTH_Q * tn)) % 5000 );
tpu_enq_at(5000 - 10 - (L1_BURST_LENGTH_Q * tn));
#ifdef CONFIG_TX_ENABLE
/* window open for TRF6151 and RFFE */