2017-07-04 12:38:50 +00:00
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/*
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* OsmocomBB <-> SDR connection bridge
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* TDMA scheduler: channel combinations, burst mapping
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*
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* (C) 2013 by Andreas Eversberg <jolly@eversberg.eu>
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* (C) 2015 by Alexander Chemeris <Alexander.Chemeris@fairwaves.co>
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* (C) 2015 by Harald Welte <laforge@gnumonks.org>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU Affero General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include <osmocom/gsm/gsm_utils.h>
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2022-07-01 10:45:12 +00:00
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#include <osmocom/bb/trxcon/sched_trx.h>
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2017-07-04 12:38:50 +00:00
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/* Non-combined CCCH */
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static const struct trx_frame frame_bcch[51] = {
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2022-07-02 12:00:53 +00:00
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/* dl_chan dl_bid ul_chan ul_bid */
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_BCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_BCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_BCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_BCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_IDLE, 0, L1SCHED_RACH, 0 },
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2017-07-04 12:38:50 +00:00
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};
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/* Combined CCCH+SDCCH4 */
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static const struct trx_frame frame_bcch_sdcch4[102] = {
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2022-07-02 12:00:53 +00:00
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/* dl_chan dl_bid ul_chan ul_bid */
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{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 },
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{ L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 },
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{ L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 },
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{ L1SCHED_BCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_BCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_SACCH4_2, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_SACCH4_2, 1 },
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{ L1SCHED_CCCH, 2, L1SCHED_SACCH4_2, 2 },
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{ L1SCHED_CCCH, 3, L1SCHED_SACCH4_2, 3 },
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{ L1SCHED_FCCH, 0, L1SCHED_SACCH4_3, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_SACCH4_3, 1 },
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{ L1SCHED_CCCH, 0, L1SCHED_SACCH4_3, 2 },
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{ L1SCHED_CCCH, 1, L1SCHED_SACCH4_3, 3 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 },
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{ L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 },
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{ L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 },
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{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 },
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{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 },
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{ L1SCHED_SACCH4_0, 0, L1SCHED_SDCCH4_1, 1 },
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{ L1SCHED_SACCH4_0, 1, L1SCHED_SDCCH4_1, 2 },
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{ L1SCHED_SACCH4_0, 2, L1SCHED_SDCCH4_1, 3 },
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{ L1SCHED_SACCH4_0, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_SACCH4_1, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SACCH4_1, 1, L1SCHED_SDCCH4_2, 0 },
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{ L1SCHED_SACCH4_1, 2, L1SCHED_SDCCH4_2, 1 },
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{ L1SCHED_SACCH4_1, 3, L1SCHED_SDCCH4_2, 2 },
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{ L1SCHED_IDLE, 0, L1SCHED_SDCCH4_2, 3 },
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2017-07-04 12:38:50 +00:00
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2022-07-02 12:00:53 +00:00
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{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 },
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{ L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 },
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{ L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 },
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{ L1SCHED_BCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_BCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_SACCH4_0, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_SACCH4_0, 1 },
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{ L1SCHED_CCCH, 2, L1SCHED_SACCH4_0, 2 },
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{ L1SCHED_CCCH, 3, L1SCHED_SACCH4_0, 3 },
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{ L1SCHED_FCCH, 0, L1SCHED_SACCH4_1, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_SACCH4_1, 1 },
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{ L1SCHED_CCCH, 0, L1SCHED_SACCH4_1, 2 },
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{ L1SCHED_CCCH, 1, L1SCHED_SACCH4_1, 3 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_2, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 },
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{ L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 },
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{ L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 },
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{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 },
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{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 },
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{ L1SCHED_SACCH4_2, 0, L1SCHED_SDCCH4_1, 1 },
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{ L1SCHED_SACCH4_2, 1, L1SCHED_SDCCH4_1, 2 },
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{ L1SCHED_SACCH4_2, 2, L1SCHED_SDCCH4_1, 3 },
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{ L1SCHED_SACCH4_2, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_SACCH4_3, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SACCH4_3, 1, L1SCHED_SDCCH4_2, 0 },
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{ L1SCHED_SACCH4_3, 2, L1SCHED_SDCCH4_2, 1 },
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{ L1SCHED_SACCH4_3, 3, L1SCHED_SDCCH4_2, 2 },
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{ L1SCHED_IDLE, 0, L1SCHED_SDCCH4_2, 3 },
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2017-07-04 12:38:50 +00:00
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};
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trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
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static const struct trx_frame frame_bcch_sdcch4_cbch[102] = {
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2022-07-02 12:00:53 +00:00
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/* dl_chan dl_bid ul_chan ul_bid */
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{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 },
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{ L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 },
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{ L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 },
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{ L1SCHED_BCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_BCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_IDLE, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_IDLE, 1 },
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{ L1SCHED_CCCH, 2, L1SCHED_IDLE, 2 },
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{ L1SCHED_CCCH, 3, L1SCHED_IDLE, 3 },
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{ L1SCHED_FCCH, 0, L1SCHED_SACCH4_3, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_SACCH4_3, 1 },
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{ L1SCHED_CCCH, 0, L1SCHED_SACCH4_3, 2 },
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{ L1SCHED_CCCH, 1, L1SCHED_SACCH4_3, 3 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
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{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
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{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 },
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{ L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 },
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|
|
|
{ L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 1, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 },
|
|
|
|
{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 },
|
|
|
|
{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 },
|
|
|
|
{ L1SCHED_SACCH4_0, 0, L1SCHED_SDCCH4_1, 1 },
|
|
|
|
{ L1SCHED_SACCH4_0, 1, L1SCHED_SDCCH4_1, 2 },
|
|
|
|
{ L1SCHED_SACCH4_0, 2, L1SCHED_SDCCH4_1, 3 },
|
|
|
|
{ L1SCHED_SACCH4_0, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SACCH4_1, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SACCH4_1, 1, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SACCH4_1, 2, L1SCHED_IDLE, 1 },
|
|
|
|
{ L1SCHED_SACCH4_1, 3, L1SCHED_IDLE, 2 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 3 },
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
|
2022-07-02 12:00:53 +00:00
|
|
|
{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 },
|
|
|
|
{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 },
|
|
|
|
{ L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 },
|
|
|
|
{ L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 },
|
|
|
|
{ L1SCHED_BCCH, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_BCCH, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_CCCH, 0, L1SCHED_SACCH4_0, 0 },
|
|
|
|
{ L1SCHED_CCCH, 1, L1SCHED_SACCH4_0, 1 },
|
|
|
|
{ L1SCHED_CCCH, 2, L1SCHED_SACCH4_0, 2 },
|
|
|
|
{ L1SCHED_CCCH, 3, L1SCHED_SACCH4_0, 3 },
|
|
|
|
{ L1SCHED_FCCH, 0, L1SCHED_SACCH4_1, 0 },
|
|
|
|
{ L1SCHED_SCH, 0, L1SCHED_SACCH4_1, 1 },
|
|
|
|
{ L1SCHED_CCCH, 0, L1SCHED_SACCH4_1, 2 },
|
|
|
|
{ L1SCHED_CCCH, 1, L1SCHED_SACCH4_1, 3 },
|
|
|
|
{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_CCCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_CCCH, 1, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_CCCH, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_CCCH, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_FCCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 1, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 2, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_CBCH, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 },
|
|
|
|
{ L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 },
|
|
|
|
{ L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 },
|
|
|
|
{ L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SDCCH4_1, 1 },
|
|
|
|
{ L1SCHED_IDLE, 1, L1SCHED_SDCCH4_1, 2 },
|
|
|
|
{ L1SCHED_IDLE, 2, L1SCHED_SDCCH4_1, 3 },
|
|
|
|
{ L1SCHED_IDLE, 3, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SACCH4_3, 0, L1SCHED_RACH, 0 },
|
|
|
|
{ L1SCHED_SACCH4_3, 1, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SACCH4_3, 2, L1SCHED_IDLE, 1 },
|
|
|
|
{ L1SCHED_SACCH4_3, 3, L1SCHED_IDLE, 2 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 3 },
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
};
|
|
|
|
|
2017-07-04 12:38:50 +00:00
|
|
|
static const struct trx_frame frame_sdcch8[102] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_5, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_5, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_5, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_5, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 0, L1SCHED_SACCH8_6, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 1, L1SCHED_SACCH8_6, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 2, L1SCHED_SACCH8_6, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 3, L1SCHED_SACCH8_6, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 0, L1SCHED_SACCH8_7, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 1, L1SCHED_SACCH8_7, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 2, L1SCHED_SACCH8_7, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 3, L1SCHED_SACCH8_7, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 3, L1SCHED_SDCCH8_2, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 0, L1SCHED_SDCCH8_2, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 1, L1SCHED_SDCCH8_2, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 2, L1SCHED_SDCCH8_2, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 },
|
|
|
|
{ L1SCHED_SACCH8_0, 0, L1SCHED_SDCCH8_4, 1 },
|
|
|
|
{ L1SCHED_SACCH8_0, 1, L1SCHED_SDCCH8_4, 2 },
|
|
|
|
{ L1SCHED_SACCH8_0, 2, L1SCHED_SDCCH8_4, 3 },
|
|
|
|
{ L1SCHED_SACCH8_0, 3, L1SCHED_SDCCH8_5, 0 },
|
|
|
|
{ L1SCHED_SACCH8_1, 0, L1SCHED_SDCCH8_5, 1 },
|
|
|
|
{ L1SCHED_SACCH8_1, 1, L1SCHED_SDCCH8_5, 2 },
|
|
|
|
{ L1SCHED_SACCH8_1, 2, L1SCHED_SDCCH8_5, 3 },
|
|
|
|
{ L1SCHED_SACCH8_1, 3, L1SCHED_SDCCH8_6, 0 },
|
|
|
|
{ L1SCHED_SACCH8_2, 0, L1SCHED_SDCCH8_6, 1 },
|
|
|
|
{ L1SCHED_SACCH8_2, 1, L1SCHED_SDCCH8_6, 2 },
|
|
|
|
{ L1SCHED_SACCH8_2, 2, L1SCHED_SDCCH8_6, 3 },
|
|
|
|
{ L1SCHED_SACCH8_2, 3, L1SCHED_SDCCH8_7, 0 },
|
|
|
|
{ L1SCHED_SACCH8_3, 0, L1SCHED_SDCCH8_7, 1 },
|
|
|
|
{ L1SCHED_SACCH8_3, 1, L1SCHED_SDCCH8_7, 2 },
|
|
|
|
{ L1SCHED_SACCH8_3, 2, L1SCHED_SDCCH8_7, 3 },
|
|
|
|
{ L1SCHED_SACCH8_3, 3, L1SCHED_SACCH8_0, 0 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 1 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 2 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 3 },
|
2017-07-04 12:38:50 +00:00
|
|
|
|
2022-07-02 12:00:53 +00:00
|
|
|
{ L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_1, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_1, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_1, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_1, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 0, L1SCHED_SACCH8_2, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 1, L1SCHED_SACCH8_2, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 2, L1SCHED_SACCH8_2, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 3, L1SCHED_SACCH8_2, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 0, L1SCHED_SACCH8_3, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 1, L1SCHED_SACCH8_3, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 2, L1SCHED_SACCH8_3, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_2, 3, L1SCHED_SACCH8_3, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 3, L1SCHED_SDCCH8_2, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 0, L1SCHED_SDCCH8_2, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 1, L1SCHED_SDCCH8_2, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 2, L1SCHED_SDCCH8_2, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 },
|
|
|
|
{ L1SCHED_SACCH8_4, 0, L1SCHED_SDCCH8_4, 1 },
|
|
|
|
{ L1SCHED_SACCH8_4, 1, L1SCHED_SDCCH8_4, 2 },
|
|
|
|
{ L1SCHED_SACCH8_4, 2, L1SCHED_SDCCH8_4, 3 },
|
|
|
|
{ L1SCHED_SACCH8_4, 3, L1SCHED_SDCCH8_5, 0 },
|
|
|
|
{ L1SCHED_SACCH8_5, 0, L1SCHED_SDCCH8_5, 1 },
|
|
|
|
{ L1SCHED_SACCH8_5, 1, L1SCHED_SDCCH8_5, 2 },
|
|
|
|
{ L1SCHED_SACCH8_5, 2, L1SCHED_SDCCH8_5, 3 },
|
|
|
|
{ L1SCHED_SACCH8_5, 3, L1SCHED_SDCCH8_6, 0 },
|
|
|
|
{ L1SCHED_SACCH8_6, 0, L1SCHED_SDCCH8_6, 1 },
|
|
|
|
{ L1SCHED_SACCH8_6, 1, L1SCHED_SDCCH8_6, 2 },
|
|
|
|
{ L1SCHED_SACCH8_6, 2, L1SCHED_SDCCH8_6, 3 },
|
|
|
|
{ L1SCHED_SACCH8_6, 3, L1SCHED_SDCCH8_7, 0 },
|
|
|
|
{ L1SCHED_SACCH8_7, 0, L1SCHED_SDCCH8_7, 1 },
|
|
|
|
{ L1SCHED_SACCH8_7, 1, L1SCHED_SDCCH8_7, 2 },
|
|
|
|
{ L1SCHED_SACCH8_7, 2, L1SCHED_SDCCH8_7, 3 },
|
|
|
|
{ L1SCHED_SACCH8_7, 3, L1SCHED_SACCH8_4, 0 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 1 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 2 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 3 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
static const struct trx_frame frame_sdcch8_cbch[102] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_5, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_5, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_5, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_5, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 0, L1SCHED_SACCH8_6, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 1, L1SCHED_SACCH8_6, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 2, L1SCHED_SACCH8_6, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 3, L1SCHED_SACCH8_6, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 0, L1SCHED_SACCH8_7, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 1, L1SCHED_SACCH8_7, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 2, L1SCHED_SACCH8_7, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 3, L1SCHED_SACCH8_7, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 3, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 0, L1SCHED_IDLE, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 1, L1SCHED_IDLE, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 2, L1SCHED_IDLE, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 },
|
|
|
|
{ L1SCHED_SACCH8_0, 0, L1SCHED_SDCCH8_4, 1 },
|
|
|
|
{ L1SCHED_SACCH8_0, 1, L1SCHED_SDCCH8_4, 2 },
|
|
|
|
{ L1SCHED_SACCH8_0, 2, L1SCHED_SDCCH8_4, 3 },
|
|
|
|
{ L1SCHED_SACCH8_0, 3, L1SCHED_SDCCH8_5, 0 },
|
|
|
|
{ L1SCHED_SACCH8_1, 0, L1SCHED_SDCCH8_5, 1 },
|
|
|
|
{ L1SCHED_SACCH8_1, 1, L1SCHED_SDCCH8_5, 2 },
|
|
|
|
{ L1SCHED_SACCH8_1, 2, L1SCHED_SDCCH8_5, 3 },
|
|
|
|
{ L1SCHED_SACCH8_1, 3, L1SCHED_SDCCH8_6, 0 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SDCCH8_6, 1 },
|
|
|
|
{ L1SCHED_IDLE, 1, L1SCHED_SDCCH8_6, 2 },
|
|
|
|
{ L1SCHED_IDLE, 2, L1SCHED_SDCCH8_6, 3 },
|
|
|
|
{ L1SCHED_IDLE, 3, L1SCHED_SDCCH8_7, 0 },
|
|
|
|
{ L1SCHED_SACCH8_3, 0, L1SCHED_SDCCH8_7, 1 },
|
|
|
|
{ L1SCHED_SACCH8_3, 1, L1SCHED_SDCCH8_7, 2 },
|
|
|
|
{ L1SCHED_SACCH8_3, 2, L1SCHED_SDCCH8_7, 3 },
|
|
|
|
{ L1SCHED_SACCH8_3, 3, L1SCHED_SACCH8_0, 0 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 1 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 2 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 3 },
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
|
2022-07-02 12:00:53 +00:00
|
|
|
{ L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_1, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_1, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_1, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_1, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 1, L1SCHED_IDLE, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 2, L1SCHED_IDLE, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_1, 3, L1SCHED_IDLE, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 0, L1SCHED_SACCH8_3, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 1, L1SCHED_SACCH8_3, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 2, L1SCHED_SACCH8_3, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_CBCH, 3, L1SCHED_SACCH8_3, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_5, 3, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 0, L1SCHED_IDLE, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 1, L1SCHED_IDLE, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 2, L1SCHED_IDLE, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 },
|
|
|
|
{ L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 },
|
|
|
|
{ L1SCHED_SACCH8_4, 0, L1SCHED_SDCCH8_4, 1 },
|
|
|
|
{ L1SCHED_SACCH8_4, 1, L1SCHED_SDCCH8_4, 2 },
|
|
|
|
{ L1SCHED_SACCH8_4, 2, L1SCHED_SDCCH8_4, 3 },
|
|
|
|
{ L1SCHED_SACCH8_4, 3, L1SCHED_SDCCH8_5, 0 },
|
|
|
|
{ L1SCHED_SACCH8_5, 0, L1SCHED_SDCCH8_5, 1 },
|
|
|
|
{ L1SCHED_SACCH8_5, 1, L1SCHED_SDCCH8_5, 2 },
|
|
|
|
{ L1SCHED_SACCH8_5, 2, L1SCHED_SDCCH8_5, 3 },
|
|
|
|
{ L1SCHED_SACCH8_5, 3, L1SCHED_SDCCH8_6, 0 },
|
|
|
|
{ L1SCHED_SACCH8_6, 0, L1SCHED_SDCCH8_6, 1 },
|
|
|
|
{ L1SCHED_SACCH8_6, 1, L1SCHED_SDCCH8_6, 2 },
|
|
|
|
{ L1SCHED_SACCH8_6, 2, L1SCHED_SDCCH8_6, 3 },
|
|
|
|
{ L1SCHED_SACCH8_6, 3, L1SCHED_SDCCH8_7, 0 },
|
|
|
|
{ L1SCHED_SACCH8_7, 0, L1SCHED_SDCCH8_7, 1 },
|
|
|
|
{ L1SCHED_SACCH8_7, 1, L1SCHED_SDCCH8_7, 2 },
|
|
|
|
{ L1SCHED_SACCH8_7, 2, L1SCHED_SDCCH8_7, 3 },
|
|
|
|
{ L1SCHED_SACCH8_7, 3, L1SCHED_SACCH8_4, 0 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 1 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 2 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 3 },
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
};
|
|
|
|
|
2017-07-04 12:38:50 +00:00
|
|
|
static const struct trx_frame frame_tchf_ts0[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchf_ts1[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchf_ts2[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchf_ts3[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchf_ts4[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchf_ts5[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchf_ts6[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchf_ts7[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 },
|
|
|
|
{ L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 },
|
|
|
|
{ L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 },
|
|
|
|
{ L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 },
|
|
|
|
{ L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchh_ts01[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchh_ts23[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchh_ts45[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_tchh_ts67[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 },
|
|
|
|
{ L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 },
|
|
|
|
{ L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 },
|
|
|
|
{ L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 },
|
|
|
|
{ L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
static const struct trx_frame frame_pdch[104] = {
|
2022-07-02 12:00:53 +00:00
|
|
|
/* dl_chan dl_bid ul_chan ul_bid */
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PTCCH, 0, L1SCHED_PTCCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PTCCH, 1, L1SCHED_PTCCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PTCCH, 2, L1SCHED_PTCCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PTCCH, 3, L1SCHED_PTCCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 },
|
|
|
|
{ L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 },
|
|
|
|
{ L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 },
|
|
|
|
{ L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 },
|
|
|
|
{ L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 },
|
2017-07-04 12:38:50 +00:00
|
|
|
};
|
|
|
|
|
2019-05-28 12:19:00 +00:00
|
|
|
/* Logical channel mask for a single channel */
|
|
|
|
#define M64(x) \
|
|
|
|
((uint64_t) 0x01 << x)
|
|
|
|
|
|
|
|
/* Logical channel mask for BCCH+CCCH */
|
|
|
|
#define M64_BCCH_CCCH \
|
|
|
|
(uint64_t) 0x00 \
|
2022-07-02 12:00:53 +00:00
|
|
|
| M64(L1SCHED_FCCH) \
|
|
|
|
| M64(L1SCHED_SCH) \
|
|
|
|
| M64(L1SCHED_BCCH) \
|
|
|
|
| M64(L1SCHED_RACH) \
|
|
|
|
| M64(L1SCHED_CCCH)
|
2019-05-28 12:19:00 +00:00
|
|
|
|
|
|
|
/* Logical channel mask for SDCCH4 (with SACCH, all sub-channels) */
|
|
|
|
#define M64_SDCCH4 \
|
|
|
|
(uint64_t) 0x00 \
|
2022-07-02 12:00:53 +00:00
|
|
|
| M64(L1SCHED_SDCCH4_0) | M64(L1SCHED_SACCH4_0) \
|
|
|
|
| M64(L1SCHED_SDCCH4_1) | M64(L1SCHED_SACCH4_1) \
|
|
|
|
| M64(L1SCHED_SDCCH4_2) | M64(L1SCHED_SACCH4_2) \
|
|
|
|
| M64(L1SCHED_SDCCH4_3) | M64(L1SCHED_SACCH4_3)
|
2019-05-28 12:19:00 +00:00
|
|
|
|
|
|
|
/* Logical channel mask for SDCCH8 (with SACCH, all sub-channels) */
|
|
|
|
#define M64_SDCCH8 \
|
|
|
|
(uint64_t) 0x00 \
|
2022-07-02 12:00:53 +00:00
|
|
|
| M64(L1SCHED_SDCCH8_0) | M64(L1SCHED_SACCH8_0) \
|
|
|
|
| M64(L1SCHED_SDCCH8_1) | M64(L1SCHED_SACCH8_1) \
|
|
|
|
| M64(L1SCHED_SDCCH8_2) | M64(L1SCHED_SACCH8_2) \
|
|
|
|
| M64(L1SCHED_SDCCH8_3) | M64(L1SCHED_SACCH8_3) \
|
|
|
|
| M64(L1SCHED_SDCCH8_4) | M64(L1SCHED_SACCH8_4) \
|
|
|
|
| M64(L1SCHED_SDCCH8_5) | M64(L1SCHED_SACCH8_5) \
|
|
|
|
| M64(L1SCHED_SDCCH8_6) | M64(L1SCHED_SACCH8_6) \
|
|
|
|
| M64(L1SCHED_SDCCH8_7) | M64(L1SCHED_SACCH8_7)
|
2019-05-28 12:19:00 +00:00
|
|
|
|
|
|
|
/* Logical channel mask for TCH/F (with SACCH) */
|
|
|
|
#define M64_TCHF \
|
|
|
|
(uint64_t) 0x00 \
|
2022-07-02 12:00:53 +00:00
|
|
|
| M64(L1SCHED_TCHF) | M64(L1SCHED_SACCHTF)
|
2019-05-28 12:19:00 +00:00
|
|
|
|
|
|
|
/* Logical channel mask for TCH/H (with SACCH, all sub-channels) */
|
|
|
|
#define M64_TCHH \
|
|
|
|
(uint64_t) 0x00 \
|
2022-07-02 12:00:53 +00:00
|
|
|
| M64(L1SCHED_TCHH_0) | M64(L1SCHED_SACCHTH_0) \
|
|
|
|
| M64(L1SCHED_TCHH_1) | M64(L1SCHED_SACCHTH_1)
|
2019-05-28 12:19:00 +00:00
|
|
|
|
2017-07-04 12:38:50 +00:00
|
|
|
/**
|
|
|
|
* A few notes about frame count:
|
|
|
|
*
|
|
|
|
* 26 frame multiframe - traffic multiframe
|
|
|
|
* 51 frame multiframe - control multiframe
|
|
|
|
*
|
|
|
|
* 102 = 2 x 51 frame multiframe
|
|
|
|
* 104 = 4 x 26 frame multiframe
|
|
|
|
*/
|
|
|
|
static const struct trx_multiframe layouts[] = {
|
|
|
|
{
|
|
|
|
GSM_PCHAN_NONE, "NONE",
|
2019-05-28 12:19:00 +00:00
|
|
|
0, 0xff,
|
|
|
|
0x00,
|
2017-07-04 12:38:50 +00:00
|
|
|
NULL
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_CCCH, "BCCH+CCCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
51, 0xff,
|
|
|
|
M64_BCCH_CCCH,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_bcch
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_CCCH_SDCCH4, "BCCH+CCCH+SDCCH/4+SACCH/4",
|
2019-05-28 12:19:00 +00:00
|
|
|
102, 0xff,
|
|
|
|
M64_BCCH_CCCH | M64_SDCCH4,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_bcch_sdcch4
|
|
|
|
},
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
{
|
|
|
|
GSM_PCHAN_CCCH_SDCCH4_CBCH, "BCCH+CCCH+SDCCH/4+SACCH/4+CBCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
102, 0xff,
|
2022-07-02 12:00:53 +00:00
|
|
|
M64_BCCH_CCCH | M64_SDCCH4 | M64(L1SCHED_SDCCH4_CBCH),
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
frame_bcch_sdcch4_cbch
|
|
|
|
},
|
2017-07-04 12:38:50 +00:00
|
|
|
{
|
|
|
|
GSM_PCHAN_SDCCH8_SACCH8C, "SDCCH/8+SACCH/8",
|
2019-05-28 12:19:00 +00:00
|
|
|
102, 0xff,
|
|
|
|
M64_SDCCH8,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_sdcch8
|
|
|
|
},
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
{
|
|
|
|
GSM_PCHAN_SDCCH8_SACCH8C_CBCH, "SDCCH/8+SACCH/8+CBCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
102, 0xff,
|
2022-07-02 12:00:53 +00:00
|
|
|
M64_SDCCH8 | M64(L1SCHED_SDCCH8_CBCH),
|
trxcon/scheduler: add CCCH/SDCCH mframe layouts with CBCH
According to GSM TS 05.02, section 3.3.5, Cell Broadcast Channel
(CBCH) is a downlink only channel, which is used to carry the
short message service cell broadcast (SMSCB). CBCH is optional,
and uses the same physical channel as SDCCH. More precisely,
CBCH replaces sub-slot number 2 of SDCCH channels when enabled.
This change introduces the CBCH enabled multi-frame layouts,
and two separate logical channel types:
- GSM_PCHAN_CCCH_SDCCH4_CBCH (lchan TRXC_SDCCH4_CBCH),
- GSM_PCHAN_SDCCH8_SACCH8C_CBCH (lchan TRXC_SDCCH8_CBCH).
Both logical channels are separately identified using
the following Osmocom specific cbits:
- TRXC_SDCCH4_CBCH - 0x18 (0b11000),
- TRXC_SDCCH8_CBCH - 0x19 (0b11001).
The reason of this separation is that we somehow need to
distinguish between CBCH on C0/TS0, and CBCH on CX/TS0.
Unlike TRXC_SDCCH8_CBCH, TRXC_SDCCH4_CBCH is enabled
automatically (TRX_CH_FLAG_AUTO), so CBCH messages
can be decoded on C0 while being in idle mode.
Change-Id: Iad9905fc3a8a012ff1ada26ff95af384816f9873
2018-09-15 14:34:41 +00:00
|
|
|
frame_sdcch8_cbch
|
|
|
|
},
|
2017-07-04 12:38:50 +00:00
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x01,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts0
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x02,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts1
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x04,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts2
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x08,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts3
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x10,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts4
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x20,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts5
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x40,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts6
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_F, "TCH/F+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x80,
|
|
|
|
M64_TCHF,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchf_ts7
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_H, "TCH/H+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x03,
|
|
|
|
M64_TCHH,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchh_ts01
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_H, "TCH/H+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x0c,
|
|
|
|
M64_TCHH,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchh_ts23
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_H, "TCH/H+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0x30,
|
|
|
|
M64_TCHH,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchh_ts45
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_TCH_H, "TCH/H+SACCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0xc0,
|
|
|
|
M64_TCHH,
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_tchh_ts67
|
|
|
|
},
|
|
|
|
{
|
|
|
|
GSM_PCHAN_PDCH, "PDCH",
|
2019-05-28 12:19:00 +00:00
|
|
|
104, 0xff,
|
2022-07-02 12:00:53 +00:00
|
|
|
M64(L1SCHED_PDTCH) | M64(L1SCHED_PTCCH),
|
2017-07-04 12:38:50 +00:00
|
|
|
frame_pdch
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
const struct trx_multiframe *sched_mframe_layout(
|
2017-07-28 09:36:44 +00:00
|
|
|
enum gsm_phys_chan_config config, int tn)
|
2017-07-04 12:38:50 +00:00
|
|
|
{
|
|
|
|
int i, ts_allowed;
|
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(layouts); i++) {
|
2017-07-28 09:36:44 +00:00
|
|
|
ts_allowed = layouts[i].slotmask & (0x01 << tn);
|
2017-07-04 12:38:50 +00:00
|
|
|
if (layouts[i].chan_config == config && ts_allowed)
|
|
|
|
return &layouts[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|