637 lines
19 KiB
C
637 lines
19 KiB
C
/************************************************************************************
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* arch/arm/src/stm32/stm32f10xxx_rtc.c
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*
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* Copyright (C) 2011 Uros Platise. All rights reserved.
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* Author: Uros Platise <uros.platise@isotel.eu>
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*
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* With extensions, modifications by:
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregroy Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/* The STM32 RTC Driver offers standard precision of 1 Hz or High Resolution
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* operating at rate up to 16384 Hz. It provides UTC time and alarm interface
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* with external output pin (for wake-up).
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*
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* RTC is based on hardware RTC module which is located in a separate power
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* domain. The 32-bit counter is extended by 16-bit registers in BKP domain
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* STM32_BKP_DR1 to provide system equiv. function to the: time_t time(time_t *).
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*
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* Notation:
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* - clock refers to 32-bit hardware counter
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* - time is a combination of clock and upper bits stored in backuped domain
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* with unit of 1 [s]
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*
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* TODO: Error Handling in case LSE fails during start-up or during operation.
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*/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/rtc.h>
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#include <arch/board/board.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include "up_arch.h"
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#include "stm32_pwr.h"
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#include "stm32_rcc.h"
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#include "stm32_rtc.h"
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#include "stm32_waste.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* In hi-res mode, the RTC operates at 16384Hz. Overflow interrupts are handled
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* when the 32-bit RTC counter overflows every 3 days and 43 minutes. A BKP register
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* is incremented on each overflow interrupt creating, effectively, a 48-bit RTC
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* counter.
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*
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* In the lo-res mode, the RTC operates at 1Hz. Overflow interrupts are not handled
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* (because the next overflow is not expected until the year 2106.
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*
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* WARNING: Overflow interrupts are lost whenever the STM32 is powered down. The
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* overflow interrupt may be lost even if the STM32 is powered down only momentarily.
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* Therefor hi-res solution is only useful in systems where the power is always on.
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*/
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#ifdef CONFIG_RTC_HIRES
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# ifndef CONFIG_RTC_FREQUENCY
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# error "CONFIG_RTC_FREQUENCY is required for CONFIG_RTC_HIRES"
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# elif CONFIG_RTC_FREQUENCY != 16384
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# error "Only hi-res CONFIG_RTC_FREQUENCY of 16384Hz is supported"
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# endif
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#else
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# ifndef CONFIG_RTC_FREQUENCY
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# define CONFIG_RTC_FREQUENCY 1
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# endif
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# if CONFIG_RTC_FREQUENCY != 1
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# error "Only lo-res CONFIG_RTC_FREQUENCY of 1Hz is supported"
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# endif
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#endif
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#ifndef CONFIG_STM32_BKP
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# error "CONFIG_STM32_BKP is required for CONFIG_RTC"
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#endif
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/* RTC/BKP Definitions *************************************************************/
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/* STM32_RTC_PRESCALAR_VALUE
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* RTC pre-scalar value. The RTC is driven by a 32,768Hz input clock. This input
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* value is divided by this value (plus one) to generate the RTC frequency.
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* RTC_TIMEMSB_REG
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* The BKP module register used to hold the RTC overflow value. Overflows are
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* only handled in hi-res mode.
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* RTC_CLOCKS_SHIFT
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* The shift used to convert the hi-res timer LSB to one second. Not used with
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* the lo-res timer.
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*/
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#ifdef CONFIG_RTC_HIRES
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# define STM32_RTC_PRESCALAR_VALUE STM32_RTC_PRESCALER_MIN
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# define RTC_TIMEMSB_REG STM32_BKP_DR1
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# define RTC_CLOCKS_SHIFT 14
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#else
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# define STM32_RTC_PRESCALAR_VALUE STM32_RTC_PRESCALER_SECOND
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#endif
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/************************************************************************************
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* Private Types
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************************************************************************************/
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struct rtc_regvals_s
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{
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uint16_t cntl;
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uint16_t cnth;
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#ifdef CONFIG_RTC_HIRES
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uint16_t ovf;
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#endif
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};
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/************************************************************************************
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* Private Data
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************************************************************************************/
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/* Callback to use when the alarm expires */
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#ifdef CONFIG_RTC_ALARM
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static alarmcb_t g_alarmcb;
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/* Variable determines the state of the LSE oscilator.
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* Possible errors:
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* - on start-up
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* - during operation, reported by LSE interrupt
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*/
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volatile bool g_rtc_enabled = false;
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_rtc_beginwr
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*
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* Description:
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* Enter configuration mode
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_rtc_beginwr(void)
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{
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/* Previous write is done? */
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while ((getreg16(STM32_RTC_CRL) & RTC_CRL_RTOFF) == 0)
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{
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up_waste();
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}
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/* Enter Config mode, Set Value and Exit */
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modifyreg16(STM32_RTC_CRL, 0, RTC_CRL_CNF);
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}
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/************************************************************************************
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* Name: stm32_rtc_endwr
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*
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* Description:
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* Exit configuration mode
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_rtc_endwr(void)
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{
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modifyreg16(STM32_RTC_CRL, RTC_CRL_CNF, 0);
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}
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/************************************************************************************
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* Name: stm32_rtc_wait4rsf
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*
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* Description:
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* Wait for registers to synchronise with RTC module, call after power-up only
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_rtc_wait4rsf(void)
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{
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modifyreg16(STM32_RTC_CRL, RTC_CRL_RSF, 0);
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while ((getreg16(STM32_RTC_CRL) & RTC_CRL_RSF) == 0)
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{
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up_waste();
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}
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}
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/************************************************************************************
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* Name: up_rtc_breakout
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*
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* Description:
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* Set the RTC to the provided time.
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*
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* Input Parameters:
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* tp - the time to use
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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#ifdef CONFIG_RTC_HIRES
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static void up_rtc_breakout(FAR const struct timespec *tp,
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FAR struct rtc_regvals_s *regvals)
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{
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uint64_t frac;
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uint32_t cnt;
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uint16_t ovf;
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/* Break up the time in seconds + milleconds into the correct values for our use */
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frac = ((uint64_t)tp->tv_nsec * CONFIG_RTC_FREQUENCY) / 1000000000;
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cnt = (tp->tv_sec << RTC_CLOCKS_SHIFT) | ((uint32_t)frac & (CONFIG_RTC_FREQUENCY-1));
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ovf = (tp->tv_sec >> (32 - RTC_CLOCKS_SHIFT));
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/* Then return the broken out time */
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regvals->cnth = cnt >> 16;
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regvals->cntl = cnt & 0xffff;
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regvals->ovf = ovf;
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}
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#else
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static inline void up_rtc_breakout(FAR const struct timespec *tp,
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FAR struct rtc_regvals_s *regvals)
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{
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/* The low-res timer is easy... tv_sec holds exactly the value needed by the
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* CNTH/CNTL registers.
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*/
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regvals->cnth = (uint16_t)((uint32_t)tp->tv_sec >> 16);
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regvals->cntl = (uint16_t)((uint32_t)tp->tv_sec & 0xffff);
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}
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#endif
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/************************************************************************************
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* Name: stm32_rtc_interrupt
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*
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* Description:
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* RTC interrupt service routine
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*
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* Input Parameters:
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* irq - The IRQ number that generated the interrupt
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* context - Architecture specific register save information.
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*
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* Returned Value:
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* Zero (OK) on success; A negated errno value on failure.
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*
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************************************************************************************/
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#if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
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static int stm32_rtc_interrupt(int irq, void *context)
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{
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uint16_t source = getreg16(STM32_RTC_CRL);
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#ifdef CONFIG_RTC_HIRES
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if ((source & RTC_CRL_OWF) != 0)
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{
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putreg16(getreg16(RTC_TIMEMSB_REG) + 1, RTC_TIMEMSB_REG);
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}
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#endif
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#ifdef CONFIG_RTC_ALARM
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if ((source & RTC_CRL_ALRF) != 0 && g_alarmcb != NULL)
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{
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/* Alarm callback */
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g_alarmcb();
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g_alarmcb = NULL;
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}
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#endif
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/* Clear pending flags, leave RSF high */
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putreg16(RTC_CRL_RSF, STM32_RTC_CRL);
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return 0;
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}
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: up_rtcinitialize
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*
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* Description:
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* Initialize the hardware RTC per the selected configuration. This function is
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* called once during the OS initialization sequence
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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int up_rtcinitialize(void)
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{
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/* Set access to the peripheral, enable the backup domain (BKP) and the lower power
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* extern 32,768Hz (Low-Speed External, LSE) oscillator. Configure the LSE to
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* drive the RTC.
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*/
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stm32_pwr_enablebkp();
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stm32_rcc_enablelse();
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/* TODO: Get state from this function, if everything is
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* okay and whether it is already enabled (if it was disabled
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* reset upper time register)
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*/
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g_rtc_enabled = true;
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/* TODO: Possible stall? should we set the timeout period? and return with -1 */
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stm32_rtc_wait4rsf();
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/* Configure prescaler, note that these are write-only registers */
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stm32_rtc_beginwr();
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putreg16(STM32_RTC_PRESCALAR_VALUE >> 16, STM32_RTC_PRLH);
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putreg16(STM32_RTC_PRESCALAR_VALUE & 0xffff, STM32_RTC_PRLL);
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stm32_rtc_endwr();
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/* Configure RTC interrupt to catch overflow and alarm interrupts. */
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#if defined(CONFIG_RTC_HIRES) || defined(CONFIG_RTC_ALARM)
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irq_attach(STM32_IRQ_RTC, stm32_rtc_interrupt);
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up_enable_irq(STM32_IRQ_RTC);
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#endif
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/* Previous write is done? This is required prior writing into CRH */
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while ((getreg16(STM32_RTC_CRL) & RTC_CRL_RTOFF) == 0)
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{
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up_waste();
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}
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modifyreg16(STM32_RTC_CRH, 0, RTC_CRH_OWIE);
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/* Alarm Int via EXTI Line */
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/* STM32_IRQ_RTCALR 41: RTC alarm through EXTI line interrupt */
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return OK;
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}
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/************************************************************************************
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* Name: up_rtc_time
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*
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* Description:
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* Get the current time in seconds. This is similar to the standard time()
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* function. This interface is only required if the low-resolution RTC/counter
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* hardware implementation selected. It is only used by the RTOS during
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* intialization to set up the system time when CONFIG_RTC is set but neither
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* CONFIG_RTC_HIRES nor CONFIG_RTC_DATETIME are set.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* The current time in seconds
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*
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************************************************************************************/
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#ifndef CONFIG_RTC_HIRES
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time_t up_rtc_time(void)
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{
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irqstate_t flags;
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uint16_t cnth;
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uint16_t cntl;
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uint16_t tmp;
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/* The RTC counter is read from two 16-bit registers to form one 32-bit
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* value. Because these are non-atomic operations, many things can happen
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* between the two reads: This thread could get suspended or interrrupted
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* or the lower 16-bit counter could rollover between reads. Disabling
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* interrupts will prevent suspensions and interruptions:
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*/
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flags = irqsave();
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/* And the following loop will handle any clock rollover events that may
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* happen between samples. Most of the time (like 99.9%), the following
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* loop will execute only once. In the rare rollover case, it should
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* execute no more than 2 times.
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*/
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do
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{
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tmp = getreg16(STM32_RTC_CNTL);
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cnth = getreg16(STM32_RTC_CNTH);
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cntl = getreg16(STM32_RTC_CNTL);
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}
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/* The second sample of CNTL could be less than the first sample of CNTL
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* only if rollover occurred. In that case, CNTH may or may not be out
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* of sync. The best thing to do is try again until we know that no
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* rollover occurred.
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*/
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while (cntl < tmp);
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irqrestore(flags);
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/* Okay.. the samples should be as close together in time as possible and
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* we can be assured that no clock rollover occurred between the samples.
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*
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* Return the time in seconds.
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*/
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return (time_t)cnth << 16 | (time_t)cntl;
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}
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#endif
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/************************************************************************************
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* Name: up_rtc_gettime
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*
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* Description:
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* Get the current time from the high resolution RTC clock/counter. This interface
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* is only supported by the high-resolution RTC/counter hardware implementation.
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* It is used to replace the system timer.
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*
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* Input Parameters:
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* tp - The location to return the high resolution time value.
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno on failure
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*
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************************************************************************************/
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#ifdef CONFIG_RTC_HIRES
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int up_rtc_gettime(FAR struct timespec *tp)
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{
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irqstate_t flags;
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uint32_t ls;
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uint32_t ms;
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uint16_t ovf;
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uint16_t cnth;
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uint16_t cntl;
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uint16_t tmp;
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/* The RTC counter is read from two 16-bit registers to form one 32-bit
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* value. Because these are non-atomic operations, many things can happen
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* between the two reads: This thread could get suspended or interrrupted
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* or the lower 16-bit counter could rollover between reads. Disabling
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* interrupts will prevent suspensions and interruptions:
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*/
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flags = irqsave();
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/* And the following loop will handle any clock rollover events that may
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* happen between samples. Most of the time (like 99.9%), the following
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* loop will execute only once. In the rare rollover case, it should
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* execute no more than 2 times.
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*/
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do
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{
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tmp = getreg16(STM32_RTC_CNTL);
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cnth = getreg16(STM32_RTC_CNTH);
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ovf = getreg16(RTC_TIMEMSB_REG);
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cntl = getreg16(STM32_RTC_CNTL);
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}
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/* The second sample of CNTL could be less than the first sample of CNTL
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* only if rollover occurred. In that case, CNTH may or may not be out
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* of sync. The best thing to do is try again until we know that no
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* rollover occurred.
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*/
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while (cntl < tmp);
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irqrestore(flags);
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/* Okay.. the samples should be as close together in time as possible and
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* we can be assured that no clock rollover occurred between the samples.
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*
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* Create a 32-bit value from the LS and MS 16-bit RTC counter values and
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* from the MS and overflow 16-bit counter values.
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*/
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ls = (uint32_t)cnth << 16 | (uint32_t)cntl;
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ms = (uint32_t)ovf << 16 | (uint32_t)cnth;
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/* Then we can save the time in seconds and fractional seconds. */
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|
|
tp->tv_sec = (ms << (32-RTC_CLOCKS_SHIFT-16)) | (ls >> (RTC_CLOCKS_SHIFT+16));
|
|
tp->tv_nsec = (ls & (CONFIG_RTC_FREQUENCY-1)) * (1000000000/CONFIG_RTC_FREQUENCY);
|
|
return OK;
|
|
}
|
|
#endif
|
|
|
|
/************************************************************************************
|
|
* Name: up_rtc_settime
|
|
*
|
|
* Description:
|
|
* Set the RTC to the provided time. All RTC implementations must be able to
|
|
* set their time based on a standard timespec.
|
|
*
|
|
* Input Parameters:
|
|
* tp - the time to use
|
|
*
|
|
* Returned Value:
|
|
* Zero (OK) on success; a negated errno on failure
|
|
*
|
|
************************************************************************************/
|
|
|
|
int up_rtc_settime(FAR const struct timespec *tp)
|
|
{
|
|
struct rtc_regvals_s regvals;
|
|
irqstate_t flags;
|
|
|
|
/* Break out the time values */
|
|
|
|
up_rtc_breakout(tp, ®vals);
|
|
|
|
/* Then write the broken out values to the RTC counter and BKP overflow register
|
|
* (hi-res mode only)
|
|
*/
|
|
|
|
flags = irqsave();
|
|
stm32_rtc_beginwr();
|
|
putreg16(regvals.cnth, STM32_RTC_CNTH);
|
|
putreg16(regvals.cntl, STM32_RTC_CNTL);
|
|
stm32_rtc_endwr();
|
|
|
|
#ifdef CONFIG_RTC_HIRES
|
|
putreg16(regvals.ovf, RTC_TIMEMSB_REG);
|
|
#endif
|
|
irqrestore(flags);
|
|
return OK;
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: up_rtc_setalarm
|
|
*
|
|
* Description:
|
|
* Set up an alarm.
|
|
*
|
|
* Input Parameters:
|
|
* tp - the time to set the alarm
|
|
* callback - the function to call when the alarm expires.
|
|
*
|
|
* Returned Value:
|
|
* Zero (OK) on success; a negated errno on failure
|
|
*
|
|
************************************************************************************/
|
|
|
|
#ifdef CONFIG_RTC_ALARM
|
|
int up_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
|
|
{
|
|
struct rtc_regvals_s regvals;
|
|
irqstate_t flags;
|
|
int ret = -EBUSY;
|
|
|
|
/* Is there already something waiting on the ALARM? */
|
|
|
|
if (g_alarmcb == NULL)
|
|
{
|
|
/* No.. Save the callback function pointer */
|
|
|
|
g_alarmcb = callback;
|
|
|
|
/* Break out the time values */
|
|
|
|
up_rtc_breakout(tp, ®vals);
|
|
|
|
/* The set the alarm */
|
|
|
|
flags = irqsave();
|
|
stm32_rtc_beginwr();
|
|
putreg16(regvals.cnth, STM32_RTC_ALRH);
|
|
putreg16(regvals.cntl, STM32_RTC_ALRL);
|
|
stm32_rtc_endwr();
|
|
irqrestore(flags);
|
|
|
|
ret = OK;
|
|
}
|
|
return ret;
|
|
}
|
|
#endif
|