427 lines
13 KiB
C
427 lines
13 KiB
C
/****************************************************************************
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* pinsn32.h
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* 32-bit P-code operation code definitions
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __PINSN32_H
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#define __PINSN32_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* 32-bit op-code bit definitions
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*
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* Machine model:
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*
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* SPB 32-bit Pascal stack base address
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* SP 32-bit Pascal stack pointer
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* LSP 32-bit Level stack pointer
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* CSB 32-bit Character stack base address
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* CSP 32-bit Character stack pointer
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* DS 32-bit Data size register (for multiple reg transfers)
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* PC 32-bit Program Counter
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* CC Condition code register
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* --- Volatile general purpose registers
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* --- Static general purpose registers
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*
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* Condition codes: Z(ero), N(egative)
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*
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* +=====+=====+
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* | Z | N |
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* +=====+=====+=====+
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* | EQ | 1 | - |
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* | NEQ | 0 | - |
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* | LT | - | 1 |
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* | GTE | - | 0 |
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* | GT | 0 | 0 |
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* | LTE | 1 | 1 |
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* +=====+=====+=====+
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*
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* Opcode Encoding Summary:
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*
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* 0rxx xxxx 1rxxx xxxx
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* xr00 0000 NOP LD uoffs4
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* xr00 0001 NEG LDH uoffs3
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* xr00 0010 ABS LDB uoffs
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* xr00 0011 INC LDM uoffs4
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* xr00 0100 DEC ST uoffs4
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* xr00 0101 NOT STH uoffs2
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* xr00 0110 ADD STB uoffs
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* xr00 0111 SUB STM uoffs4
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* xr00 1000 MUL LDX uoffs4
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* xr00 1001 DIV LDXH uoffs2
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* xr00 1010 MOD LDXB uoffs
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* xr00 1011 SLL LDXM uoffs4
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* xr00 1100 SRL STX uoffs4
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* xr00 1101 SRA STXH uoffs2
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* xr00 1110 OR STXB uoffs
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* xr00 1111 AND STXM uoffs
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*
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* xr01 0000 EQUZ JEQUZ ilbl
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* xr01 0001 NEQZ JNEQZ ilbl
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* xr01 0010 LTZ JLTZ ilbl
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* xr01 0011 GTEZ JGTEZ ilbl
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* xr01 0100 GTZ JGTZ ilbl
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* xr01 0101 LTEZ JLTEZ ilbl
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* xr01 0110 --- JMP ilbl
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* xr01 0111 --- PUSH nn
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* xr01 1000 EQU JEQU ilbl
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* xr01 1001 NEQ JNEQ ilbl
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* xr01 1010 LT JLT ilbl
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* xr01 1011 GTE JGTE ilbl
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* xr01 1100 GT JGT ilbl
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* xr01 1101 LTE JLTE ilbl
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* xr01 1110 --- ---
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* xr01 1111 BIT INDS nn
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*
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* xr10 0000 LDI LDS offs4
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* xr10 0001 LDIH LDSH offs3
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* xr10 0010 LDIB LDSB offs
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* xr10 0011 LDIM LDSM offs4
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* xr10 0100 STI STS offs4
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* xr10 0101 STIH STSH offs2
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* xr10 0110 STIB STSB offs
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* xr10 0111 STIM STSM offs4
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* xr10 1000 DUP LDSX offs4
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* xr10 1001 --- LDSXH offs2
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* xr10 1010 PUSHS LDSXB offs
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* xr10 1011 POPS LDSXM offs4
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* xr10 1100 --- STSX offs4
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* xr10 1101 --- STSXH offs2
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* xr10 1110 --- STSXB offs
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* xr10 1111 RET STSXM offs
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*
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* xr11 0000 --- LA uoffs
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* xr11 0001 --- LAS offs
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* xr11 0010 --- LAC dlbl
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* xr11 0011 --- ---
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* xr11 0100 --- LAX uoffs
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* xr11 0101 --- LASX offs
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* xr11 0110 --- SLSP level
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* xr11 0111 --- SDC uu
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* xr11 1000 --- ---
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* xr11 1001 --- PCAL ilbl
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* xr11 1010 --- SYSIO fn,sop
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* xr11 1011 --- LIB lop
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* xr11 1100 --- FLOAT fop
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* xr11 1101 --- *LABEL ilbl
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* xr11 1110 --- *INCLUDE fn
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* xr11 1111 END *LINE lineno
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*
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* KEY:
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* r = Reserved bit (must be zero)
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* fn = 8-bit file number
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* lvl = 8-bit static nexting level
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* sop = 17-bit sysio operation
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* lineno = 17-bit line number
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* nn = 32-bit constant value (signed)
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* uu = 32-bit constant value (unsigned)
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* fop = 32-bit floating point operation
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* lop = 32-bit library call identifier
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* ilbl = 32-bit Instruction space label number
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* dlbl = 32-stack data label
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* offs4 = 32-bit word offset with respect to LSP (signed)
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* offs2 = 32-bit halfword offset with respect to LSP (signed)
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* offs = 32-bit byte offset with respect to LSP (signed)
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* uoffs4 = 32-bit word offset with respect to SPB (unsigned)
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* uoffs2 = 32-bit halfword offset with respect to SPB (unsigned)
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* uoffs = 32-bit byte offset with respect to SPB (unsigned)
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* c = string follows pseudo-operation
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* * = Indicates pseudo-operations (these are removed
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* after final fixup of the object file).
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*/
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#define o32 (0x80)
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#define GETOP(o) ((o)->op)
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#define PUTOP(o,v) do { (o)->op = (v); } while (0)
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#define GETARG(o) ((o)->arg)
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#define PUTARG(o,a) do { (o)->arg = (a); } while (0)
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#define ARGONES 0xffffffff
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/* The opcode binary is stored in big endian order (so that the opcode
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* always comes first). The following definitions simplify ordering
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* of byte accesses.
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*/
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#ifdef CONFIG_ENDIAN_BIG
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# define opB1 0
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# define opB2 1
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# define opB3 2
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# define opB4 3
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#else
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# define opB1 3
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# define opB2 2
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# define opB3 1
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# define opB4 0
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#endif
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/** 1-BYTE OPCODES WITH NO ARGUMENTS (other than stack arguments) ***********/
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/* Program control (No stack arguments) */
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#define oNOP (0x00)
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/* Arithmetic & logical & and integer conversions (One 32-bit stack
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* argument)
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*/
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#define oNEG (0x01)
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#define oABS (0x02)
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#define oINC (0x03)
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#define oDEC (0x04)
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#define oNOT (0x05)
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#define oADD (0x06)
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#define oSUB (0x07)
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#define oMUL (0x08)
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#define oDIV (0x09)
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#define oMOD (0x0a)
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#define oSLL (0x0b)
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#define oSRL (0x0c)
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#define oSRA (0x0d)
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#define oOR (0x0e)
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#define oAND (0x0f)
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/* Comparisons (One 32-bit stack argument) */
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#define oEQUZ (0x10)
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#define oNEQZ (0x11)
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#define oLTZ (0x12)
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#define oGTEZ (0x13)
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#define oGTZ (0x14)
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#define oLTEZ (0x15)
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/* Comparisons (Two 32-bit stack arguments) */
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#define oEQU (0x18)
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#define oNEQ (0x19)
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#define oLT (0x1a)
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#define oGTE (0x1b)
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#define oGT (0x1c)
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#define oLTE (0x1d)
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#define oBIT (0x1f)
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/* Load Immediate */
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#define oLDI (0x20) /* (One 32-bit stack argument) */
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#define oLDIH (0x21) /* (One 32-bit stack argument) */
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#define oLDIB (0x22) /* (One 32-bit stack argument) */
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#define oLDIM (0x23) /* (Two 32-bit stack argument) */
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/* Store Immediate */
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#define oSTI (0x24) /* (Two 32-bit stack argument) */
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#define oSTIH (0x25) /* (Two 32-bit stack argument) */
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#define oSTIB (0x26) /* (Two 32-bit stack argument) */
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#define oSTIM (0x27) /* (Two+n 32-bit stack argument) */
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/* Data stack */
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#define oDUP (0x28) /* (One 32-bit stack argument) */
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#define oDUPH (0x29) /* (One 32-bit stack argument) */
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#define oPUSHS (0x2a) /* No stack arguments */
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#define oPOPS (0x2b) /* (One 32-bit stack argument) */
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/* Program control (No stack arguments)
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* Behavior:
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* Pop return address
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* Pop saved base register (BR)
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* Discard saved base address
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* Set program counter (PC) to return address
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*/
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#define oRET (0x2f)
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/* System Functions (No stack arguments) */
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#define oEND (0x3f)
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/** 4-BYTE OPCODES INCLUDING ONE 32-BIT ARGUMENT ****************************/
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/* Load: arg = unsigned base offset */
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#define oLD (o32|0x00) /* No stack arguments */
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#define oLDH (o32|0x01) /* No stack arguments */
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#define oLDB (o32|0x02) /* No stack arguments */
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#define oLDM (o32|0x03) /* One 32-bit stack argument */
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/* Store: arg = unsigned base offset */
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#define oST (o32|0x04) /* One 32-bit stack argument */
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#define oSTH (o32|0x05) /* One 32-bit stack argument */
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#define oSTB (o32|0x06) /* One 32-bit stack argument */
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#define oSTM (o32|0x07) /* One+n 32-bit stack argument */
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/* Load Indexed: arg = unsigned base offset */
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#define oLDX (o32|0x08) /* One 32-bit stack argument */
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#define oLDXH (o32|0x09) /* One 32-bit stack argument */
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#define oLDXB (o32|0x0a) /* One 32-bit stack argument */
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#define oLDXM (o32|0x0b) /* Two 32-bit stack argument */
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/* Store Indexed: arg = unsigned base offset */
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#define oSTX (o32|0x0c) /* Two 32-bit stack argument */
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#define oSTXH (o32|0x0d) /* Two 32-bit stack argument */
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#define oSTXB (o32|0x0e) /* Two 32-bit stack argument */
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#define oSTXM (o32|0x0f) /* Two+n 32-bit stack argument */
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/* Program control: arg = unsigned label (One 32-bit stack argument) */
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#define oJEQUZ (o32|0x10)
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#define oJNEQZ (o32|0x11)
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#define oJLTZ (o32|0x12)
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#define oJGTEZ (o32|0x13)
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#define oJGTZ (o32|0x14)
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#define oJLTEZ (o32|0x15)
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/* Program control: arg = unsigned label (no stack arguments) */
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#define oJMP (o32|0x16)
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/* Data stack: arg = 32 bit signed data (no stack arguments) */
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#define oPUSH (o32|0x17)
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/* Program control: arg = unsigned label (One 32-bit stack argument) */
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#define oJEQU (o32|0x18)
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#define oJNEQ (o32|0x19)
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#define oJLT (o32|0x1a)
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#define oJGTE (o32|0x1b)
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#define oJGT (o32|0x1c)
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#define oJLTE (o32|0x1d)
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/* Data stack: arg = 32 bit signed data (no stack arguments) */
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#define oINDS (o32|0x1f)
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/* Load: Uses LSP; arg = signed frame offset */
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#define oLDS (o32|0x20) /* No stack arguments */
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#define oLDSH (o32|0x21) /* No stack arguments */
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#define oLDSB (o32|0x22) /* No stack arguments */
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#define oLDSM (o32|0x23) /* One 32-bit stack argument */
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/* Store: Uses LSP; arg = signed frame offset */
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#define oSTS (o32|0x24) /* One 32-bit stack argument */
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#define oSTSH (o32|0x25) /* One 32-bit stack argument */
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#define oSTSB (o32|0x26) /* One 32-bit stack argument */
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#define oSTSM (o32|0x27) /* One+n 32-bit stack argument */
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/* Load Indexed: Uses LSP; arg = signed frame offset */
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#define oLDSX (o32|0x28) /* One 32-bit stack argument */
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#define oLDSXH (o32|0x29) /* One 32-bit stack argument */
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#define oLDSXB (o32|0x2a) /* One 32-bit stack argument */
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#define oLDSXM (o32|0x2b) /* Two 32-bit stack argument */
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/* Store Indexed: Uses LSP; arg = signed frame offset */
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#define oSTSX (o32|0x2c) /* Two 32-bit stack argument */
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#define oSTSXH (o32|0x2d) /* Two 32-bit stack argument */
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#define oSTSXB (o32|0x2e) /* Two 32-bit stack argument */
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#define oSTSXM (o32|0x2f) /* Two+n 32-bit stack argument */
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/* Load address relative to stack base: arg = unsigned offset */
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#define oLA (o32|0x30)
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/* Load address: Uses SLP, arg = signed frame offset */
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#define oLAS (o32|0x31) /* No stack arguments */
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/* Load absolute stack address: arg = RODATA offset (No stack arguments) */
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#define oLAC (o32|0x32)
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/* Load address relative to stack base: arg = unsigned offset, TOS=index */
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#define oLAX (o32|0x34)
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/* Load address indexed: Uses SLP, arg = signed frame offset */
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#define oLASX (o32|0x35) /* No stack arguments */
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/* Set LSP: arg = new level that evaluates to LSP value */
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#define oSLSP (o32|0x36)
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/* Set DS: arg = new byte count in DS register */
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#define oSDC (o32|0x37)
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/* Program Control: Uses LSP; arg = unsigned label
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* (No stack arguments)
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* Behavior:
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* Push base address of level
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* Push base register (BR) value
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* Set new base register value (BR) as top of stack
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* Push return address
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* Set program counter (PC) for address associated with label
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*/
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#define oPCAL (o32|0x39)
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/* System calls: arg = file number | sub-function code */
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#define oSYSIO (o32|0x3a)
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/* System functions: arg = 32-bit library call identifier */
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#define oLIB (o32|0x3b)
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/* Floating point operations: arg = FP op-code */
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#define oFLOAT (o32|0x3c)
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/* Program control: arg = unsigned label (no stack arguments) */
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#define oLABEL (o32|0x3d)
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/* Pseudo-operations: arg = file number OR line number */
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#define oINCLUDE (o32|0x3e)
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#define oLINE (o32|0x3f)
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#endif /* __PINSN32_H */
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