975 lines
27 KiB
C
Executable File
975 lines
27 KiB
C
Executable File
/****************************************************************************
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* arch/arm/src/lpc2378/lpc23xx_serial.c
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*
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* Copyright (C) 2010 Rommel Marcelo. All rights reserved.
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* Author: Rommel Marcelo
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*
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* This file is part of the NuttX RTOS and based on the lpc2148 port:
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*
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* Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <semaphore.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/serial.h>
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#include <arch/serial.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "os_internal.h"
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#include "internal.h"
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#include "lpc23xx_scb.h"
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#include "lpc23xx_pinsel.h"
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#include "lpc23xx_uart.h"
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#include "lpc23xx_vic.h"
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#ifdef USE_SERIALDRIVER
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct up_dev_s
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{
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uint32_t uartbase; /* Base address of UART registers */
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uint32_t baud; /* Configured baud */
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uint8_t ier; /* Saved IER value */
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uint8_t irq; /* IRQ associated with this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev);
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static void up_shutdown(struct uart_dev_s *dev);
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static int up_attach(struct uart_dev_s *dev);
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static void up_detach(struct uart_dev_s *dev);
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static int up_interrupt(int irq, void *context);
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static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
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static int up_receive(struct uart_dev_s *dev, uint32_t * status);
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static void up_rxint(struct uart_dev_s *dev, bool enable);
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static bool up_rxavailable(struct uart_dev_s *dev);
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static void up_send(struct uart_dev_s *dev, int ch);
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static void up_txint(struct uart_dev_s *dev, bool enable);
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static bool up_txready(struct uart_dev_s *dev);
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static bool up_txempty(struct uart_dev_s *dev);
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/****************************************************************************
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* Private Variables
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****************************************************************************/
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struct uart_ops_s g_uart_ops =
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{
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.setup = up_setup,
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.shutdown = up_shutdown,
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.attach = up_attach,
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.detach = up_detach,
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.ioctl = up_ioctl,
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.receive = up_receive,
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.rxint = up_rxint,
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.rxavailable = up_rxavailable,
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.send = up_send,
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.txint = up_txint,
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.txready = up_txready,
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.txempty = up_txempty,
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};
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/* I/O buffers */
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static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
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static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
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static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
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static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
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/* This describes the state of the LPC214X uart0 port. */
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#ifdef CONFIG_UART0
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static struct up_dev_s g_uart0priv =
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{
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.uartbase = UART0_BASE_ADDR,
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.baud = CONFIG_UART0_BAUD,
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.irq = UART0_IRQ,
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.parity = CONFIG_UART0_PARITY,
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.bits = CONFIG_UART0_BITS,
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.stopbits2 = CONFIG_UART0_2STOP,
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};
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static uart_dev_t g_uart0port =
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{
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.recv =
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{
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.size = CONFIG_UART0_RXBUFSIZE,
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.buffer = g_uart0rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART0_TXBUFSIZE,
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.buffer = g_uart0txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart0priv,
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};
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#endif
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#ifdef CONFIG_UART2
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/* This describes the state of the LPC23XX uart2 port. */
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static struct up_dev_s g_uart2priv =
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{
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.uartbase = UART2_BASE_ADDR,
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.baud = CONFIG_UART2_BAUD,
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.irq = UART2_IRQ,
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.parity = CONFIG_UART2_PARITY,
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.bits = CONFIG_UART2_BITS,
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.stopbits2 = CONFIG_UART2_2STOP,
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};
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static uart_dev_t g_uart2port =
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{
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.recv =
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{
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.size = CONFIG_UART2_RXBUFSIZE,
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.buffer = g_uart2rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART2_TXBUFSIZE,
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.buffer = g_uart2txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uart2priv,
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};
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#endif
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/* Now, which one with be tty0/console and which tty1? */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart0port
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# define TTYS0_DEV g_uart0port
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# define TTYS1_DEV g_uart2port
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_DEV g_uart2port
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# define TTYS0_DEV g_uart2port
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# define TTYS1_DEV g_uart0port
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#else
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_serialin
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****************************************************************************/
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static inline uint8_t up_serialin(struct up_dev_s *priv, int offset)
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{
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return getreg8(priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_serialout
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****************************************************************************/
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static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value)
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{
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putreg8(value, priv->uartbase + offset);
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}
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/****************************************************************************
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* Name: up_disableuartint
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****************************************************************************/
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static inline void up_disableuartint(struct up_dev_s *priv, uint8_t * ier)
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{
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if (ier)
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{
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*ier = priv->ier & IER_ALLIE;
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}
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priv->ier &= ~IER_ALLIE;
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up_serialout(priv, UART_IER_OFFSET, priv->ier);
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}
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/****************************************************************************
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* Name: up_restoreuartint
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****************************************************************************/
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static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t ier)
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{
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priv->ier |= ier & IER_ALLIE;
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up_serialout(priv, UART_IER_OFFSET, priv->ier);
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}
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/****************************************************************************
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* Name: up_waittxready
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****************************************************************************/
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static inline void up_waittxready(struct up_dev_s *priv)
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{
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int tmp;
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/* Limit how long we will wait for the TX available condition */
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for (tmp = 1000; tmp > 0; tmp--)
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{
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/* Check if the tranmitter holding register (THR) is empty */
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if ((up_serialin(priv, UART_LSR_OFFSET) & LSR_THRE) != 0)
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{
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/* The THR is empty, return */
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break;
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}
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}
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}
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/****************************************************************************
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* Name: up_enablebreaks
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****************************************************************************/
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static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
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{
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uint8_t lcr = up_serialin(priv, UART_LCR_OFFSET);
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if (enable)
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{
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lcr |= LCR_BREAK_ENABLE;
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}
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else
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{
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lcr &= ~LCR_BREAK_ENABLE;
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}
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up_serialout(priv, UART_LCR_OFFSET, lcr);
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}
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/****************************************************************************
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* Name: up_configbaud
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****************************************************************************/
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static inline void up_configbaud(struct up_dev_s *priv)
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{
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/* In a buckled-up, embedded system, there is no reason to constantly
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* calculate the following. The calculation can be skipped if the MULVAL,
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* DIVADDVAL, and DIVISOR values are provided in the configuration file.
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*/
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#ifndef CONFIG_UART_MULVAL
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uint32_t qtrclk;
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/* Test values calculated for every multiplier/divisor combination */
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uint32_t tdiv;
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uint32_t terr;
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int tmulval;
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int tdivaddval;
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/* Optimal multiplier/divider values */
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uint32_t div = 0;
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uint32_t err = 100000;
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int mulval = 1;
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int divaddval = 0;
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/* Baud is generated using FDR and DLL-DLM registers
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*
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* baud = clock * (mulval/(mulval+divaddval) / (16 * div)
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*
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* Or
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*
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* div = (clock/16) * (mulval/(mulval+divaddval) / baud
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*
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* Where mulval = Fractional divider multiplier
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* divaddval = Fractional divider pre-scale div
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* div = DLL-DLM divisor
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*/
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/* Get UART block clock divided by 16 */
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qtrclk = U0_PCLK >> 4; /* TODO: Different Uart port with different clocking */
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/* Try every valid multiplier, tmulval (or until a perfect match is found). */
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for (tmulval = 1; tmulval <= 15 && err > 0; tmulval++)
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{
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/* Try every valid pre-scale div, tdivaddval (or until a perfect match is
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* found).
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*/
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for (tdivaddval = 0; tdivaddval <= 15 && err > 0; tdivaddval++)
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{
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/* Calculate the divisor with these fractional divider settings */
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uint32_t tmp = (tmulval * qtrclk) / ((tmulval + tdivaddval));
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tdiv = (tmp + (priv->baud >> 1)) / priv->baud;
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/* Check if this candidate divisor is within a valid range */
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if (tdiv > 2 && tdiv < 0x10000)
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{
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/* Calculate the actual baud and the error */
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uint32_t actualbaud = tmp / tdiv;
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if (actualbaud <= priv->baud)
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{
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terr = priv->baud - actualbaud;
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}
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else
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{
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terr = actualbaud - priv->baud;
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}
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/* Is this the smallest error we have encountered? */
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if (terr < err)
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{
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/* Yes, save these settings as the new, candidate optimal
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* settings
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*/
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mulval = tmulval;
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divaddval = tdivaddval;
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div = tdiv;
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err = terr;
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}
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}
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}
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}
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/* Configure the MS and LS DLAB registers */
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up_serialout(priv, UART_DLM_OFFSET, div >> 8);
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up_serialout(priv, UART_DLL_OFFSET, div & 0xff);
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/* Configure the Fractional Divider Register (FDR) */
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up_serialout(priv, UART_FDR_OFFSET, ((mulval << 4) | divaddval));
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#else
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/* Configure the MS and LS DLAB registers */
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up_serialout(priv, UART_DLM_OFFSET, DLMVAL >> 8);
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up_serialout(priv, UART_DLL_OFFSET, DLLVAL & 0xff);
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/* Configure the Fractional Divider Register (FDR) */
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up_serialout(priv, UART_FDR_OFFSET, ((MULVAL << 4) | DIVADDVAL));
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#endif
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}
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/****************************************************************************
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* Name: up_setup
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*
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* Description:
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* Configure the UART baud, bits, parity, fifos, etc. This
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* method is called the first time that the serial port is
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* opened.
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*
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev)
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{
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#ifndef CONFIG_SUPPRESS_LPC214X_UART_CONFIG
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint8_t lcr;
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/* Clear fifos */
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up_serialout(priv, UART_FCR_OFFSET, (FCR_RX_FIFO_RESET | FCR_TX_FIFO_RESET));
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/* Set trigger */
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up_serialout(priv, UART_FCR_OFFSET, (FCR_FIFO_ENABLE | FCR_FIFO_TRIG14));
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/* Set up the IER */
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priv->ier = up_serialin(priv, UART_IER_OFFSET);
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/* Set up the Line Control Register */
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lcr = 0;
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lcr |= (priv->bits == 7) ? LCR_CHAR_7 : LCR_CHAR_8;
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if (priv->stopbits2)
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{
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lcr |= LCR_STOP_2;
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}
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if (priv->parity == 1)
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{
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lcr |= LCR_PAR_ODD;
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}
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else if (priv->parity == 2)
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{
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lcr |= LCR_PAR_EVEN;
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}
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/* Enable access to latch divisor DLAB=1 */
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up_serialout(priv, UART_LCR_OFFSET, (lcr | LCR_DLAB_ENABLE));
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/* find values for DLL, DLM, DIVADDVAL, MULVAL */
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up_configbaud(priv);
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/* Disable access to latch divisor Clear DLAB */
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up_serialout(priv, UART_LCR_OFFSET, lcr);
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/* Configure the FIFOs */
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up_serialout(priv, UART_FCR_OFFSET,
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(FCR_FIFO_TRIG8 | FCR_TX_FIFO_RESET |
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FCR_RX_FIFO_RESET | FCR_FIFO_ENABLE));
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/* The NuttX serial driver waits for the first THRE interrrupt before sending
|
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* serial data... However, it appears that the LPC2378 hardware too does not
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* generate that interrupt until a transition from not-empty to empty. So,
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* the current kludge here is to send one NULL at startup to kick things off.
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*/
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up_serialout(priv, UART_THR_OFFSET, '\0');
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#endif
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return OK;
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}
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|
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/****************************************************************************
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* Name: up_shutdown
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*
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* Description:
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* Disable the UART. This method is called when the serial
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* port is closed
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*
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****************************************************************************/
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static void up_shutdown(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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up_disableuartint(priv, NULL);
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}
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|
|
/****************************************************************************
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|
* Name: up_attach
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*
|
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* Description:
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* Configure the UART to operation in interrupt driven mode. This method is
|
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* called when the serial port is opened. Normally, this is just after the
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* the setup() method is called, however, the serial console may operate in
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* a non-interrupt driven mode during the boot phase.
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*
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* RX and TX interrupts are not enabled when by the attach method (unless the
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* hardware supports multiple levels of interrupt enabling). The RX and TX
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* interrupts are not enabled until the txint() and rxint() methods are called.
|
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*
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****************************************************************************/
|
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static int up_attach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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int ret;
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|
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/* Attach and enable the IRQ */
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|
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ret = irq_attach(priv->irq, up_interrupt);
|
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if (ret == OK)
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{
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/* Enable the interrupt (RX and TX interrupts are still disabled in the
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* UART */
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|
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up_enable_irq(priv->irq);
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|
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/* Set the uart interrupt priority (the default value is one) */
|
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if (priv->uartbase == UART0_BASE_ADDR)
|
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{
|
|
up_prioritize_irq(priv->irq, PRIORITY_LOWEST);
|
|
}
|
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else if (priv->uartbase == UART2_BASE_ADDR)
|
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{
|
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up_prioritize_irq(priv->irq, 10);
|
|
}
|
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|
|
}
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_detach
|
|
*
|
|
* Description:
|
|
* Detach UART interrupts. This method is called when the serial port is
|
|
* closed normally just before the shutdown method is called. The exception is
|
|
* the serial console which is never shutdown.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_detach(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
up_disable_irq(priv->irq);
|
|
irq_detach(priv->irq);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_interrupt
|
|
*
|
|
* Description:
|
|
* This is the UART interrupt handler. It will be invoked
|
|
* when an interrupt received on the 'irq' It should call
|
|
* uart_transmitchars or uart_receivechar to perform the
|
|
* appropriate data transfers. The interrupt handling logic\
|
|
* must be able to map the 'irq' number into the approprite
|
|
* uart_dev_s structure in order to call these functions.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_interrupt(int irq, void *context)
|
|
{
|
|
struct uart_dev_s *dev = NULL;
|
|
struct up_dev_s *priv;
|
|
uint8_t status;
|
|
int passes;
|
|
|
|
if (g_uart0priv.irq == irq)
|
|
{
|
|
dev = &g_uart0port;
|
|
}
|
|
else if (g_uart2priv.irq == irq)
|
|
{
|
|
dev = &g_uart2port;
|
|
}
|
|
else
|
|
{
|
|
PANIC(OSERR_INTERNAL);
|
|
}
|
|
priv = (struct up_dev_s *)dev->priv;
|
|
|
|
/* Loop until there are no characters to be transferred or, until we have
|
|
* been looping for a long time. */
|
|
|
|
for (passes = 0; passes < 256; passes++)
|
|
{
|
|
/* Get the current UART status and check for loop termination conditions */
|
|
|
|
status = up_serialin(priv, UART_IIR_OFFSET);
|
|
|
|
/* The NO INTERRUPT should be zero if there are pending interrupts */
|
|
|
|
if ((status & IIR_NO_INT) != 0)
|
|
{
|
|
/* Break out of the loop when there is no longer a pending interrupt */
|
|
|
|
break;
|
|
}
|
|
|
|
/* Handle the interrupt by its interrupt ID field */
|
|
|
|
switch (status & IIR_MASK)
|
|
{
|
|
/* Handle incoming, receive bytes (with or without timeout) */
|
|
|
|
case IIR_RDA_INT:
|
|
case IIR_CTI_INT:
|
|
{
|
|
uart_recvchars(dev);
|
|
break;
|
|
}
|
|
|
|
/* Handle outgoing, transmit bytes */
|
|
|
|
case IIR_THRE_INT:
|
|
{
|
|
uart_xmitchars(dev);
|
|
break;
|
|
}
|
|
|
|
/* Just clear modem status interrupts (UART1 only) */
|
|
|
|
case IIR_MS_INT:
|
|
{
|
|
/* Read the modem status register (MSR) to clear */
|
|
|
|
status = up_serialin(priv, UART_MSR_OFFSET);
|
|
vdbg("MSR: %02x\n", status);
|
|
break;
|
|
}
|
|
|
|
/* Just clear any line status interrupts */
|
|
|
|
case IIR_RLS_INT:
|
|
{
|
|
/* Read the line status register (LSR) to clear */
|
|
|
|
status = up_serialin(priv, UART_LSR_OFFSET);
|
|
vdbg("LSR: %02x\n", status);
|
|
break;
|
|
}
|
|
|
|
/* There should be no other values */
|
|
|
|
default:
|
|
{
|
|
dbg("Unexpected IIR: %02x\n", status);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_ioctl
|
|
*
|
|
* Description:
|
|
* All ioctl calls will be routed through this method
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
|
|
{
|
|
struct inode *inode = filep->f_inode;
|
|
struct uart_dev_s *dev = inode->i_private;
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
int ret = OK;
|
|
|
|
switch (cmd)
|
|
{
|
|
case TIOCSERGSTRUCT:
|
|
{
|
|
struct up_dev_s *user = (struct up_dev_s *)arg;
|
|
if (!user)
|
|
{
|
|
*get_errno_ptr() = EINVAL;
|
|
ret = ERROR;
|
|
}
|
|
else
|
|
{
|
|
memcpy(user, dev, sizeof(struct up_dev_s));
|
|
}
|
|
}
|
|
break;
|
|
|
|
case TIOCSBRK: /* BSD compatibility: Turn break on,
|
|
* unconditionally */
|
|
{
|
|
irqstate_t flags = irqsave();
|
|
up_enablebreaks(priv, true);
|
|
irqrestore(flags);
|
|
}
|
|
break;
|
|
|
|
case TIOCCBRK: /* BSD compatibility: Turn break off,
|
|
* unconditionally */
|
|
{
|
|
irqstate_t flags;
|
|
flags = irqsave();
|
|
up_enablebreaks(priv, false);
|
|
irqrestore(flags);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
*get_errno_ptr() = ENOTTY;
|
|
ret = ERROR;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_receive
|
|
*
|
|
* Description:
|
|
* Called (usually) from the interrupt level to receive one
|
|
* character from the UART. Error bits associated with the
|
|
* receipt are provided in the return 'status'.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int up_receive(struct uart_dev_s *dev, uint32_t * status)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
uint8_t rbr;
|
|
|
|
*status = up_serialin(priv, UART_LSR_OFFSET);
|
|
rbr = up_serialin(priv, UART_RBR_OFFSET);
|
|
return rbr;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_rxint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable RX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_rxint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
if (enable)
|
|
{
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
priv->ier |= IER_ERBFI;
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
priv->ier &= ~IER_ERBFI;
|
|
}
|
|
up_serialout(priv, UART_IER_OFFSET, priv->ier);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_rxavailable
|
|
*
|
|
* Description:
|
|
* Return true if the receive fifo is not empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_rxavailable(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, UART_LSR_OFFSET) & LSR_RDR) != 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_send
|
|
*
|
|
* Description:
|
|
* This method will send one byte on the UART
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_send(struct uart_dev_s *dev, int ch)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
up_serialout(priv, UART_THR_OFFSET, (uint8_t) ch);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txint
|
|
*
|
|
* Description:
|
|
* Call to enable or disable TX interrupts
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void up_txint(struct uart_dev_s *dev, bool enable)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
if (enable)
|
|
{
|
|
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
|
priv->ier |= IER_ETBEI;
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
priv->ier &= ~IER_ETBEI;
|
|
}
|
|
up_serialout(priv, UART_IER_OFFSET, priv->ier);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txready
|
|
*
|
|
* Description:
|
|
* Return true if the tranmsit fifo is not full
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_txready(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, UART_LSR_OFFSET) & LSR_THRE) != 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_txempty
|
|
*
|
|
* Description:
|
|
* Return true if the transmit fifo is empty
|
|
*
|
|
****************************************************************************/
|
|
|
|
static bool up_txempty(struct uart_dev_s *dev)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
|
|
return ((up_serialin(priv, UART_LSR_OFFSET) & LSR_THRE) != 0);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Funtions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: up_serialinit
|
|
*
|
|
* Description:
|
|
* Performs the low level UART initialization early in
|
|
* debug so that the serial console will be available
|
|
* during bootup. This must be called before up_serialinit.
|
|
*
|
|
****************************************************************************/
|
|
|
|
void up_earlyserialinit(void)
|
|
{
|
|
/* Enable UART0 and 2 */
|
|
|
|
uint32_t pinsel = getreg32(LPC23XX_PINSEL0);
|
|
|
|
pinsel &= ~(UART0_PINMASK | UART2_PINMASK);
|
|
pinsel |= (UART0_PINSEL | UART2_PINSEL);
|
|
|
|
putreg32(pinsel, LPC23XX_PINSEL0);
|
|
|
|
/* Set Uart PCLK divider */
|
|
|
|
SCB_PCLKSEL0 = (SCB_PCLKSEL0 & ~U0_PCLKSEL_MASK) | U0_PCLKSEL;
|
|
SCB_PCLKSEL1 = (SCB_PCLKSEL1 & ~U2_PCLKSEL_MASK) | U2_PCLKSEL;
|
|
|
|
/* Disable both UARTS */
|
|
|
|
up_disableuartint(TTYS0_DEV.priv, NULL);
|
|
up_disableuartint(TTYS1_DEV.priv, NULL);
|
|
|
|
/* Configuration whichever one is the console */
|
|
|
|
CONSOLE_DEV.isconsole = true;
|
|
up_setup(&CONSOLE_DEV);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_serialinit
|
|
*
|
|
* Description:
|
|
* Register serial console and serial ports. This assumes
|
|
* that up_earlyserialinit was called previously.
|
|
*
|
|
****************************************************************************/
|
|
|
|
void up_serialinit(void)
|
|
{
|
|
(void)uart_register("/dev/console", &CONSOLE_DEV);
|
|
(void)uart_register("/dev/ttyS0", &TTYS0_DEV);
|
|
(void)uart_register("/dev/ttyS1", &TTYS1_DEV);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: up_putc
|
|
*
|
|
* Description:
|
|
* Provide priority, low-level access to support OS debug writes
|
|
*
|
|
****************************************************************************/
|
|
|
|
int up_putc(int ch)
|
|
{
|
|
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
|
|
uint8_t ier;
|
|
|
|
up_disableuartint(priv, &ier);
|
|
up_waittxready(priv);
|
|
up_serialout(priv, UART_THR_OFFSET, (uint8_t) ch);
|
|
|
|
/* Check for LF */
|
|
|
|
if (ch == '\n')
|
|
{
|
|
/* Add CR */
|
|
|
|
up_waittxready(priv);
|
|
up_serialout(priv, UART_THR_OFFSET, '\r');
|
|
}
|
|
|
|
up_waittxready(priv);
|
|
up_restoreuartint(priv, ier);
|
|
return ch;
|
|
}
|
|
|
|
#else /* USE_SERIALDRIVER */
|
|
|
|
/****************************************************************************
|
|
* Name: up_putc
|
|
*
|
|
* Description:
|
|
* Provide priority, low-level access to support OS debug writes
|
|
*
|
|
****************************************************************************/
|
|
|
|
int up_putc(int ch)
|
|
{
|
|
/* Check for LF */
|
|
|
|
if (ch == '\n')
|
|
{
|
|
/* Add CR */
|
|
|
|
up_lowputc('\r');
|
|
}
|
|
|
|
up_lowputc(ch);
|
|
return ch;
|
|
}
|
|
#endif /* USE_SERIALDRIVER */
|