192 lines
6.4 KiB
C
192 lines
6.4 KiB
C
/************************************************************************************
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* configs/stm3210e-eval/src/up_extmem.c
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* arch/arm/src/board/up_extmem.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <arch/board/board.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "stm32_fsmc.h"
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#include "stm32_gpio.h"
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#include "stm32_internal.h"
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#include "stm3210e-internal.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#ifndef CONFIG_STM32_FSMC
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# warning "FSMC is not enabled"
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#endif
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#if STM32_NGPIO_PORTS < 6
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# error "Required GPIO ports not enabled"
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/* 512Kx16 SRAM is connected to bank2 of the FSMC interface and both 8- and 16-bit
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* accesses are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM,
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* respectively.
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*
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* Pin Usage (per schematic)
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*
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* FLASH SRAM NAND LCD
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* D[0..15] [0..15] [0..15] [0..7] [0..15]
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* A[0..23] [0..22] [0..18] [16,17] [0]
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* FSMC_NBL0 PE0 OUT ~BLE --- --- ---
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* FSMC_NBL1 PE1 OUT ~BHE --- --- ---
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* FSMC_NE2 PG9 OUT --- ~E --- ---
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* FSMC_NE3 PG10 OUT ~CE --- --- ---
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* FSMC_NE4 PG12 OUT --- --- --- ~CS
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* FSMC_NWE PD5 OUT ~WE ~W ~W ~WR/SCL
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* FSMC_NOE PD4 OUT ~OE ~G ~R ~RD
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* FSMC_NWAIT PD6 IN --- R~B --- ---
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* FSMC_INT2 PG6* IN --- --- R~B ---
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*
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* *JP7 will switch to PD6
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*/
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/* It would be much more efficient to brute force these all into the
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* the appropriate registers. Just a little tricky.
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*/
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/* GPIO configurations common to SRAM and NOR Flash */
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const uint16_t g_commonconfig[NCOMMON_CONFIG] =
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{
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/* A0... A18 */
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GPIO_NPS_A0, GPIO_NPS_A1, GPIO_NPS_A2, GPIO_NPS_A3,
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GPIO_NPS_A4, GPIO_NPS_A5, GPIO_NPS_A6, GPIO_NPS_A7,
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GPIO_NPS_A8, GPIO_NPS_A9, GPIO_NPS_A10, GPIO_NPS_A11,
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GPIO_NPS_A12, GPIO_NPS_A13, GPIO_NPS_A14, GPIO_NPS_A15,
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GPIO_NPS_A16, GPIO_NPS_A17, GPIO_NPS_A18,
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/* D0... D15 */
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GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3,
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GPIO_NPS_D4, GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7,
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GPIO_NPS_D8, GPIO_NPS_D9, GPIO_NPS_D10, GPIO_NPS_D11,
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GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, GPIO_NPS_D15,
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/* NOE, NWE */
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GPIO_NPS_NOE, GPIO_NPS_NWE
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};
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/************************************************************************************
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* Private Data
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************************************************************************************/
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_extmemgpios
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*
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* Description:
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* Initialize GPIOs for NOR or SRAM
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*
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************************************************************************************/
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void stm32_extmemgpios(const uint16_t *gpios, int ngpios)
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{
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int i;
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/* Configure GPIOs */
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for (i = 0; i < ngpios; i++)
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{
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stm32_configgpio(gpios[i]);
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}
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}
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/************************************************************************************
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* Name: stm32_enablefsmc
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*
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* Description:
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* enable clocking to the FSMC module
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*
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************************************************************************************/
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void stm32_enablefsmc(void)
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{
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uint32_t regval;
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/* Enable AHB clocking to the FSMC */
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regval = getreg32( STM32_RCC_AHBENR);
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regval |= RCC_AHBENR_FSMCEN;
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putreg32(regval, STM32_RCC_AHBENR);
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}
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/************************************************************************************
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* Name: stm32_disablefsmc
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*
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* Description:
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* enable clocking to the FSMC module
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*
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************************************************************************************/
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void stm32_disablefsmc(void)
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{
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uint32_t regval;
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/* Enable AHB clocking to the FSMC */
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regval = getreg32( STM32_RCC_AHBENR);
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regval &= ~RCC_AHBENR_FSMCEN;
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putreg32(regval, STM32_RCC_AHBENR);
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}
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