Add support for PIC32MX1/2 ANSEL register; Mirtoo NXFFS configuration now uses the Pinquino toolchain by default:
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4984 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
9a55831286
commit
fe52db2036
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@ -3080,3 +3080,13 @@
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Alan Carvalho de Assis.
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* drivers/power/pm_changestate.c. Correct a case where interrupts were not
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being re-enabled. Found by Diego Sanchez.
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* configs/mirtoo/nxffs/defconfig: This Mirtoo NXFFS configuration now uses the
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open Pinguino toolchain by default. This is necessary because the free C32
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toolchain does not support any optimization and the unoptimized NXFFS image
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hits the PIC32MX2 FLASH size (128K). There is plenty of room to grow using
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the Pinguino toolchain with -O2 optimization.
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* configs/mirtoo/src/up_adc.c. This is just a stub for now, but this is
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where Mirtoo ADC logic will eventually need to go.
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* arch/mips/src/pic32mx/pic32mx-gpio.c: Now supports the PIC32MX1/2 ANSEL
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IOPORT register.
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@ -125,6 +125,15 @@ static inline unsigned int pic32mx_pinno(uint16_t pinset)
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return ((pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
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}
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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static inline unsigned int pic32mx_analog(uint16_t pinset)
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{
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return ((pinset & GPIO_ANALOG_MASK) != 0);
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}
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#else
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# define pic32mx_analog(pinset) (false)
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -145,6 +154,7 @@ int pic32mx_configgpio(uint16_t cfgset)
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{
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unsigned int port = pic32mx_portno(cfgset);
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unsigned int pin = pic32mx_pinno(cfgset);
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uint32_t mask = (1 << pin);
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uintptr_t base;
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/* Verify that the port number is within range */
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@ -160,9 +170,14 @@ int pic32mx_configgpio(uint16_t cfgset)
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sched_lock();
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if (pic32mx_output(cfgset))
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{
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/* Not analog */
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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putreg32(mask, base + PIC32MX_IOPORT_ANSELCLR_OFFSET);
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#endif
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/* It is an output; clear the corresponding bit in the TRIS register */
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
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putreg32(mask, base + PIC32MX_IOPORT_TRISCLR_OFFSET);
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/* Is it an open drain output? */
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@ -172,7 +187,7 @@ int pic32mx_configgpio(uint16_t cfgset)
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* the ODC register.
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*/
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCSET_OFFSET);
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putreg32(mask, base + PIC32MX_IOPORT_ODCSET_OFFSET);
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}
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else
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{
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@ -180,7 +195,7 @@ int pic32mx_configgpio(uint16_t cfgset)
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* ODC register.
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*/
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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putreg32(mask, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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}
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/* Set the initial output value */
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@ -191,8 +206,21 @@ int pic32mx_configgpio(uint16_t cfgset)
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{
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/* It is an input; set the corresponding bit in the TRIS register. */
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putreg32(1 << pin, base + PIC32MX_IOPORT_TRISSET_OFFSET);
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putreg32(1 << pin, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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putreg32(mask, base + PIC32MX_IOPORT_TRISSET_OFFSET);
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putreg32(mask, base + PIC32MX_IOPORT_ODCCLR_OFFSET);
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/* Is it an analog input? */
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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if (pic32mx_analog(cfgset))
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{
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putreg32(mask, base + PIC32MX_IOPORT_ANSELSET_OFFSET);
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}
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else
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{
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putreg32(mask, base + PIC32MX_IOPORT_ANSELCLR_OFFSET);
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}
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#endif
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}
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sched_unlock();
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@ -59,7 +59,7 @@
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/* GPIO settings used in the configport, readport, writeport, etc.
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*
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* General encoding:
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* MMxV IIDx RRRx PPPP
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* MMAV IIDx RRRx PPPP
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*/
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#define GPIO_MODE_SHIFT (14) /* Bits 14-15: I/O mode */
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@ -68,6 +68,12 @@
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# define GPIO_OUTPUT (2 << GPIO_MODE_SHIFT) /* 10 Normal output */
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# define GPIO_OPENDRAN (3 << GPIO_MODE_SHIFT) /* 11 Open drain output */
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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#define GPIO_ANALOG_MASK (1 << 13) /* Bit 13: Analog */
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# define GPIO_ANALOG (1 << 13)
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# define GPIO_DIGITAL (0)
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#endif
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#define GPIO_VALUE_MASK (1 << 12) /* Bit 12: Initial output value */
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# define GPIO_VALUE_ONE (1 << 12)
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# define GPIO_VALUE_ZERO (0)
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@ -13,6 +13,7 @@ Contents
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Loading NuttX with ICD3
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LED Usage
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UART Usage
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Analog Input
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PIC32MX Configuration Options
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Configurations
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@ -385,9 +386,9 @@ Toolchains
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information about using the Pinguino mips-elf toolchain in this thread:
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http://tech.groups.yahoo.com/group/nuttx/message/1821
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Experimental (and untested) support for the Pinguino mips-elf toolchain has
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been included in the Mirtoo configurations. Use this configuration option to
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select the Pinguino mips-elf toolchain:
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Support for the Pinguino mips-elf toolchain has been included in the Mirtoo
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configurations. Use one of these configuration options to select the Pinguino
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mips-elf toolchain:
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CONFIG_PIC32MX_PINGUINOW - Pinguino mips-elf toolchain for Windows
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CONFIG_PIC32MX_PINGUINOL - Pinguino mips toolchain for Linux
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@ -509,10 +510,10 @@ LED Usage
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--- ----- --------------------------------------------------------------
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RC8 LED0 Grounded, high value illuminates
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RC9 LED1 Grounded, high value illuminates
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The Dimitech DTX1-4000L EV-kit1 supports 3 more LEDs, but there are not
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controllable from software.
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If CONFIG_ARCH_LEDS is defined, then NuttX will control these LEDs as
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follows:
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ON OFF
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@ -560,6 +561,91 @@ UART Usage
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change will give you a little more memory by re-using the boot FLASH and SRAM
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that would otherwise be reserved for MPLAB.
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Analog Input
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============
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The Mirtoo features a PGA117 amplifier/multipexer that can be configured to
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bring any analog signal from PORT0,.. PORT7 to pin 19 of the PIC32MX:
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--- ------------------------------------------------ ----------------------------
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PIN PIC32 SIGNAL(s) BOARD SIGNAL/USAGE
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--- ------------------------------------------------ ----------------------------
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19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout
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--- ------------------------------------------------ ----------------------------
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The PGA117 driver can be enabled by setting the following the the nsh
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configuration:
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CONFIG_ADC=y : Enable support for analog input devices
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CONFIG_PIC32MX_ADC=y : Enable support the PIC32 ADC driver
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CONFIG_SPI_OWNBUS=n : The PGA117 is *not* the only device on the bus
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CONFIG_ADC_PGA11X=y : Enable support for the PGA117
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When CONFIG_PIC32MX_ADC=y is defined, the Mirtoo boot up logic will
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automatically configure pin 18 (AN0) as an analog input (see configs/mirtoo/src/up_adc.c).
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To intialize and use the PGA117, you to add logic something like the
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following in your application code:
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#include <nuttx/spi.h>
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#include <nuttx/analog/pga11x.h>
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FAR struct spi_dev_s *spi;
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PGA11X_HANDLE handle;
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/* Get the SPI port */
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spi = up_spiinitialize(2);
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if (!spi)
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{
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dbg("ERROR: Failed to initialize SPI port 2\n");
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return -ENODEV;
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}
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/* Now bind the SPI interface to the PGA117 driver */
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handle = pga11x_initialize(spi);
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if (!handle)
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{
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dbg("ERROR: Failed to bind SPI port 2 to the PGA117 driver\n");
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return -ENODEV;
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}
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After that initialization is set, then one of PORT0-7 can be select as
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an analog input to AN0 like:
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struct pga11x_settings_s settings;
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int ret;
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settings.channel = PGA11X_CHAN_CH2;
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settings.gain = PGA11X_GAIN_2;
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ret = pga11x_select(handle, &settings);
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if (ret < 0)
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{
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dbg("ERROR: Failed to select channel 2, gain 2\n");
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return -EIO;
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}
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The above logic may belong in configs/mirtoo/src/up_adc.c?
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There is still one missing piece to complete the analog support on the
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Mirtoo. This is the ADC driver that collects analog data and provides
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and ADC driver that can be used with standard open, close, read, and write
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interfaces. To complete this driver, the following is needed:
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(1) arch/mips/src/pic32mx/pic32mx-adc.c. The ADC driver that implements
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the ADC interfaces defined in include/nuttx/analog/adc.h and must
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be built when CONFIG_PIC32MX_ADC is defined.
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(2) configs/mirtoo/up_adc.c. Add Mirtoo logic that initializes and
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registers the ADC driver.
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A complete ADC driver will be a considerable amount of work to support
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all of the ADC features (such as timer driven sampling). If all you want
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to do is a simple analog conversion, then in lieu of a real ADC driver,
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you can use simple in-line logic such as you can see in the PIC32MX7 MMB
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touchscreen driver at configs/pic32mx7mmb/src/up_touchscreen.c
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PIC32MX Configuration Options
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=============================
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@ -791,7 +877,7 @@ Where <subdir> is one of the following:
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This configuration also uses the Microchip C32 toolchain under
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windows by default:
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CONFIG_PIC32MX_MICROCHIPW_LITE=y : Lite version of windows toolchain
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To switch to the Linux C32 toolchain you will have to change (1) the
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@ -815,7 +901,7 @@ Where <subdir> is one of the following:
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This configuration also uses the Microchip C32 toolchain under
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windows by default:
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CONFIG_PIC32MX_MICROCHIPW_LITE=y : Lite version of windows toolchain
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To switch to the Linux C32 toolchain you will have to change (1) the
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@ -840,7 +926,12 @@ Where <subdir> is one of the following:
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for the nsh configuration). This configuration differs from the nsh
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configuration in the following ways:
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1) SPI2 is enabled and support is included for the NXFFS file system
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1) It uses the Pinguino toolchain be default (this is easily changed,
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see above).
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CONFIG_PIC32MX_PINGUINOW=y
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2) SPI2 is enabled and support is included for the NXFFS file system
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on the 32Mbit SST25 device on the Mirtoo board. NXFFS is the NuttX
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wear-leveling file system.
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@ -851,7 +942,7 @@ Where <subdir> is one of the following:
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CONFIG_FS_NXFFS=y
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CONFIG_NSH_ARCHINIT=y
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2) Many operating system features are suppressed to produce a smaller
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3) Many operating system features are suppressed to produce a smaller
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footprint.
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CONFIG_SCHED_WAITPID=n
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@ -860,7 +951,7 @@ Where <subdir> is one of the following:
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CONFIG_DISABLE_MQUEUE=y
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CONFIG_DISABLE_MQUEUE=y
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3) Many NSH commands are suppressed, also for a smaller FLASH footprint
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4) Many NSH commands are suppressed, also for a smaller FLASH footprint
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CONFIG_NSH_DISABLESCRIPT=y
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CONFIG_NSH_DISABLEBG=y
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@ -115,10 +115,10 @@ CONFIG_PIC32MX_RAMFUNCS=n
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#
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CONFIG_PIC32MX_MICROCHIPW=n
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CONFIG_PIC32MX_MICROCHIPL=n
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CONFIG_PIC32MX_MICROCHIPW_LITE=y
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CONFIG_PIC32MX_MICROCHIPW_LITE=n
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CONFIG_PIC32MX_MICROCHIPL_LITE=n
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CONFIG_PIC32MX_MICROCHIPOPENL=n
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CONFIG_PIC32MX_PINGUINOW=n
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CONFIG_PIC32MX_PINGUINOW=y
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CONFIG_PIC32MX_PINGUINOL=n
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#
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@ -774,11 +774,10 @@ CONFIG_USBMSC_REMOVABLE=y
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# 'y' is the correct value because the serial FLASH is the only device
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# on the SPI bus.
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# CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE,
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# this will enable debug output from the PGA117 driver.
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# this will enable debug output from the PGA117 driver (see above).
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#
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CONFIG_ADC=n
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CONFIG_SPI_OWNBUS=y
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CONFIG_DEBUG_SPI=n
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CONFIG_ADC_PGA11X=n
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#CONFIG_PGA11X_SPIFREQUENCY
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@ -44,6 +44,10 @@ ifeq ($(CONFIG_PIC32MX_SPI2),y)
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CSRCS += up_spi2.c
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endif
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ifeq ($(CONFIG_PIC32MX_ADC),y)
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CSRCS += up_adc.c
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endif
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ifeq ($(CONFIG_NSH_ARCHINIT),y)
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CSRCS += up_nsh.c
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endif
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@ -92,6 +92,18 @@ EXTERN void weak_function pic32mx_spi2initialize(void);
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EXTERN void pic32mx_ledinit(void);
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#endif
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/****************************************************************************
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* Name: pic32mx_adcinitialize
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*
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* Description:
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* Perform architecture specific ADC initialization
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*
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****************************************************************************/
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#ifdef CONFIG_PIC32MX_ADC
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/* EXTERN int pic32mx_adcinitialize(void); not used */
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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@ -0,0 +1,105 @@
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/****************************************************************************
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* config/mirtoo/src/up_adc.c
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* arch/arm/src/board/up_adc.c
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
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||||
****************************************************************************/
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||||
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/****************************************************************************
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* Included Files
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||||
****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include "pic32mx-internal.h"
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#include "mirtoo-internal.h"
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#ifdef CONFIG_PIC32MX_ADC
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* The Mirtoo features a PGA117 amplifier/multipexer that can be configured to
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* bring any analog signal from PORT0,.. PORT7 to pin 19 of the PIC32MX:
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||||
*
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||||
* --- ------------------------------------------------ ----------------------------
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||||
* PIN PIC32 SIGNAL(s) BOARD SIGNAL/USAGE
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||||
* --- ------------------------------------------------ ----------------------------
|
||||
* 19 PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0 AIN PGA117 Vout
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||||
--- ------------------------------------------------ ----------------------------
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||||
*
|
||||
* The PGA117 driver can be enabled by setting the following the the nsh
|
||||
* configuration:
|
||||
*
|
||||
* CONFIG_ADC=y : Enable support for analog input devices
|
||||
* CONFIG_PIC32MX_ADC=y : Enable support the PIC32 ADC driver
|
||||
* CONFIG_SPI_OWNBUS=n : The PGA117 is *not* the only device on the bus
|
||||
* CONFIG_ADC_PGA11X=y : Enable support for the PGA117
|
||||
*
|
||||
* When CONFIG_PIC32MX_ADC=y is defined, the Mirtoo boot up logic will automatically
|
||||
* configure pin 18 (AN0) as an analog input.
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pic32mx_adcinitialize
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture specific ADC initialization
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if 0 /* Not used */
|
||||
int pic32mx_adcinitialize(void)
|
||||
{
|
||||
/* Configure the pin 19 as an analog input */
|
||||
#warning "Missing logic"
|
||||
|
||||
/* Initialize the PGA117 amplifier multiplexer */
|
||||
#warning "Missing logic"
|
||||
|
||||
/* Register the ADC device driver */
|
||||
#warning "Missing logic"
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_PIC32MX_ADC */
|
||||
Loading…
Reference in New Issue